xref: /OK3568_Linux_fs/kernel/include/dt-bindings/memory/rk3288-dram.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * This file is dual-licensed: you can use it either under the terms
5*4882a593Smuzhiyun  * of the GPL or the X11 license, at your option. Note that this dual
6*4882a593Smuzhiyun  * licensing only applies to this file, and not this project as a
7*4882a593Smuzhiyun  * whole.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  *  a) This library is free software; you can redistribute it and/or
10*4882a593Smuzhiyun  *     modify it under the terms of the GNU General Public License as
11*4882a593Smuzhiyun  *     published by the Free Software Foundation; either version 2 of the
12*4882a593Smuzhiyun  *     License, or (at your option) any later version.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *     This library is distributed in the hope that it will be useful,
15*4882a593Smuzhiyun  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16*4882a593Smuzhiyun  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*4882a593Smuzhiyun  *     GNU General Public License for more details.
18*4882a593Smuzhiyun  *
19*4882a593Smuzhiyun  * Or, alternatively,
20*4882a593Smuzhiyun  *
21*4882a593Smuzhiyun  *  b) Permission is hereby granted, free of charge, to any person
22*4882a593Smuzhiyun  *     obtaining a copy of this software and associated documentation
23*4882a593Smuzhiyun  *     files (the "Software"), to deal in the Software without
24*4882a593Smuzhiyun  *     restriction, including without limitation the rights to use,
25*4882a593Smuzhiyun  *     copy, modify, merge, publish, distribute, sublicense, and/or
26*4882a593Smuzhiyun  *     sell copies of the Software, and to permit persons to whom the
27*4882a593Smuzhiyun  *     Software is furnished to do so, subject to the following
28*4882a593Smuzhiyun  *     conditions:
29*4882a593Smuzhiyun  *
30*4882a593Smuzhiyun  *     The above copyright notice and this permission notice shall be
31*4882a593Smuzhiyun  *     included in all copies or substantial portions of the Software.
32*4882a593Smuzhiyun  *
33*4882a593Smuzhiyun  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34*4882a593Smuzhiyun  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35*4882a593Smuzhiyun  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36*4882a593Smuzhiyun  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37*4882a593Smuzhiyun  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38*4882a593Smuzhiyun  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39*4882a593Smuzhiyun  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40*4882a593Smuzhiyun  *     OTHER DEALINGS IN THE SOFTWARE.
41*4882a593Smuzhiyun  */
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #ifndef _DT_BINDINGS_DRAM_ROCKCHIP_RK3288_H
44*4882a593Smuzhiyun #define _DT_BINDINGS_DRAM_ROCKCHIP_RK3288_H
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun #define DDR3_DS_34ohm			(34)
47*4882a593Smuzhiyun #define DDR3_DS_40ohm			(40)
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define DDR3_ODT_DIS			(0)
50*4882a593Smuzhiyun #define DDR3_ODT_40ohm			(40)
51*4882a593Smuzhiyun #define DDR3_ODT_60ohm			(60)
52*4882a593Smuzhiyun #define DDR3_ODT_120ohm			(120)
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #define LP2_DS_34ohm			(34)
55*4882a593Smuzhiyun #define LP2_DS_40ohm			(40)
56*4882a593Smuzhiyun #define LP2_DS_48ohm			(48)
57*4882a593Smuzhiyun #define LP2_DS_60ohm			(60)
58*4882a593Smuzhiyun #define LP2_DS_68_6ohm			(68)	/* optional */
59*4882a593Smuzhiyun #define LP2_DS_80ohm			(80)
60*4882a593Smuzhiyun #define LP2_DS_120ohm			(120)	/* optional */
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun #define LP3_DS_34ohm			(34)
63*4882a593Smuzhiyun #define LP3_DS_40ohm			(40)
64*4882a593Smuzhiyun #define LP3_DS_48ohm			(48)
65*4882a593Smuzhiyun #define LP3_DS_60ohm			(60)
66*4882a593Smuzhiyun #define LP3_DS_80ohm			(80)
67*4882a593Smuzhiyun #define LP3_DS_34D_40U			(3440)
68*4882a593Smuzhiyun #define LP3_DS_40D_48U			(4048)
69*4882a593Smuzhiyun #define LP3_DS_34D_48U			(3448)
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun #define LP3_ODT_DIS			(0)
72*4882a593Smuzhiyun #define LP3_ODT_60ohm			(60)
73*4882a593Smuzhiyun #define LP3_ODT_120ohm			(120)
74*4882a593Smuzhiyun #define LP3_ODT_240ohm			(240)
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /* PHY DRV ODT strength*/
77*4882a593Smuzhiyun #define PHY_DDR3_RON_114ohm		(7)
78*4882a593Smuzhiyun #define PHY_DDR3_RON_95ohm		(4)
79*4882a593Smuzhiyun #define PHY_DDR3_RON_81ohm		(5)
80*4882a593Smuzhiyun #define PHY_DDR3_RON_71ohm		(0xc)
81*4882a593Smuzhiyun #define PHY_DDR3_RON_63ohm		(0xd)
82*4882a593Smuzhiyun #define PHY_DDR3_RON_57ohm		(0xe)
83*4882a593Smuzhiyun #define PHY_DDR3_RON_52ohm		(0xf)
84*4882a593Smuzhiyun #define PHY_DDR3_RON_47ohm		(0xa)
85*4882a593Smuzhiyun #define PHY_DDR3_RON_44ohm		(0xb)
86*4882a593Smuzhiyun #define PHY_DDR3_RON_41ohm		(0x8)
87*4882a593Smuzhiyun #define PHY_DDR3_RON_38ohm		(0x9)
88*4882a593Smuzhiyun #define PHY_DDR3_RON_34ohm		(0x19)
89*4882a593Smuzhiyun #define PHY_DDR3_RON_30ohm		(0x1b)
90*4882a593Smuzhiyun #define PHY_DDR3_RON_26ohm		(0x1c)
91*4882a593Smuzhiyun #define PHY_DDR3_RON_23ohm		(0x15)
92*4882a593Smuzhiyun #define PHY_DDR3_RON_20ohm		(0x12)
93*4882a593Smuzhiyun #define PHY_DDR3_RON_18ohm		(0x11)
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun #define PHY_DDR3_RTT_368ohm		(0x1)
96*4882a593Smuzhiyun #define PHY_DDR3_RTT_155ohm		(0x2)
97*4882a593Smuzhiyun #define PHY_DDR3_RTT_113ohm		(0x3)
98*4882a593Smuzhiyun #define PHY_DDR3_RTT_80ohm		(0x6)
99*4882a593Smuzhiyun #define PHY_DDR3_RTT_64ohm		(0x7)
100*4882a593Smuzhiyun #define PHY_DDR3_RTT_54ohm		(0x4)
101*4882a593Smuzhiyun #define PHY_DDR3_RTT_40ohm		(0xc)
102*4882a593Smuzhiyun #define PHY_DDR3_RTT_30ohm		(0xf)
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun #define PHY_LP23_RON_110ohm		(4)
105*4882a593Smuzhiyun #define PHY_LP23_RON_83ohm		(0xc)
106*4882a593Smuzhiyun #define PHY_LP23_RON_73ohm		(0xd)
107*4882a593Smuzhiyun #define PHY_LP23_RON_66ohm		(0xe)
108*4882a593Smuzhiyun #define PHY_LP23_RON_60ohm		(0xf)
109*4882a593Smuzhiyun #define PHY_LP23_RON_55ohm		(0xa)
110*4882a593Smuzhiyun #define PHY_LP23_RON_51ohm		(0xb)
111*4882a593Smuzhiyun #define PHY_LP23_RON_44ohm		(0x9)
112*4882a593Smuzhiyun #define PHY_LP23_RON_39ohm		(0x19)
113*4882a593Smuzhiyun #define PHY_LP23_RON_35ohm		(0x1b)
114*4882a593Smuzhiyun #define PHY_LP23_RON_30ohm		(0x1c)
115*4882a593Smuzhiyun #define PHY_LP23_RON_26ohm		(0x16)
116*4882a593Smuzhiyun #define PHY_LP23_RON_22ohm		(0x10)
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun #define PHY_LP23_RTT_368ohm		(0x1)
119*4882a593Smuzhiyun #define PHY_LP23_RTT_155ohm		(0x2)
120*4882a593Smuzhiyun #define PHY_LP23_RTT_113ohm		(0x3)
121*4882a593Smuzhiyun #define PHY_LP23_RTT_80ohm		(0x6)
122*4882a593Smuzhiyun #define PHY_LP23_RTT_64ohm		(0x7)
123*4882a593Smuzhiyun #define PHY_LP23_RTT_54ohm		(0x4)
124*4882a593Smuzhiyun #define PHY_LP23_RTT_40ohm		(0xc)
125*4882a593Smuzhiyun #define PHY_LP23_RTT_30ohm		(0xf)
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun #endif /*_DT_BINDINGS_DRAM_ROCKCHIP_RK3288_H*/
128