xref: /OK3568_Linux_fs/kernel/include/dt-bindings/interconnect/qcom,sm8250.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Qualcomm SM8250 interconnect IDs
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H
9*4882a593Smuzhiyun #define __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #define MASTER_A1NOC_CFG		0
12*4882a593Smuzhiyun #define MASTER_QSPI_0			1
13*4882a593Smuzhiyun #define MASTER_QUP_1			2
14*4882a593Smuzhiyun #define MASTER_QUP_2			3
15*4882a593Smuzhiyun #define MASTER_TSIF			4
16*4882a593Smuzhiyun #define MASTER_PCIE_2			5
17*4882a593Smuzhiyun #define MASTER_SDCC_4			6
18*4882a593Smuzhiyun #define MASTER_UFS_MEM			7
19*4882a593Smuzhiyun #define MASTER_USB3			8
20*4882a593Smuzhiyun #define MASTER_USB3_1			9
21*4882a593Smuzhiyun #define A1NOC_SNOC_SLV			10
22*4882a593Smuzhiyun #define SLAVE_ANOC_PCIE_GEM_NOC_1	11
23*4882a593Smuzhiyun #define SLAVE_SERVICE_A1NOC		12
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define MASTER_A2NOC_CFG		0
26*4882a593Smuzhiyun #define MASTER_QDSS_BAM			1
27*4882a593Smuzhiyun #define MASTER_QUP_0			2
28*4882a593Smuzhiyun #define MASTER_CNOC_A2NOC		3
29*4882a593Smuzhiyun #define MASTER_CRYPTO_CORE_0		4
30*4882a593Smuzhiyun #define MASTER_IPA			5
31*4882a593Smuzhiyun #define MASTER_PCIE			6
32*4882a593Smuzhiyun #define MASTER_PCIE_1			7
33*4882a593Smuzhiyun #define MASTER_QDSS_ETR			8
34*4882a593Smuzhiyun #define MASTER_SDCC_2			9
35*4882a593Smuzhiyun #define MASTER_UFS_CARD			10
36*4882a593Smuzhiyun #define A2NOC_SNOC_SLV			11
37*4882a593Smuzhiyun #define SLAVE_ANOC_PCIE_GEM_NOC		12
38*4882a593Smuzhiyun #define SLAVE_SERVICE_A2NOC		13
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define MASTER_NPU			0
41*4882a593Smuzhiyun #define SLAVE_CDSP_MEM_NOC		1
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define SNOC_CNOC_MAS			0
44*4882a593Smuzhiyun #define MASTER_QDSS_DAP			1
45*4882a593Smuzhiyun #define SLAVE_A1NOC_CFG			2
46*4882a593Smuzhiyun #define SLAVE_A2NOC_CFG			3
47*4882a593Smuzhiyun #define SLAVE_AHB2PHY_SOUTH		4
48*4882a593Smuzhiyun #define SLAVE_AHB2PHY_NORTH		5
49*4882a593Smuzhiyun #define SLAVE_AOSS			6
50*4882a593Smuzhiyun #define SLAVE_CAMERA_CFG		7
51*4882a593Smuzhiyun #define SLAVE_CLK_CTL			8
52*4882a593Smuzhiyun #define SLAVE_CDSP_CFG			9
53*4882a593Smuzhiyun #define SLAVE_RBCPR_CX_CFG		10
54*4882a593Smuzhiyun #define SLAVE_RBCPR_MMCX_CFG		11
55*4882a593Smuzhiyun #define SLAVE_RBCPR_MX_CFG		12
56*4882a593Smuzhiyun #define SLAVE_CRYPTO_0_CFG		13
57*4882a593Smuzhiyun #define SLAVE_CX_RDPM			14
58*4882a593Smuzhiyun #define SLAVE_DCC_CFG			15
59*4882a593Smuzhiyun #define SLAVE_CNOC_DDRSS		16
60*4882a593Smuzhiyun #define SLAVE_DISPLAY_CFG		17
61*4882a593Smuzhiyun #define SLAVE_GRAPHICS_3D_CFG		18
62*4882a593Smuzhiyun #define SLAVE_IMEM_CFG			19
63*4882a593Smuzhiyun #define SLAVE_IPA_CFG			20
64*4882a593Smuzhiyun #define SLAVE_IPC_ROUTER_CFG		21
65*4882a593Smuzhiyun #define SLAVE_LPASS			22
66*4882a593Smuzhiyun #define SLAVE_CNOC_MNOC_CFG		23
67*4882a593Smuzhiyun #define SLAVE_NPU_CFG			24
68*4882a593Smuzhiyun #define SLAVE_PCIE_0_CFG		25
69*4882a593Smuzhiyun #define SLAVE_PCIE_1_CFG		26
70*4882a593Smuzhiyun #define SLAVE_PCIE_2_CFG		27
71*4882a593Smuzhiyun #define SLAVE_PDM			28
72*4882a593Smuzhiyun #define SLAVE_PIMEM_CFG			29
73*4882a593Smuzhiyun #define SLAVE_PRNG			30
74*4882a593Smuzhiyun #define SLAVE_QDSS_CFG			31
75*4882a593Smuzhiyun #define SLAVE_QSPI_0			32
76*4882a593Smuzhiyun #define SLAVE_QUP_0			33
77*4882a593Smuzhiyun #define SLAVE_QUP_1			34
78*4882a593Smuzhiyun #define SLAVE_QUP_2			35
79*4882a593Smuzhiyun #define SLAVE_SDCC_2			36
80*4882a593Smuzhiyun #define SLAVE_SDCC_4			37
81*4882a593Smuzhiyun #define SLAVE_SNOC_CFG			38
82*4882a593Smuzhiyun #define SLAVE_TCSR			39
83*4882a593Smuzhiyun #define SLAVE_TLMM_NORTH		40
84*4882a593Smuzhiyun #define SLAVE_TLMM_SOUTH		41
85*4882a593Smuzhiyun #define SLAVE_TLMM_WEST			42
86*4882a593Smuzhiyun #define SLAVE_TSIF			43
87*4882a593Smuzhiyun #define SLAVE_UFS_CARD_CFG		44
88*4882a593Smuzhiyun #define SLAVE_UFS_MEM_CFG		45
89*4882a593Smuzhiyun #define SLAVE_USB3			46
90*4882a593Smuzhiyun #define SLAVE_USB3_1			47
91*4882a593Smuzhiyun #define SLAVE_VENUS_CFG			48
92*4882a593Smuzhiyun #define SLAVE_VSENSE_CTRL_CFG		49
93*4882a593Smuzhiyun #define SLAVE_CNOC_A2NOC		50
94*4882a593Smuzhiyun #define SLAVE_SERVICE_CNOC		51
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun #define MASTER_CNOC_DC_NOC		0
97*4882a593Smuzhiyun #define SLAVE_LLCC_CFG			1
98*4882a593Smuzhiyun #define SLAVE_GEM_NOC_CFG		2
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun #define MASTER_GPU_TCU			0
101*4882a593Smuzhiyun #define MASTER_SYS_TCU			1
102*4882a593Smuzhiyun #define MASTER_AMPSS_M0			2
103*4882a593Smuzhiyun #define MASTER_GEM_NOC_CFG		3
104*4882a593Smuzhiyun #define MASTER_COMPUTE_NOC		4
105*4882a593Smuzhiyun #define MASTER_GRAPHICS_3D		5
106*4882a593Smuzhiyun #define MASTER_MNOC_HF_MEM_NOC		6
107*4882a593Smuzhiyun #define MASTER_MNOC_SF_MEM_NOC		7
108*4882a593Smuzhiyun #define MASTER_ANOC_PCIE_GEM_NOC	8
109*4882a593Smuzhiyun #define MASTER_SNOC_GC_MEM_NOC		9
110*4882a593Smuzhiyun #define MASTER_SNOC_SF_MEM_NOC		10
111*4882a593Smuzhiyun #define SLAVE_GEM_NOC_SNOC		11
112*4882a593Smuzhiyun #define SLAVE_LLCC			12
113*4882a593Smuzhiyun #define SLAVE_MEM_NOC_PCIE_SNOC		13
114*4882a593Smuzhiyun #define SLAVE_SERVICE_GEM_NOC_1		14
115*4882a593Smuzhiyun #define SLAVE_SERVICE_GEM_NOC_2		15
116*4882a593Smuzhiyun #define SLAVE_SERVICE_GEM_NOC		16
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun #define MASTER_IPA_CORE			0
119*4882a593Smuzhiyun #define SLAVE_IPA_CORE			1
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun #define MASTER_LLCC			0
122*4882a593Smuzhiyun #define SLAVE_EBI_CH0			1
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun #define MASTER_CNOC_MNOC_CFG		0
125*4882a593Smuzhiyun #define MASTER_CAMNOC_HF		1
126*4882a593Smuzhiyun #define MASTER_CAMNOC_ICP		2
127*4882a593Smuzhiyun #define MASTER_CAMNOC_SF		3
128*4882a593Smuzhiyun #define MASTER_VIDEO_P0			4
129*4882a593Smuzhiyun #define MASTER_VIDEO_P1			5
130*4882a593Smuzhiyun #define MASTER_VIDEO_PROC		6
131*4882a593Smuzhiyun #define MASTER_MDP_PORT0		7
132*4882a593Smuzhiyun #define MASTER_MDP_PORT1		8
133*4882a593Smuzhiyun #define MASTER_ROTATOR			9
134*4882a593Smuzhiyun #define SLAVE_MNOC_HF_MEM_NOC		10
135*4882a593Smuzhiyun #define SLAVE_MNOC_SF_MEM_NOC		11
136*4882a593Smuzhiyun #define SLAVE_SERVICE_MNOC		12
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun #define MASTER_NPU_SYS			0
139*4882a593Smuzhiyun #define MASTER_NPU_CDP			1
140*4882a593Smuzhiyun #define MASTER_NPU_NOC_CFG		2
141*4882a593Smuzhiyun #define SLAVE_NPU_CAL_DP0		3
142*4882a593Smuzhiyun #define SLAVE_NPU_CAL_DP1		4
143*4882a593Smuzhiyun #define SLAVE_NPU_CP			5
144*4882a593Smuzhiyun #define SLAVE_NPU_INT_DMA_BWMON_CFG	6
145*4882a593Smuzhiyun #define SLAVE_NPU_DPM			7
146*4882a593Smuzhiyun #define SLAVE_ISENSE_CFG		8
147*4882a593Smuzhiyun #define SLAVE_NPU_LLM_CFG		9
148*4882a593Smuzhiyun #define SLAVE_NPU_TCM			10
149*4882a593Smuzhiyun #define SLAVE_NPU_COMPUTE_NOC		11
150*4882a593Smuzhiyun #define SLAVE_SERVICE_NPU_NOC		12
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun #define MASTER_SNOC_CFG			0
153*4882a593Smuzhiyun #define A1NOC_SNOC_MAS			1
154*4882a593Smuzhiyun #define A2NOC_SNOC_MAS			2
155*4882a593Smuzhiyun #define MASTER_GEM_NOC_SNOC		3
156*4882a593Smuzhiyun #define MASTER_GEM_NOC_PCIE_SNOC	4
157*4882a593Smuzhiyun #define MASTER_PIMEM			5
158*4882a593Smuzhiyun #define MASTER_GIC			6
159*4882a593Smuzhiyun #define SLAVE_APPSS			7
160*4882a593Smuzhiyun #define SNOC_CNOC_SLV			8
161*4882a593Smuzhiyun #define SLAVE_SNOC_GEM_NOC_GC		9
162*4882a593Smuzhiyun #define SLAVE_SNOC_GEM_NOC_SF		10
163*4882a593Smuzhiyun #define SLAVE_OCIMEM			11
164*4882a593Smuzhiyun #define SLAVE_PIMEM			12
165*4882a593Smuzhiyun #define SLAVE_SERVICE_SNOC		13
166*4882a593Smuzhiyun #define SLAVE_PCIE_0			14
167*4882a593Smuzhiyun #define SLAVE_PCIE_1			15
168*4882a593Smuzhiyun #define SLAVE_PCIE_2			16
169*4882a593Smuzhiyun #define SLAVE_QDSS_STM			17
170*4882a593Smuzhiyun #define SLAVE_TCU			18
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun #endif
173