1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Qualcomm SDM845 interconnect IDs 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2018, Linaro Ltd. 6*4882a593Smuzhiyun * Author: Georgi Djakov <georgi.djakov@linaro.org> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDM845_H 10*4882a593Smuzhiyun #define __DT_BINDINGS_INTERCONNECT_QCOM_SDM845_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define MASTER_A1NOC_CFG 0 13*4882a593Smuzhiyun #define MASTER_TSIF 1 14*4882a593Smuzhiyun #define MASTER_SDCC_2 2 15*4882a593Smuzhiyun #define MASTER_SDCC_4 3 16*4882a593Smuzhiyun #define MASTER_UFS_CARD 4 17*4882a593Smuzhiyun #define MASTER_UFS_MEM 5 18*4882a593Smuzhiyun #define MASTER_PCIE_0 6 19*4882a593Smuzhiyun #define SLAVE_A1NOC_SNOC 7 20*4882a593Smuzhiyun #define SLAVE_SERVICE_A1NOC 8 21*4882a593Smuzhiyun #define SLAVE_ANOC_PCIE_A1NOC_SNOC 9 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define MASTER_A2NOC_CFG 0 24*4882a593Smuzhiyun #define MASTER_QDSS_BAM 1 25*4882a593Smuzhiyun #define MASTER_CNOC_A2NOC 2 26*4882a593Smuzhiyun #define MASTER_CRYPTO 3 27*4882a593Smuzhiyun #define MASTER_IPA 4 28*4882a593Smuzhiyun #define MASTER_PCIE_1 5 29*4882a593Smuzhiyun #define MASTER_QDSS_ETR 6 30*4882a593Smuzhiyun #define MASTER_USB3_0 7 31*4882a593Smuzhiyun #define MASTER_USB3_1 8 32*4882a593Smuzhiyun #define SLAVE_A2NOC_SNOC 9 33*4882a593Smuzhiyun #define SLAVE_ANOC_PCIE_SNOC 10 34*4882a593Smuzhiyun #define SLAVE_SERVICE_A2NOC 11 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #define MASTER_SPDM 0 37*4882a593Smuzhiyun #define MASTER_TIC 1 38*4882a593Smuzhiyun #define MASTER_SNOC_CNOC 2 39*4882a593Smuzhiyun #define MASTER_QDSS_DAP 3 40*4882a593Smuzhiyun #define SLAVE_A1NOC_CFG 4 41*4882a593Smuzhiyun #define SLAVE_A2NOC_CFG 5 42*4882a593Smuzhiyun #define SLAVE_AOP 6 43*4882a593Smuzhiyun #define SLAVE_AOSS 7 44*4882a593Smuzhiyun #define SLAVE_CAMERA_CFG 8 45*4882a593Smuzhiyun #define SLAVE_CLK_CTL 9 46*4882a593Smuzhiyun #define SLAVE_CDSP_CFG 10 47*4882a593Smuzhiyun #define SLAVE_RBCPR_CX_CFG 11 48*4882a593Smuzhiyun #define SLAVE_CRYPTO_0_CFG 12 49*4882a593Smuzhiyun #define SLAVE_DCC_CFG 13 50*4882a593Smuzhiyun #define SLAVE_CNOC_DDRSS 14 51*4882a593Smuzhiyun #define SLAVE_DISPLAY_CFG 15 52*4882a593Smuzhiyun #define SLAVE_GLM 16 53*4882a593Smuzhiyun #define SLAVE_GFX3D_CFG 17 54*4882a593Smuzhiyun #define SLAVE_IMEM_CFG 18 55*4882a593Smuzhiyun #define SLAVE_IPA_CFG 19 56*4882a593Smuzhiyun #define SLAVE_CNOC_MNOC_CFG 20 57*4882a593Smuzhiyun #define SLAVE_PCIE_0_CFG 21 58*4882a593Smuzhiyun #define SLAVE_PCIE_1_CFG 22 59*4882a593Smuzhiyun #define SLAVE_PDM 23 60*4882a593Smuzhiyun #define SLAVE_SOUTH_PHY_CFG 24 61*4882a593Smuzhiyun #define SLAVE_PIMEM_CFG 25 62*4882a593Smuzhiyun #define SLAVE_PRNG 26 63*4882a593Smuzhiyun #define SLAVE_QDSS_CFG 27 64*4882a593Smuzhiyun #define SLAVE_BLSP_2 28 65*4882a593Smuzhiyun #define SLAVE_BLSP_1 29 66*4882a593Smuzhiyun #define SLAVE_SDCC_2 30 67*4882a593Smuzhiyun #define SLAVE_SDCC_4 31 68*4882a593Smuzhiyun #define SLAVE_SNOC_CFG 32 69*4882a593Smuzhiyun #define SLAVE_SPDM_WRAPPER 33 70*4882a593Smuzhiyun #define SLAVE_SPSS_CFG 34 71*4882a593Smuzhiyun #define SLAVE_TCSR 35 72*4882a593Smuzhiyun #define SLAVE_TLMM_NORTH 36 73*4882a593Smuzhiyun #define SLAVE_TLMM_SOUTH 37 74*4882a593Smuzhiyun #define SLAVE_TSIF 38 75*4882a593Smuzhiyun #define SLAVE_UFS_CARD_CFG 39 76*4882a593Smuzhiyun #define SLAVE_UFS_MEM_CFG 40 77*4882a593Smuzhiyun #define SLAVE_USB3_0 41 78*4882a593Smuzhiyun #define SLAVE_USB3_1 42 79*4882a593Smuzhiyun #define SLAVE_VENUS_CFG 43 80*4882a593Smuzhiyun #define SLAVE_VSENSE_CTRL_CFG 44 81*4882a593Smuzhiyun #define SLAVE_CNOC_A2NOC 45 82*4882a593Smuzhiyun #define SLAVE_SERVICE_CNOC 46 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun #define MASTER_CNOC_DC_NOC 0 85*4882a593Smuzhiyun #define SLAVE_LLCC_CFG 1 86*4882a593Smuzhiyun #define SLAVE_MEM_NOC_CFG 2 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #define MASTER_APPSS_PROC 0 89*4882a593Smuzhiyun #define MASTER_GNOC_CFG 1 90*4882a593Smuzhiyun #define SLAVE_GNOC_SNOC 2 91*4882a593Smuzhiyun #define SLAVE_GNOC_MEM_NOC 3 92*4882a593Smuzhiyun #define SLAVE_SERVICE_GNOC 4 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #define MASTER_TCU_0 0 95*4882a593Smuzhiyun #define MASTER_MEM_NOC_CFG 1 96*4882a593Smuzhiyun #define MASTER_GNOC_MEM_NOC 2 97*4882a593Smuzhiyun #define MASTER_MNOC_HF_MEM_NOC 3 98*4882a593Smuzhiyun #define MASTER_MNOC_SF_MEM_NOC 4 99*4882a593Smuzhiyun #define MASTER_SNOC_GC_MEM_NOC 5 100*4882a593Smuzhiyun #define MASTER_SNOC_SF_MEM_NOC 6 101*4882a593Smuzhiyun #define MASTER_GFX3D 7 102*4882a593Smuzhiyun #define SLAVE_MSS_PROC_MS_MPU_CFG 8 103*4882a593Smuzhiyun #define SLAVE_MEM_NOC_GNOC 9 104*4882a593Smuzhiyun #define SLAVE_LLCC 10 105*4882a593Smuzhiyun #define SLAVE_MEM_NOC_SNOC 11 106*4882a593Smuzhiyun #define SLAVE_SERVICE_MEM_NOC 12 107*4882a593Smuzhiyun #define MASTER_LLCC 13 108*4882a593Smuzhiyun #define SLAVE_EBI1 14 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #define MASTER_CNOC_MNOC_CFG 0 111*4882a593Smuzhiyun #define MASTER_CAMNOC_HF0 1 112*4882a593Smuzhiyun #define MASTER_CAMNOC_HF1 2 113*4882a593Smuzhiyun #define MASTER_CAMNOC_SF 3 114*4882a593Smuzhiyun #define MASTER_MDP0 4 115*4882a593Smuzhiyun #define MASTER_MDP1 5 116*4882a593Smuzhiyun #define MASTER_ROTATOR 6 117*4882a593Smuzhiyun #define MASTER_VIDEO_P0 7 118*4882a593Smuzhiyun #define MASTER_VIDEO_P1 8 119*4882a593Smuzhiyun #define MASTER_VIDEO_PROC 9 120*4882a593Smuzhiyun #define SLAVE_MNOC_SF_MEM_NOC 10 121*4882a593Smuzhiyun #define SLAVE_MNOC_HF_MEM_NOC 11 122*4882a593Smuzhiyun #define SLAVE_SERVICE_MNOC 12 123*4882a593Smuzhiyun #define MASTER_CAMNOC_HF0_UNCOMP 13 124*4882a593Smuzhiyun #define MASTER_CAMNOC_HF1_UNCOMP 14 125*4882a593Smuzhiyun #define MASTER_CAMNOC_SF_UNCOMP 15 126*4882a593Smuzhiyun #define SLAVE_CAMNOC_UNCOMP 16 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun #define MASTER_SNOC_CFG 0 129*4882a593Smuzhiyun #define MASTER_A1NOC_SNOC 1 130*4882a593Smuzhiyun #define MASTER_A2NOC_SNOC 2 131*4882a593Smuzhiyun #define MASTER_GNOC_SNOC 3 132*4882a593Smuzhiyun #define MASTER_MEM_NOC_SNOC 4 133*4882a593Smuzhiyun #define MASTER_ANOC_PCIE_SNOC 5 134*4882a593Smuzhiyun #define MASTER_PIMEM 6 135*4882a593Smuzhiyun #define MASTER_GIC 7 136*4882a593Smuzhiyun #define SLAVE_APPSS 8 137*4882a593Smuzhiyun #define SLAVE_SNOC_CNOC 9 138*4882a593Smuzhiyun #define SLAVE_SNOC_MEM_NOC_GC 10 139*4882a593Smuzhiyun #define SLAVE_SNOC_MEM_NOC_SF 11 140*4882a593Smuzhiyun #define SLAVE_IMEM 12 141*4882a593Smuzhiyun #define SLAVE_PCIE_0 13 142*4882a593Smuzhiyun #define SLAVE_PCIE_1 14 143*4882a593Smuzhiyun #define SLAVE_PIMEM 15 144*4882a593Smuzhiyun #define SLAVE_SERVICE_SNOC 16 145*4882a593Smuzhiyun #define SLAVE_QDSS_STM 17 146*4882a593Smuzhiyun #define SLAVE_TCU 18 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun #endif 149