1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Interconnect framework driver for i.MX SoC 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2019, BayLibre 6*4882a593Smuzhiyun * Copyright (c) 2019-2020, NXP 7*4882a593Smuzhiyun * Author: Alexandre Bailon <abailon@baylibre.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __DT_BINDINGS_INTERCONNECT_IMX8MM_H 11*4882a593Smuzhiyun #define __DT_BINDINGS_INTERCONNECT_IMX8MM_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define IMX8MM_ICN_NOC 1 14*4882a593Smuzhiyun #define IMX8MM_ICS_DRAM 2 15*4882a593Smuzhiyun #define IMX8MM_ICS_OCRAM 3 16*4882a593Smuzhiyun #define IMX8MM_ICM_A53 4 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define IMX8MM_ICM_VPU_H1 5 19*4882a593Smuzhiyun #define IMX8MM_ICM_VPU_G1 6 20*4882a593Smuzhiyun #define IMX8MM_ICM_VPU_G2 7 21*4882a593Smuzhiyun #define IMX8MM_ICN_VIDEO 8 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define IMX8MM_ICM_GPU2D 9 24*4882a593Smuzhiyun #define IMX8MM_ICM_GPU3D 10 25*4882a593Smuzhiyun #define IMX8MM_ICN_GPU 11 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define IMX8MM_ICM_CSI 12 28*4882a593Smuzhiyun #define IMX8MM_ICM_LCDIF 13 29*4882a593Smuzhiyun #define IMX8MM_ICN_MIPI 14 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define IMX8MM_ICM_USB1 15 32*4882a593Smuzhiyun #define IMX8MM_ICM_USB2 16 33*4882a593Smuzhiyun #define IMX8MM_ICM_PCIE 17 34*4882a593Smuzhiyun #define IMX8MM_ICN_HSIO 18 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #define IMX8MM_ICM_SDMA2 19 37*4882a593Smuzhiyun #define IMX8MM_ICM_SDMA3 20 38*4882a593Smuzhiyun #define IMX8MM_ICN_AUDIO 21 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define IMX8MM_ICN_ENET 22 41*4882a593Smuzhiyun #define IMX8MM_ICM_ENET 23 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define IMX8MM_ICN_MAIN 24 44*4882a593Smuzhiyun #define IMX8MM_ICM_NAND 25 45*4882a593Smuzhiyun #define IMX8MM_ICM_SDMA1 26 46*4882a593Smuzhiyun #define IMX8MM_ICM_USDHC1 27 47*4882a593Smuzhiyun #define IMX8MM_ICM_USDHC2 28 48*4882a593Smuzhiyun #define IMX8MM_ICM_USDHC3 29 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #endif /* __DT_BINDINGS_INTERCONNECT_IMX8MM_H */ 51