1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * GPIO definitions for Amlogic Meson8b SoCs 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2015 Endless Mobile, Inc. 6*4882a593Smuzhiyun * Author: Carlo Caione <carlo@endlessm.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _DT_BINDINGS_MESON8B_GPIO_H 10*4882a593Smuzhiyun #define _DT_BINDINGS_MESON8B_GPIO_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* EE (CBUS) GPIO chip */ 13*4882a593Smuzhiyun #define GPIOX_0 0 14*4882a593Smuzhiyun #define GPIOX_1 1 15*4882a593Smuzhiyun #define GPIOX_2 2 16*4882a593Smuzhiyun #define GPIOX_3 3 17*4882a593Smuzhiyun #define GPIOX_4 4 18*4882a593Smuzhiyun #define GPIOX_5 5 19*4882a593Smuzhiyun #define GPIOX_6 6 20*4882a593Smuzhiyun #define GPIOX_7 7 21*4882a593Smuzhiyun #define GPIOX_8 8 22*4882a593Smuzhiyun #define GPIOX_9 9 23*4882a593Smuzhiyun #define GPIOX_10 10 24*4882a593Smuzhiyun #define GPIOX_11 11 25*4882a593Smuzhiyun #define GPIOX_16 12 26*4882a593Smuzhiyun #define GPIOX_17 13 27*4882a593Smuzhiyun #define GPIOX_18 14 28*4882a593Smuzhiyun #define GPIOX_19 15 29*4882a593Smuzhiyun #define GPIOX_20 16 30*4882a593Smuzhiyun #define GPIOX_21 17 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define GPIOY_0 18 33*4882a593Smuzhiyun #define GPIOY_1 19 34*4882a593Smuzhiyun #define GPIOY_3 20 35*4882a593Smuzhiyun #define GPIOY_6 21 36*4882a593Smuzhiyun #define GPIOY_7 22 37*4882a593Smuzhiyun #define GPIOY_8 23 38*4882a593Smuzhiyun #define GPIOY_9 24 39*4882a593Smuzhiyun #define GPIOY_10 25 40*4882a593Smuzhiyun #define GPIOY_11 26 41*4882a593Smuzhiyun #define GPIOY_12 27 42*4882a593Smuzhiyun #define GPIOY_13 28 43*4882a593Smuzhiyun #define GPIOY_14 29 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define GPIODV_9 30 46*4882a593Smuzhiyun #define GPIODV_24 31 47*4882a593Smuzhiyun #define GPIODV_25 32 48*4882a593Smuzhiyun #define GPIODV_26 33 49*4882a593Smuzhiyun #define GPIODV_27 34 50*4882a593Smuzhiyun #define GPIODV_28 35 51*4882a593Smuzhiyun #define GPIODV_29 36 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define GPIOH_0 37 54*4882a593Smuzhiyun #define GPIOH_1 38 55*4882a593Smuzhiyun #define GPIOH_2 39 56*4882a593Smuzhiyun #define GPIOH_3 40 57*4882a593Smuzhiyun #define GPIOH_4 41 58*4882a593Smuzhiyun #define GPIOH_5 42 59*4882a593Smuzhiyun #define GPIOH_6 43 60*4882a593Smuzhiyun #define GPIOH_7 44 61*4882a593Smuzhiyun #define GPIOH_8 45 62*4882a593Smuzhiyun #define GPIOH_9 46 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun #define CARD_0 47 65*4882a593Smuzhiyun #define CARD_1 48 66*4882a593Smuzhiyun #define CARD_2 49 67*4882a593Smuzhiyun #define CARD_3 50 68*4882a593Smuzhiyun #define CARD_4 51 69*4882a593Smuzhiyun #define CARD_5 52 70*4882a593Smuzhiyun #define CARD_6 53 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun #define BOOT_0 54 73*4882a593Smuzhiyun #define BOOT_1 55 74*4882a593Smuzhiyun #define BOOT_2 56 75*4882a593Smuzhiyun #define BOOT_3 57 76*4882a593Smuzhiyun #define BOOT_4 58 77*4882a593Smuzhiyun #define BOOT_5 59 78*4882a593Smuzhiyun #define BOOT_6 60 79*4882a593Smuzhiyun #define BOOT_7 61 80*4882a593Smuzhiyun #define BOOT_8 62 81*4882a593Smuzhiyun #define BOOT_9 63 82*4882a593Smuzhiyun #define BOOT_10 64 83*4882a593Smuzhiyun #define BOOT_11 65 84*4882a593Smuzhiyun #define BOOT_12 66 85*4882a593Smuzhiyun #define BOOT_13 67 86*4882a593Smuzhiyun #define BOOT_14 68 87*4882a593Smuzhiyun #define BOOT_15 69 88*4882a593Smuzhiyun #define BOOT_16 70 89*4882a593Smuzhiyun #define BOOT_17 71 90*4882a593Smuzhiyun #define BOOT_18 72 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #define DIF_0_P 73 93*4882a593Smuzhiyun #define DIF_0_N 74 94*4882a593Smuzhiyun #define DIF_1_P 75 95*4882a593Smuzhiyun #define DIF_1_N 76 96*4882a593Smuzhiyun #define DIF_2_P 77 97*4882a593Smuzhiyun #define DIF_2_N 78 98*4882a593Smuzhiyun #define DIF_3_P 79 99*4882a593Smuzhiyun #define DIF_3_N 80 100*4882a593Smuzhiyun #define DIF_4_P 81 101*4882a593Smuzhiyun #define DIF_4_N 82 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun /* AO GPIO chip */ 104*4882a593Smuzhiyun #define GPIOAO_0 0 105*4882a593Smuzhiyun #define GPIOAO_1 1 106*4882a593Smuzhiyun #define GPIOAO_2 2 107*4882a593Smuzhiyun #define GPIOAO_3 3 108*4882a593Smuzhiyun #define GPIOAO_4 4 109*4882a593Smuzhiyun #define GPIOAO_5 5 110*4882a593Smuzhiyun #define GPIOAO_6 6 111*4882a593Smuzhiyun #define GPIOAO_7 7 112*4882a593Smuzhiyun #define GPIOAO_8 8 113*4882a593Smuzhiyun #define GPIOAO_9 9 114*4882a593Smuzhiyun #define GPIOAO_10 10 115*4882a593Smuzhiyun #define GPIOAO_11 11 116*4882a593Smuzhiyun #define GPIOAO_12 12 117*4882a593Smuzhiyun #define GPIOAO_13 13 118*4882a593Smuzhiyun #define GPIO_BSD_EN 14 119*4882a593Smuzhiyun #define GPIO_TEST_N 15 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun #endif /* _DT_BINDINGS_MESON8B_GPIO_H */ 122