1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 7*4882a593Smuzhiyun * whole. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 11*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 12*4882a593Smuzhiyun * License, or (at your option) any later version. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 15*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*4882a593Smuzhiyun * GNU General Public License for more details. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * Or, alternatively, 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 22*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 23*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 24*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 25*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 26*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 27*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 28*4882a593Smuzhiyun * conditions: 29*4882a593Smuzhiyun * 30*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 31*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLK_SUN8I_R40_H_ 44*4882a593Smuzhiyun #define _DT_BINDINGS_CLK_SUN8I_R40_H_ 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #define CLK_PLL_VIDEO0 7 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define CLK_PLL_VIDEO1 16 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define CLK_CPU 24 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define CLK_BUS_MIPI_DSI 29 53*4882a593Smuzhiyun #define CLK_BUS_CE 30 54*4882a593Smuzhiyun #define CLK_BUS_DMA 31 55*4882a593Smuzhiyun #define CLK_BUS_MMC0 32 56*4882a593Smuzhiyun #define CLK_BUS_MMC1 33 57*4882a593Smuzhiyun #define CLK_BUS_MMC2 34 58*4882a593Smuzhiyun #define CLK_BUS_MMC3 35 59*4882a593Smuzhiyun #define CLK_BUS_NAND 36 60*4882a593Smuzhiyun #define CLK_BUS_DRAM 37 61*4882a593Smuzhiyun #define CLK_BUS_EMAC 38 62*4882a593Smuzhiyun #define CLK_BUS_TS 39 63*4882a593Smuzhiyun #define CLK_BUS_HSTIMER 40 64*4882a593Smuzhiyun #define CLK_BUS_SPI0 41 65*4882a593Smuzhiyun #define CLK_BUS_SPI1 42 66*4882a593Smuzhiyun #define CLK_BUS_SPI2 43 67*4882a593Smuzhiyun #define CLK_BUS_SPI3 44 68*4882a593Smuzhiyun #define CLK_BUS_SATA 45 69*4882a593Smuzhiyun #define CLK_BUS_OTG 46 70*4882a593Smuzhiyun #define CLK_BUS_EHCI0 47 71*4882a593Smuzhiyun #define CLK_BUS_EHCI1 48 72*4882a593Smuzhiyun #define CLK_BUS_EHCI2 49 73*4882a593Smuzhiyun #define CLK_BUS_OHCI0 50 74*4882a593Smuzhiyun #define CLK_BUS_OHCI1 51 75*4882a593Smuzhiyun #define CLK_BUS_OHCI2 52 76*4882a593Smuzhiyun #define CLK_BUS_VE 53 77*4882a593Smuzhiyun #define CLK_BUS_MP 54 78*4882a593Smuzhiyun #define CLK_BUS_DEINTERLACE 55 79*4882a593Smuzhiyun #define CLK_BUS_CSI0 56 80*4882a593Smuzhiyun #define CLK_BUS_CSI1 57 81*4882a593Smuzhiyun #define CLK_BUS_HDMI1 58 82*4882a593Smuzhiyun #define CLK_BUS_HDMI0 59 83*4882a593Smuzhiyun #define CLK_BUS_DE 60 84*4882a593Smuzhiyun #define CLK_BUS_TVE0 61 85*4882a593Smuzhiyun #define CLK_BUS_TVE1 62 86*4882a593Smuzhiyun #define CLK_BUS_TVE_TOP 63 87*4882a593Smuzhiyun #define CLK_BUS_GMAC 64 88*4882a593Smuzhiyun #define CLK_BUS_GPU 65 89*4882a593Smuzhiyun #define CLK_BUS_TVD0 66 90*4882a593Smuzhiyun #define CLK_BUS_TVD1 67 91*4882a593Smuzhiyun #define CLK_BUS_TVD2 68 92*4882a593Smuzhiyun #define CLK_BUS_TVD3 69 93*4882a593Smuzhiyun #define CLK_BUS_TVD_TOP 70 94*4882a593Smuzhiyun #define CLK_BUS_TCON_LCD0 71 95*4882a593Smuzhiyun #define CLK_BUS_TCON_LCD1 72 96*4882a593Smuzhiyun #define CLK_BUS_TCON_TV0 73 97*4882a593Smuzhiyun #define CLK_BUS_TCON_TV1 74 98*4882a593Smuzhiyun #define CLK_BUS_TCON_TOP 75 99*4882a593Smuzhiyun #define CLK_BUS_CODEC 76 100*4882a593Smuzhiyun #define CLK_BUS_SPDIF 77 101*4882a593Smuzhiyun #define CLK_BUS_AC97 78 102*4882a593Smuzhiyun #define CLK_BUS_PIO 79 103*4882a593Smuzhiyun #define CLK_BUS_IR0 80 104*4882a593Smuzhiyun #define CLK_BUS_IR1 81 105*4882a593Smuzhiyun #define CLK_BUS_THS 82 106*4882a593Smuzhiyun #define CLK_BUS_KEYPAD 83 107*4882a593Smuzhiyun #define CLK_BUS_I2S0 84 108*4882a593Smuzhiyun #define CLK_BUS_I2S1 85 109*4882a593Smuzhiyun #define CLK_BUS_I2S2 86 110*4882a593Smuzhiyun #define CLK_BUS_I2C0 87 111*4882a593Smuzhiyun #define CLK_BUS_I2C1 88 112*4882a593Smuzhiyun #define CLK_BUS_I2C2 89 113*4882a593Smuzhiyun #define CLK_BUS_I2C3 90 114*4882a593Smuzhiyun #define CLK_BUS_CAN 91 115*4882a593Smuzhiyun #define CLK_BUS_SCR 92 116*4882a593Smuzhiyun #define CLK_BUS_PS20 93 117*4882a593Smuzhiyun #define CLK_BUS_PS21 94 118*4882a593Smuzhiyun #define CLK_BUS_I2C4 95 119*4882a593Smuzhiyun #define CLK_BUS_UART0 96 120*4882a593Smuzhiyun #define CLK_BUS_UART1 97 121*4882a593Smuzhiyun #define CLK_BUS_UART2 98 122*4882a593Smuzhiyun #define CLK_BUS_UART3 99 123*4882a593Smuzhiyun #define CLK_BUS_UART4 100 124*4882a593Smuzhiyun #define CLK_BUS_UART5 101 125*4882a593Smuzhiyun #define CLK_BUS_UART6 102 126*4882a593Smuzhiyun #define CLK_BUS_UART7 103 127*4882a593Smuzhiyun #define CLK_BUS_DBG 104 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun #define CLK_THS 105 130*4882a593Smuzhiyun #define CLK_NAND 106 131*4882a593Smuzhiyun #define CLK_MMC0 107 132*4882a593Smuzhiyun #define CLK_MMC1 108 133*4882a593Smuzhiyun #define CLK_MMC2 109 134*4882a593Smuzhiyun #define CLK_MMC3 110 135*4882a593Smuzhiyun #define CLK_TS 111 136*4882a593Smuzhiyun #define CLK_CE 112 137*4882a593Smuzhiyun #define CLK_SPI0 113 138*4882a593Smuzhiyun #define CLK_SPI1 114 139*4882a593Smuzhiyun #define CLK_SPI2 115 140*4882a593Smuzhiyun #define CLK_SPI3 116 141*4882a593Smuzhiyun #define CLK_I2S0 117 142*4882a593Smuzhiyun #define CLK_I2S1 118 143*4882a593Smuzhiyun #define CLK_I2S2 119 144*4882a593Smuzhiyun #define CLK_AC97 120 145*4882a593Smuzhiyun #define CLK_SPDIF 121 146*4882a593Smuzhiyun #define CLK_KEYPAD 122 147*4882a593Smuzhiyun #define CLK_SATA 123 148*4882a593Smuzhiyun #define CLK_USB_PHY0 124 149*4882a593Smuzhiyun #define CLK_USB_PHY1 125 150*4882a593Smuzhiyun #define CLK_USB_PHY2 126 151*4882a593Smuzhiyun #define CLK_USB_OHCI0 127 152*4882a593Smuzhiyun #define CLK_USB_OHCI1 128 153*4882a593Smuzhiyun #define CLK_USB_OHCI2 129 154*4882a593Smuzhiyun #define CLK_IR0 130 155*4882a593Smuzhiyun #define CLK_IR1 131 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun #define CLK_DRAM_VE 133 158*4882a593Smuzhiyun #define CLK_DRAM_CSI0 134 159*4882a593Smuzhiyun #define CLK_DRAM_CSI1 135 160*4882a593Smuzhiyun #define CLK_DRAM_TS 136 161*4882a593Smuzhiyun #define CLK_DRAM_TVD 137 162*4882a593Smuzhiyun #define CLK_DRAM_MP 138 163*4882a593Smuzhiyun #define CLK_DRAM_DEINTERLACE 139 164*4882a593Smuzhiyun #define CLK_DE 140 165*4882a593Smuzhiyun #define CLK_MP 141 166*4882a593Smuzhiyun #define CLK_TCON_LCD0 142 167*4882a593Smuzhiyun #define CLK_TCON_LCD1 143 168*4882a593Smuzhiyun #define CLK_TCON_TV0 144 169*4882a593Smuzhiyun #define CLK_TCON_TV1 145 170*4882a593Smuzhiyun #define CLK_DEINTERLACE 146 171*4882a593Smuzhiyun #define CLK_CSI1_MCLK 147 172*4882a593Smuzhiyun #define CLK_CSI_SCLK 148 173*4882a593Smuzhiyun #define CLK_CSI0_MCLK 149 174*4882a593Smuzhiyun #define CLK_VE 150 175*4882a593Smuzhiyun #define CLK_CODEC 151 176*4882a593Smuzhiyun #define CLK_AVS 152 177*4882a593Smuzhiyun #define CLK_HDMI 153 178*4882a593Smuzhiyun #define CLK_HDMI_SLOW 154 179*4882a593Smuzhiyun #define CLK_MBUS 155 180*4882a593Smuzhiyun #define CLK_DSI_DPHY 156 181*4882a593Smuzhiyun #define CLK_TVE0 157 182*4882a593Smuzhiyun #define CLK_TVE1 158 183*4882a593Smuzhiyun #define CLK_TVD0 159 184*4882a593Smuzhiyun #define CLK_TVD1 160 185*4882a593Smuzhiyun #define CLK_TVD2 161 186*4882a593Smuzhiyun #define CLK_TVD3 162 187*4882a593Smuzhiyun #define CLK_GPU 163 188*4882a593Smuzhiyun #define CLK_OUTA 164 189*4882a593Smuzhiyun #define CLK_OUTB 165 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun #endif /* _DT_BINDINGS_CLK_SUN8I_R40_H_ */ 192