1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 7*4882a593Smuzhiyun * whole. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 11*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 12*4882a593Smuzhiyun * License, or (at your option) any later version. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 15*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*4882a593Smuzhiyun * GNU General Public License for more details. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * Or, alternatively, 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 22*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 23*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 24*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 25*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 26*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 27*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 28*4882a593Smuzhiyun * conditions: 29*4882a593Smuzhiyun * 30*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 31*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLK_SUN8I_A23_A33_H_ 44*4882a593Smuzhiyun #define _DT_BINDINGS_CLK_SUN8I_A23_A33_H_ 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #define CLK_PLL_MIPI 13 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define CLK_CPUX 18 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define CLK_BUS_MIPI_DSI 23 51*4882a593Smuzhiyun #define CLK_BUS_SS 24 52*4882a593Smuzhiyun #define CLK_BUS_DMA 25 53*4882a593Smuzhiyun #define CLK_BUS_MMC0 26 54*4882a593Smuzhiyun #define CLK_BUS_MMC1 27 55*4882a593Smuzhiyun #define CLK_BUS_MMC2 28 56*4882a593Smuzhiyun #define CLK_BUS_NAND 29 57*4882a593Smuzhiyun #define CLK_BUS_DRAM 30 58*4882a593Smuzhiyun #define CLK_BUS_HSTIMER 31 59*4882a593Smuzhiyun #define CLK_BUS_SPI0 32 60*4882a593Smuzhiyun #define CLK_BUS_SPI1 33 61*4882a593Smuzhiyun #define CLK_BUS_OTG 34 62*4882a593Smuzhiyun #define CLK_BUS_EHCI 35 63*4882a593Smuzhiyun #define CLK_BUS_OHCI 36 64*4882a593Smuzhiyun #define CLK_BUS_VE 37 65*4882a593Smuzhiyun #define CLK_BUS_LCD 38 66*4882a593Smuzhiyun #define CLK_BUS_CSI 39 67*4882a593Smuzhiyun #define CLK_BUS_DE_BE 40 68*4882a593Smuzhiyun #define CLK_BUS_DE_FE 41 69*4882a593Smuzhiyun #define CLK_BUS_GPU 42 70*4882a593Smuzhiyun #define CLK_BUS_MSGBOX 43 71*4882a593Smuzhiyun #define CLK_BUS_SPINLOCK 44 72*4882a593Smuzhiyun #define CLK_BUS_DRC 45 73*4882a593Smuzhiyun #define CLK_BUS_SAT 46 74*4882a593Smuzhiyun #define CLK_BUS_CODEC 47 75*4882a593Smuzhiyun #define CLK_BUS_PIO 48 76*4882a593Smuzhiyun #define CLK_BUS_I2S0 49 77*4882a593Smuzhiyun #define CLK_BUS_I2S1 50 78*4882a593Smuzhiyun #define CLK_BUS_I2C0 51 79*4882a593Smuzhiyun #define CLK_BUS_I2C1 52 80*4882a593Smuzhiyun #define CLK_BUS_I2C2 53 81*4882a593Smuzhiyun #define CLK_BUS_UART0 54 82*4882a593Smuzhiyun #define CLK_BUS_UART1 55 83*4882a593Smuzhiyun #define CLK_BUS_UART2 56 84*4882a593Smuzhiyun #define CLK_BUS_UART3 57 85*4882a593Smuzhiyun #define CLK_BUS_UART4 58 86*4882a593Smuzhiyun #define CLK_NAND 59 87*4882a593Smuzhiyun #define CLK_MMC0 60 88*4882a593Smuzhiyun #define CLK_MMC0_SAMPLE 61 89*4882a593Smuzhiyun #define CLK_MMC0_OUTPUT 62 90*4882a593Smuzhiyun #define CLK_MMC1 63 91*4882a593Smuzhiyun #define CLK_MMC1_SAMPLE 64 92*4882a593Smuzhiyun #define CLK_MMC1_OUTPUT 65 93*4882a593Smuzhiyun #define CLK_MMC2 66 94*4882a593Smuzhiyun #define CLK_MMC2_SAMPLE 67 95*4882a593Smuzhiyun #define CLK_MMC2_OUTPUT 68 96*4882a593Smuzhiyun #define CLK_SS 69 97*4882a593Smuzhiyun #define CLK_SPI0 70 98*4882a593Smuzhiyun #define CLK_SPI1 71 99*4882a593Smuzhiyun #define CLK_I2S0 72 100*4882a593Smuzhiyun #define CLK_I2S1 73 101*4882a593Smuzhiyun #define CLK_USB_PHY0 74 102*4882a593Smuzhiyun #define CLK_USB_PHY1 75 103*4882a593Smuzhiyun #define CLK_USB_HSIC 76 104*4882a593Smuzhiyun #define CLK_USB_HSIC_12M 77 105*4882a593Smuzhiyun #define CLK_USB_OHCI 78 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun #define CLK_DRAM_VE 80 108*4882a593Smuzhiyun #define CLK_DRAM_CSI 81 109*4882a593Smuzhiyun #define CLK_DRAM_DRC 82 110*4882a593Smuzhiyun #define CLK_DRAM_DE_FE 83 111*4882a593Smuzhiyun #define CLK_DRAM_DE_BE 84 112*4882a593Smuzhiyun #define CLK_DE_BE 85 113*4882a593Smuzhiyun #define CLK_DE_FE 86 114*4882a593Smuzhiyun #define CLK_LCD_CH0 87 115*4882a593Smuzhiyun #define CLK_LCD_CH1 88 116*4882a593Smuzhiyun #define CLK_CSI_SCLK 89 117*4882a593Smuzhiyun #define CLK_CSI_MCLK 90 118*4882a593Smuzhiyun #define CLK_VE 91 119*4882a593Smuzhiyun #define CLK_AC_DIG 92 120*4882a593Smuzhiyun #define CLK_AC_DIG_4X 93 121*4882a593Smuzhiyun #define CLK_AVS 94 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun #define CLK_DSI_SCLK 96 124*4882a593Smuzhiyun #define CLK_DSI_DPHY 97 125*4882a593Smuzhiyun #define CLK_DRC 98 126*4882a593Smuzhiyun #define CLK_GPU 99 127*4882a593Smuzhiyun #define CLK_ATS 100 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun #endif /* _DT_BINDINGS_CLK_SUN8I_A23_A33_H_ */ 130