1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 7*4882a593Smuzhiyun * whole. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 11*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 12*4882a593Smuzhiyun * License, or (at your option) any later version. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 15*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*4882a593Smuzhiyun * GNU General Public License for more details. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * Or, alternatively, 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 22*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 23*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 24*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 25*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 26*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 27*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 28*4882a593Smuzhiyun * conditions: 29*4882a593Smuzhiyun * 30*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 31*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLK_SUN6I_A31_H_ 44*4882a593Smuzhiyun #define _DT_BINDINGS_CLK_SUN6I_A31_H_ 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #define CLK_PLL_VIDEO0_2X 7 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define CLK_PLL_PERIPH 10 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define CLK_PLL_VIDEO1_2X 13 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define CLK_PLL_MIPI 15 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #define CLK_CPU 18 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #define CLK_AHB1_MIPIDSI 23 57*4882a593Smuzhiyun #define CLK_AHB1_SS 24 58*4882a593Smuzhiyun #define CLK_AHB1_DMA 25 59*4882a593Smuzhiyun #define CLK_AHB1_MMC0 26 60*4882a593Smuzhiyun #define CLK_AHB1_MMC1 27 61*4882a593Smuzhiyun #define CLK_AHB1_MMC2 28 62*4882a593Smuzhiyun #define CLK_AHB1_MMC3 29 63*4882a593Smuzhiyun #define CLK_AHB1_NAND1 30 64*4882a593Smuzhiyun #define CLK_AHB1_NAND0 31 65*4882a593Smuzhiyun #define CLK_AHB1_SDRAM 32 66*4882a593Smuzhiyun #define CLK_AHB1_EMAC 33 67*4882a593Smuzhiyun #define CLK_AHB1_TS 34 68*4882a593Smuzhiyun #define CLK_AHB1_HSTIMER 35 69*4882a593Smuzhiyun #define CLK_AHB1_SPI0 36 70*4882a593Smuzhiyun #define CLK_AHB1_SPI1 37 71*4882a593Smuzhiyun #define CLK_AHB1_SPI2 38 72*4882a593Smuzhiyun #define CLK_AHB1_SPI3 39 73*4882a593Smuzhiyun #define CLK_AHB1_OTG 40 74*4882a593Smuzhiyun #define CLK_AHB1_EHCI0 41 75*4882a593Smuzhiyun #define CLK_AHB1_EHCI1 42 76*4882a593Smuzhiyun #define CLK_AHB1_OHCI0 43 77*4882a593Smuzhiyun #define CLK_AHB1_OHCI1 44 78*4882a593Smuzhiyun #define CLK_AHB1_OHCI2 45 79*4882a593Smuzhiyun #define CLK_AHB1_VE 46 80*4882a593Smuzhiyun #define CLK_AHB1_LCD0 47 81*4882a593Smuzhiyun #define CLK_AHB1_LCD1 48 82*4882a593Smuzhiyun #define CLK_AHB1_CSI 49 83*4882a593Smuzhiyun #define CLK_AHB1_HDMI 50 84*4882a593Smuzhiyun #define CLK_AHB1_BE0 51 85*4882a593Smuzhiyun #define CLK_AHB1_BE1 52 86*4882a593Smuzhiyun #define CLK_AHB1_FE0 53 87*4882a593Smuzhiyun #define CLK_AHB1_FE1 54 88*4882a593Smuzhiyun #define CLK_AHB1_MP 55 89*4882a593Smuzhiyun #define CLK_AHB1_GPU 56 90*4882a593Smuzhiyun #define CLK_AHB1_DEU0 57 91*4882a593Smuzhiyun #define CLK_AHB1_DEU1 58 92*4882a593Smuzhiyun #define CLK_AHB1_DRC0 59 93*4882a593Smuzhiyun #define CLK_AHB1_DRC1 60 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #define CLK_APB1_CODEC 61 96*4882a593Smuzhiyun #define CLK_APB1_SPDIF 62 97*4882a593Smuzhiyun #define CLK_APB1_DIGITAL_MIC 63 98*4882a593Smuzhiyun #define CLK_APB1_PIO 64 99*4882a593Smuzhiyun #define CLK_APB1_DAUDIO0 65 100*4882a593Smuzhiyun #define CLK_APB1_DAUDIO1 66 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun #define CLK_APB2_I2C0 67 103*4882a593Smuzhiyun #define CLK_APB2_I2C1 68 104*4882a593Smuzhiyun #define CLK_APB2_I2C2 69 105*4882a593Smuzhiyun #define CLK_APB2_I2C3 70 106*4882a593Smuzhiyun #define CLK_APB2_UART0 71 107*4882a593Smuzhiyun #define CLK_APB2_UART1 72 108*4882a593Smuzhiyun #define CLK_APB2_UART2 73 109*4882a593Smuzhiyun #define CLK_APB2_UART3 74 110*4882a593Smuzhiyun #define CLK_APB2_UART4 75 111*4882a593Smuzhiyun #define CLK_APB2_UART5 76 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun #define CLK_NAND0 77 114*4882a593Smuzhiyun #define CLK_NAND1 78 115*4882a593Smuzhiyun #define CLK_MMC0 79 116*4882a593Smuzhiyun #define CLK_MMC0_SAMPLE 80 117*4882a593Smuzhiyun #define CLK_MMC0_OUTPUT 81 118*4882a593Smuzhiyun #define CLK_MMC1 82 119*4882a593Smuzhiyun #define CLK_MMC1_SAMPLE 83 120*4882a593Smuzhiyun #define CLK_MMC1_OUTPUT 84 121*4882a593Smuzhiyun #define CLK_MMC2 85 122*4882a593Smuzhiyun #define CLK_MMC2_SAMPLE 86 123*4882a593Smuzhiyun #define CLK_MMC2_OUTPUT 87 124*4882a593Smuzhiyun #define CLK_MMC3 88 125*4882a593Smuzhiyun #define CLK_MMC3_SAMPLE 89 126*4882a593Smuzhiyun #define CLK_MMC3_OUTPUT 90 127*4882a593Smuzhiyun #define CLK_TS 91 128*4882a593Smuzhiyun #define CLK_SS 92 129*4882a593Smuzhiyun #define CLK_SPI0 93 130*4882a593Smuzhiyun #define CLK_SPI1 94 131*4882a593Smuzhiyun #define CLK_SPI2 95 132*4882a593Smuzhiyun #define CLK_SPI3 96 133*4882a593Smuzhiyun #define CLK_DAUDIO0 97 134*4882a593Smuzhiyun #define CLK_DAUDIO1 98 135*4882a593Smuzhiyun #define CLK_SPDIF 99 136*4882a593Smuzhiyun #define CLK_USB_PHY0 100 137*4882a593Smuzhiyun #define CLK_USB_PHY1 101 138*4882a593Smuzhiyun #define CLK_USB_PHY2 102 139*4882a593Smuzhiyun #define CLK_USB_OHCI0 103 140*4882a593Smuzhiyun #define CLK_USB_OHCI1 104 141*4882a593Smuzhiyun #define CLK_USB_OHCI2 105 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun #define CLK_DRAM_VE 110 144*4882a593Smuzhiyun #define CLK_DRAM_CSI_ISP 111 145*4882a593Smuzhiyun #define CLK_DRAM_TS 112 146*4882a593Smuzhiyun #define CLK_DRAM_DRC0 113 147*4882a593Smuzhiyun #define CLK_DRAM_DRC1 114 148*4882a593Smuzhiyun #define CLK_DRAM_DEU0 115 149*4882a593Smuzhiyun #define CLK_DRAM_DEU1 116 150*4882a593Smuzhiyun #define CLK_DRAM_FE0 117 151*4882a593Smuzhiyun #define CLK_DRAM_FE1 118 152*4882a593Smuzhiyun #define CLK_DRAM_BE0 119 153*4882a593Smuzhiyun #define CLK_DRAM_BE1 120 154*4882a593Smuzhiyun #define CLK_DRAM_MP 121 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun #define CLK_BE0 122 157*4882a593Smuzhiyun #define CLK_BE1 123 158*4882a593Smuzhiyun #define CLK_FE0 124 159*4882a593Smuzhiyun #define CLK_FE1 125 160*4882a593Smuzhiyun #define CLK_MP 126 161*4882a593Smuzhiyun #define CLK_LCD0_CH0 127 162*4882a593Smuzhiyun #define CLK_LCD1_CH0 128 163*4882a593Smuzhiyun #define CLK_LCD0_CH1 129 164*4882a593Smuzhiyun #define CLK_LCD1_CH1 130 165*4882a593Smuzhiyun #define CLK_CSI0_SCLK 131 166*4882a593Smuzhiyun #define CLK_CSI0_MCLK 132 167*4882a593Smuzhiyun #define CLK_CSI1_MCLK 133 168*4882a593Smuzhiyun #define CLK_VE 134 169*4882a593Smuzhiyun #define CLK_CODEC 135 170*4882a593Smuzhiyun #define CLK_AVS 136 171*4882a593Smuzhiyun #define CLK_DIGITAL_MIC 137 172*4882a593Smuzhiyun #define CLK_HDMI 138 173*4882a593Smuzhiyun #define CLK_HDMI_DDC 139 174*4882a593Smuzhiyun #define CLK_PS 140 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun #define CLK_MIPI_DSI 143 177*4882a593Smuzhiyun #define CLK_MIPI_DSI_DPHY 144 178*4882a593Smuzhiyun #define CLK_MIPI_CSI_DPHY 145 179*4882a593Smuzhiyun #define CLK_IEP_DRC0 146 180*4882a593Smuzhiyun #define CLK_IEP_DRC1 147 181*4882a593Smuzhiyun #define CLK_IEP_DEU0 148 182*4882a593Smuzhiyun #define CLK_IEP_DEU1 149 183*4882a593Smuzhiyun #define CLK_GPU_CORE 150 184*4882a593Smuzhiyun #define CLK_GPU_MEMORY 151 185*4882a593Smuzhiyun #define CLK_GPU_HYD 152 186*4882a593Smuzhiyun #define CLK_ATS 153 187*4882a593Smuzhiyun #define CLK_TRACE 154 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun #define CLK_OUT_A 155 190*4882a593Smuzhiyun #define CLK_OUT_B 156 191*4882a593Smuzhiyun #define CLK_OUT_C 157 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun #endif /* _DT_BINDINGS_CLK_SUN6I_A31_H_ */ 194