1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2014 MundoReader S.L. 4*4882a593Smuzhiyun * Author: Heiko Stuebner <heiko@sntech.de> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H 8*4882a593Smuzhiyun #define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <dt-bindings/clock/rk3188-cru-common.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* soft-reset indices */ 13*4882a593Smuzhiyun #define SRST_PTM_CORE2 0 14*4882a593Smuzhiyun #define SRST_PTM_CORE3 1 15*4882a593Smuzhiyun #define SRST_CORE2 5 16*4882a593Smuzhiyun #define SRST_CORE3 6 17*4882a593Smuzhiyun #define SRST_CORE2_DBG 10 18*4882a593Smuzhiyun #define SRST_CORE3_DBG 11 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define SRST_TIMER2 16 21*4882a593Smuzhiyun #define SRST_TIMER4 23 22*4882a593Smuzhiyun #define SRST_I2S0 24 23*4882a593Smuzhiyun #define SRST_TIMER5 25 24*4882a593Smuzhiyun #define SRST_TIMER3 29 25*4882a593Smuzhiyun #define SRST_TIMER6 31 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define SRST_PTM3 36 28*4882a593Smuzhiyun #define SRST_PTM3_ATB 37 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define SRST_GPS 67 31*4882a593Smuzhiyun #define SRST_HSICPHY 75 32*4882a593Smuzhiyun #define SRST_TIMER 78 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define SRST_PTM2 92 35*4882a593Smuzhiyun #define SRST_CORE2_WDT 94 36*4882a593Smuzhiyun #define SRST_CORE3_WDT 95 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define SRST_PTM2_ATB 111 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define SRST_HSIC 117 41*4882a593Smuzhiyun #define SRST_CTI2 118 42*4882a593Smuzhiyun #define SRST_CTI2_APB 119 43*4882a593Smuzhiyun #define SRST_GPU_BRIDGE 121 44*4882a593Smuzhiyun #define SRST_CTI3 123 45*4882a593Smuzhiyun #define SRST_CTI3_APB 124 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #endif 48