1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright (C) 2015 Renesas Electronics Corp. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun #ifndef __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ 6*4882a593Smuzhiyun #define __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #define CPG_CORE 0 /* Core Clock */ 9*4882a593Smuzhiyun #define CPG_MOD 1 /* Module Clock */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #endif /* __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ */ 12