1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2018, The Linux Foundation. All rights reserved. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLK_SDM_GPU_CC_SDM845_H 7*4882a593Smuzhiyun #define _DT_BINDINGS_CLK_SDM_GPU_CC_SDM845_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun /* GPU_CC clock registers */ 10*4882a593Smuzhiyun #define GPU_CC_CX_GMU_CLK 0 11*4882a593Smuzhiyun #define GPU_CC_CXO_CLK 1 12*4882a593Smuzhiyun #define GPU_CC_GMU_CLK_SRC 2 13*4882a593Smuzhiyun #define GPU_CC_PLL1 3 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* GPU_CC Resets */ 16*4882a593Smuzhiyun #define GPUCC_GPU_CC_CX_BCR 0 17*4882a593Smuzhiyun #define GPUCC_GPU_CC_GMU_BCR 1 18*4882a593Smuzhiyun #define GPUCC_GPU_CC_XO_BCR 2 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* GPU_CC GDSCRs */ 21*4882a593Smuzhiyun #define GPU_CX_GDSC 0 22*4882a593Smuzhiyun #define GPU_GX_GDSC 1 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #endif 25