1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2014, The Linux Foundation. All rights reserved. 4*4882a593Smuzhiyun * Copyright (c) BayLibre, SAS. 5*4882a593Smuzhiyun * Author : Neil Armstrong <narmstrong@baylibre.com> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLK_LCC_MDM9615_H 9*4882a593Smuzhiyun #define _DT_BINDINGS_CLK_LCC_MDM9615_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #define PLL4 0 12*4882a593Smuzhiyun #define MI2S_OSR_SRC 1 13*4882a593Smuzhiyun #define MI2S_OSR_CLK 2 14*4882a593Smuzhiyun #define MI2S_DIV_CLK 3 15*4882a593Smuzhiyun #define MI2S_BIT_DIV_CLK 4 16*4882a593Smuzhiyun #define MI2S_BIT_CLK 5 17*4882a593Smuzhiyun #define PCM_SRC 6 18*4882a593Smuzhiyun #define PCM_CLK_OUT 7 19*4882a593Smuzhiyun #define PCM_CLK 8 20*4882a593Smuzhiyun #define SLIMBUS_SRC 9 21*4882a593Smuzhiyun #define AUDIO_SLIMBUS_CLK 10 22*4882a593Smuzhiyun #define SPS_SLIMBUS_CLK 11 23*4882a593Smuzhiyun #define CODEC_I2S_MIC_OSR_SRC 12 24*4882a593Smuzhiyun #define CODEC_I2S_MIC_OSR_CLK 13 25*4882a593Smuzhiyun #define CODEC_I2S_MIC_DIV_CLK 14 26*4882a593Smuzhiyun #define CODEC_I2S_MIC_BIT_DIV_CLK 15 27*4882a593Smuzhiyun #define CODEC_I2S_MIC_BIT_CLK 16 28*4882a593Smuzhiyun #define SPARE_I2S_MIC_OSR_SRC 17 29*4882a593Smuzhiyun #define SPARE_I2S_MIC_OSR_CLK 18 30*4882a593Smuzhiyun #define SPARE_I2S_MIC_DIV_CLK 19 31*4882a593Smuzhiyun #define SPARE_I2S_MIC_BIT_DIV_CLK 20 32*4882a593Smuzhiyun #define SPARE_I2S_MIC_BIT_CLK 21 33*4882a593Smuzhiyun #define CODEC_I2S_SPKR_OSR_SRC 22 34*4882a593Smuzhiyun #define CODEC_I2S_SPKR_OSR_CLK 23 35*4882a593Smuzhiyun #define CODEC_I2S_SPKR_DIV_CLK 24 36*4882a593Smuzhiyun #define CODEC_I2S_SPKR_BIT_DIV_CLK 25 37*4882a593Smuzhiyun #define CODEC_I2S_SPKR_BIT_CLK 26 38*4882a593Smuzhiyun #define SPARE_I2S_SPKR_OSR_SRC 27 39*4882a593Smuzhiyun #define SPARE_I2S_SPKR_OSR_CLK 28 40*4882a593Smuzhiyun #define SPARE_I2S_SPKR_DIV_CLK 29 41*4882a593Smuzhiyun #define SPARE_I2S_SPKR_BIT_DIV_CLK 30 42*4882a593Smuzhiyun #define SPARE_I2S_SPKR_BIT_CLK 31 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #endif 45