1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Device Tree binding constants clocks for the Maxim 77620 PMIC. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLOCK_MAXIM_MAX77620_CLOCK_H 9*4882a593Smuzhiyun #define _DT_BINDINGS_CLOCK_MAXIM_MAX77620_CLOCK_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* Fixed rate clocks. */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define MAX77620_CLK_32K_OUT0 0 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* Total number of clocks. */ 16*4882a593Smuzhiyun #define MAX77620_CLKS_NUM (MAX77620_CLK_32K_OUT0 + 1) 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #endif /* _DT_BINDINGS_CLOCK_MAXIM_MAX77620_CLOCK_H */ 19