1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2016 BayLibre, SAS 4*4882a593Smuzhiyun * Author: Neil Armstrong <narmstrong@baylibre.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (c) 2018 Amlogic, inc. 7*4882a593Smuzhiyun * Author: Qiufang Dai <qiufang.dai@amlogic.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_G12A_AOCLK 11*4882a593Smuzhiyun #define DT_BINDINGS_CLOCK_AMLOGIC_MESON_G12A_AOCLK 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define CLKID_AO_AHB 0 14*4882a593Smuzhiyun #define CLKID_AO_IR_IN 1 15*4882a593Smuzhiyun #define CLKID_AO_I2C_M0 2 16*4882a593Smuzhiyun #define CLKID_AO_I2C_S0 3 17*4882a593Smuzhiyun #define CLKID_AO_UART 4 18*4882a593Smuzhiyun #define CLKID_AO_PROD_I2C 5 19*4882a593Smuzhiyun #define CLKID_AO_UART2 6 20*4882a593Smuzhiyun #define CLKID_AO_IR_OUT 7 21*4882a593Smuzhiyun #define CLKID_AO_SAR_ADC 8 22*4882a593Smuzhiyun #define CLKID_AO_MAILBOX 9 23*4882a593Smuzhiyun #define CLKID_AO_M3 10 24*4882a593Smuzhiyun #define CLKID_AO_AHB_SRAM 11 25*4882a593Smuzhiyun #define CLKID_AO_RTI 12 26*4882a593Smuzhiyun #define CLKID_AO_M4_FCLK 13 27*4882a593Smuzhiyun #define CLKID_AO_M4_HCLK 14 28*4882a593Smuzhiyun #define CLKID_AO_CLK81 15 29*4882a593Smuzhiyun #define CLKID_AO_SAR_ADC_SEL 16 30*4882a593Smuzhiyun #define CLKID_AO_SAR_ADC_CLK 18 31*4882a593Smuzhiyun #define CLKID_AO_CTS_OSCIN 19 32*4882a593Smuzhiyun #define CLKID_AO_32K 23 33*4882a593Smuzhiyun #define CLKID_AO_CEC 27 34*4882a593Smuzhiyun #define CLKID_AO_CTS_RTC_OSCIN 28 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #endif 37