1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * This header provides constants for Samsung audio subsystem 4*4882a593Smuzhiyun * clock controller. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * The constants defined in this header are being used in dts 7*4882a593Smuzhiyun * and exynos audss driver. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLK_EXYNOS_AUDSS_H 11*4882a593Smuzhiyun #define _DT_BINDINGS_CLK_EXYNOS_AUDSS_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define EXYNOS_MOUT_AUDSS 0 14*4882a593Smuzhiyun #define EXYNOS_MOUT_I2S 1 15*4882a593Smuzhiyun #define EXYNOS_DOUT_SRP 2 16*4882a593Smuzhiyun #define EXYNOS_DOUT_AUD_BUS 3 17*4882a593Smuzhiyun #define EXYNOS_DOUT_I2S 4 18*4882a593Smuzhiyun #define EXYNOS_SRP_CLK 5 19*4882a593Smuzhiyun #define EXYNOS_I2S_BUS 6 20*4882a593Smuzhiyun #define EXYNOS_SCLK_I2S 7 21*4882a593Smuzhiyun #define EXYNOS_PCM_BUS 8 22*4882a593Smuzhiyun #define EXYNOS_SCLK_PCM 9 23*4882a593Smuzhiyun #define EXYNOS_ADMA 10 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define EXYNOS_AUDSS_MAX_CLKS 11 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #endif 28