1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun /* This file defines field values used by the versaclock 6 family 4*4882a593Smuzhiyun * for defining output type 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define VC5_LVPECL 0 8*4882a593Smuzhiyun #define VC5_CMOS 1 9*4882a593Smuzhiyun #define VC5_HCSL33 2 10*4882a593Smuzhiyun #define VC5_LVDS 3 11*4882a593Smuzhiyun #define VC5_CMOS2 4 12*4882a593Smuzhiyun #define VC5_CMOSD 5 13*4882a593Smuzhiyun #define VC5_HCSL25 6 14