1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Common header for intel-gtt.ko and i915.ko */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef _DRM_INTEL_GTT_H 5*4882a593Smuzhiyun #define _DRM_INTEL_GTT_H 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <linux/agp_backend.h> 8*4882a593Smuzhiyun #include <linux/intel-iommu.h> 9*4882a593Smuzhiyun #include <linux/kernel.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun void intel_gtt_get(u64 *gtt_total, 12*4882a593Smuzhiyun phys_addr_t *mappable_base, 13*4882a593Smuzhiyun resource_size_t *mappable_end); 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, 16*4882a593Smuzhiyun struct agp_bridge_data *bridge); 17*4882a593Smuzhiyun void intel_gmch_remove(void); 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun bool intel_enable_gtt(void); 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun void intel_gtt_chipset_flush(void); 22*4882a593Smuzhiyun void intel_gtt_insert_page(dma_addr_t addr, 23*4882a593Smuzhiyun unsigned int pg, 24*4882a593Smuzhiyun unsigned int flags); 25*4882a593Smuzhiyun void intel_gtt_insert_sg_entries(struct sg_table *st, 26*4882a593Smuzhiyun unsigned int pg_start, 27*4882a593Smuzhiyun unsigned int flags); 28*4882a593Smuzhiyun void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries); 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* Special gtt memory types */ 31*4882a593Smuzhiyun #define AGP_DCACHE_MEMORY 1 32*4882a593Smuzhiyun #define AGP_PHYS_MEMORY 2 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* flag for GFDT type */ 35*4882a593Smuzhiyun #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #endif 38