xref: /OK3568_Linux_fs/kernel/include/drm/drm_modes.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright © 2006 Keith Packard
3*4882a593Smuzhiyun  * Copyright © 2007-2008 Dave Airlie
4*4882a593Smuzhiyun  * Copyright © 2007-2008 Intel Corporation
5*4882a593Smuzhiyun  *   Jesse Barnes <jesse.barnes@intel.com>
6*4882a593Smuzhiyun  * Copyright © 2014 Intel Corporation
7*4882a593Smuzhiyun  *   Daniel Vetter <daniel.vetter@ffwll.ch>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
10*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
11*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
12*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
14*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * The above copyright notice and this permission notice shall be included in
17*4882a593Smuzhiyun  * all copies or substantial portions of the Software.
18*4882a593Smuzhiyun  *
19*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
22*4882a593Smuzhiyun  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25*4882a593Smuzhiyun  * OTHER DEALINGS IN THE SOFTWARE.
26*4882a593Smuzhiyun  */
27*4882a593Smuzhiyun #ifndef __DRM_MODES_H__
28*4882a593Smuzhiyun #define __DRM_MODES_H__
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include <linux/hdmi.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #include <drm/drm_mode_object.h>
33*4882a593Smuzhiyun #include <drm/drm_connector.h>
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun struct videomode;
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun  * Note on terminology:  here, for brevity and convenience, we refer to connector
39*4882a593Smuzhiyun  * control chips as 'CRTCs'.  They can control any type of connector, VGA, LVDS,
40*4882a593Smuzhiyun  * DVI, etc.  And 'screen' refers to the whole of the visible display, which
41*4882a593Smuzhiyun  * may span multiple monitors (and therefore multiple CRTC and connector
42*4882a593Smuzhiyun  * structures).
43*4882a593Smuzhiyun  */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /**
46*4882a593Smuzhiyun  * enum drm_mode_status - hardware support status of a mode
47*4882a593Smuzhiyun  * @MODE_OK: Mode OK
48*4882a593Smuzhiyun  * @MODE_HSYNC: hsync out of range
49*4882a593Smuzhiyun  * @MODE_VSYNC: vsync out of range
50*4882a593Smuzhiyun  * @MODE_H_ILLEGAL: mode has illegal horizontal timings
51*4882a593Smuzhiyun  * @MODE_V_ILLEGAL: mode has illegal vertical timings
52*4882a593Smuzhiyun  * @MODE_BAD_WIDTH: requires an unsupported linepitch
53*4882a593Smuzhiyun  * @MODE_NOMODE: no mode with a matching name
54*4882a593Smuzhiyun  * @MODE_NO_INTERLACE: interlaced mode not supported
55*4882a593Smuzhiyun  * @MODE_NO_DBLESCAN: doublescan mode not supported
56*4882a593Smuzhiyun  * @MODE_NO_VSCAN: multiscan mode not supported
57*4882a593Smuzhiyun  * @MODE_MEM: insufficient video memory
58*4882a593Smuzhiyun  * @MODE_VIRTUAL_X: mode width too large for specified virtual size
59*4882a593Smuzhiyun  * @MODE_VIRTUAL_Y: mode height too large for specified virtual size
60*4882a593Smuzhiyun  * @MODE_MEM_VIRT: insufficient video memory given virtual size
61*4882a593Smuzhiyun  * @MODE_NOCLOCK: no fixed clock available
62*4882a593Smuzhiyun  * @MODE_CLOCK_HIGH: clock required is too high
63*4882a593Smuzhiyun  * @MODE_CLOCK_LOW: clock required is too low
64*4882a593Smuzhiyun  * @MODE_CLOCK_RANGE: clock/mode isn't in a ClockRange
65*4882a593Smuzhiyun  * @MODE_BAD_HVALUE: horizontal timing was out of range
66*4882a593Smuzhiyun  * @MODE_BAD_VVALUE: vertical timing was out of range
67*4882a593Smuzhiyun  * @MODE_BAD_VSCAN: VScan value out of range
68*4882a593Smuzhiyun  * @MODE_HSYNC_NARROW: horizontal sync too narrow
69*4882a593Smuzhiyun  * @MODE_HSYNC_WIDE: horizontal sync too wide
70*4882a593Smuzhiyun  * @MODE_HBLANK_NARROW: horizontal blanking too narrow
71*4882a593Smuzhiyun  * @MODE_HBLANK_WIDE: horizontal blanking too wide
72*4882a593Smuzhiyun  * @MODE_VSYNC_NARROW: vertical sync too narrow
73*4882a593Smuzhiyun  * @MODE_VSYNC_WIDE: vertical sync too wide
74*4882a593Smuzhiyun  * @MODE_VBLANK_NARROW: vertical blanking too narrow
75*4882a593Smuzhiyun  * @MODE_VBLANK_WIDE: vertical blanking too wide
76*4882a593Smuzhiyun  * @MODE_PANEL: exceeds panel dimensions
77*4882a593Smuzhiyun  * @MODE_INTERLACE_WIDTH: width too large for interlaced mode
78*4882a593Smuzhiyun  * @MODE_ONE_WIDTH: only one width is supported
79*4882a593Smuzhiyun  * @MODE_ONE_HEIGHT: only one height is supported
80*4882a593Smuzhiyun  * @MODE_ONE_SIZE: only one resolution is supported
81*4882a593Smuzhiyun  * @MODE_NO_REDUCED: monitor doesn't accept reduced blanking
82*4882a593Smuzhiyun  * @MODE_NO_STEREO: stereo modes not supported
83*4882a593Smuzhiyun  * @MODE_NO_420: ycbcr 420 modes not supported
84*4882a593Smuzhiyun  * @MODE_STALE: mode has become stale
85*4882a593Smuzhiyun  * @MODE_BAD: unspecified reason
86*4882a593Smuzhiyun  * @MODE_ERROR: error condition
87*4882a593Smuzhiyun  *
88*4882a593Smuzhiyun  * This enum is used to filter out modes not supported by the driver/hardware
89*4882a593Smuzhiyun  * combination.
90*4882a593Smuzhiyun  */
91*4882a593Smuzhiyun enum drm_mode_status {
92*4882a593Smuzhiyun 	MODE_OK = 0,
93*4882a593Smuzhiyun 	MODE_HSYNC,
94*4882a593Smuzhiyun 	MODE_VSYNC,
95*4882a593Smuzhiyun 	MODE_H_ILLEGAL,
96*4882a593Smuzhiyun 	MODE_V_ILLEGAL,
97*4882a593Smuzhiyun 	MODE_BAD_WIDTH,
98*4882a593Smuzhiyun 	MODE_NOMODE,
99*4882a593Smuzhiyun 	MODE_NO_INTERLACE,
100*4882a593Smuzhiyun 	MODE_NO_DBLESCAN,
101*4882a593Smuzhiyun 	MODE_NO_VSCAN,
102*4882a593Smuzhiyun 	MODE_MEM,
103*4882a593Smuzhiyun 	MODE_VIRTUAL_X,
104*4882a593Smuzhiyun 	MODE_VIRTUAL_Y,
105*4882a593Smuzhiyun 	MODE_MEM_VIRT,
106*4882a593Smuzhiyun 	MODE_NOCLOCK,
107*4882a593Smuzhiyun 	MODE_CLOCK_HIGH,
108*4882a593Smuzhiyun 	MODE_CLOCK_LOW,
109*4882a593Smuzhiyun 	MODE_CLOCK_RANGE,
110*4882a593Smuzhiyun 	MODE_BAD_HVALUE,
111*4882a593Smuzhiyun 	MODE_BAD_VVALUE,
112*4882a593Smuzhiyun 	MODE_BAD_VSCAN,
113*4882a593Smuzhiyun 	MODE_HSYNC_NARROW,
114*4882a593Smuzhiyun 	MODE_HSYNC_WIDE,
115*4882a593Smuzhiyun 	MODE_HBLANK_NARROW,
116*4882a593Smuzhiyun 	MODE_HBLANK_WIDE,
117*4882a593Smuzhiyun 	MODE_VSYNC_NARROW,
118*4882a593Smuzhiyun 	MODE_VSYNC_WIDE,
119*4882a593Smuzhiyun 	MODE_VBLANK_NARROW,
120*4882a593Smuzhiyun 	MODE_VBLANK_WIDE,
121*4882a593Smuzhiyun 	MODE_PANEL,
122*4882a593Smuzhiyun 	MODE_INTERLACE_WIDTH,
123*4882a593Smuzhiyun 	MODE_ONE_WIDTH,
124*4882a593Smuzhiyun 	MODE_ONE_HEIGHT,
125*4882a593Smuzhiyun 	MODE_ONE_SIZE,
126*4882a593Smuzhiyun 	MODE_NO_REDUCED,
127*4882a593Smuzhiyun 	MODE_NO_STEREO,
128*4882a593Smuzhiyun 	MODE_NO_420,
129*4882a593Smuzhiyun 	MODE_STALE = -3,
130*4882a593Smuzhiyun 	MODE_BAD = -2,
131*4882a593Smuzhiyun 	MODE_ERROR = -1
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun #define DRM_MODE(nm, t, c, hd, hss, hse, ht, hsk, vd, vss, vse, vt, vs, f) \
135*4882a593Smuzhiyun 	.name = nm, .status = 0, .type = (t), .clock = (c), \
136*4882a593Smuzhiyun 	.hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
137*4882a593Smuzhiyun 	.htotal = (ht), .hskew = (hsk), .vdisplay = (vd), \
138*4882a593Smuzhiyun 	.vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
139*4882a593Smuzhiyun 	.vscan = (vs), .flags = (f)
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun /**
142*4882a593Smuzhiyun  * DRM_SIMPLE_MODE - Simple display mode
143*4882a593Smuzhiyun  * @hd: Horizontal resolution, width
144*4882a593Smuzhiyun  * @vd: Vertical resolution, height
145*4882a593Smuzhiyun  * @hd_mm: Display width in millimeters
146*4882a593Smuzhiyun  * @vd_mm: Display height in millimeters
147*4882a593Smuzhiyun  *
148*4882a593Smuzhiyun  * This macro initializes a &drm_display_mode that only contains info about
149*4882a593Smuzhiyun  * resolution and physical size.
150*4882a593Smuzhiyun  */
151*4882a593Smuzhiyun #define DRM_SIMPLE_MODE(hd, vd, hd_mm, vd_mm) \
152*4882a593Smuzhiyun 	.type = DRM_MODE_TYPE_DRIVER, .clock = 1 /* pass validation */, \
153*4882a593Smuzhiyun 	.hdisplay = (hd), .hsync_start = (hd), .hsync_end = (hd), \
154*4882a593Smuzhiyun 	.htotal = (hd), .vdisplay = (vd), .vsync_start = (vd), \
155*4882a593Smuzhiyun 	.vsync_end = (vd), .vtotal = (vd), .width_mm = (hd_mm), \
156*4882a593Smuzhiyun 	.height_mm = (vd_mm)
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun #define CRTC_INTERLACE_HALVE_V	(1 << 0) /* halve V values for interlacing */
159*4882a593Smuzhiyun #define CRTC_STEREO_DOUBLE	(1 << 1) /* adjust timings for stereo modes */
160*4882a593Smuzhiyun #define CRTC_NO_DBLSCAN		(1 << 2) /* don't adjust doublescan */
161*4882a593Smuzhiyun #define CRTC_NO_VSCAN		(1 << 3) /* don't adjust doublescan */
162*4882a593Smuzhiyun #define CRTC_STEREO_DOUBLE_ONLY	(CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | CRTC_NO_VSCAN)
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun #define DRM_MODE_FLAG_3D_MAX	DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun #define DRM_MODE_MATCH_TIMINGS (1 << 0)
167*4882a593Smuzhiyun #define DRM_MODE_MATCH_CLOCK (1 << 1)
168*4882a593Smuzhiyun #define DRM_MODE_MATCH_FLAGS (1 << 2)
169*4882a593Smuzhiyun #define DRM_MODE_MATCH_3D_FLAGS (1 << 3)
170*4882a593Smuzhiyun #define DRM_MODE_MATCH_ASPECT_RATIO (1 << 4)
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun /**
173*4882a593Smuzhiyun  * struct drm_display_mode - DRM kernel-internal display mode structure
174*4882a593Smuzhiyun  * @hdisplay: horizontal display size
175*4882a593Smuzhiyun  * @hsync_start: horizontal sync start
176*4882a593Smuzhiyun  * @hsync_end: horizontal sync end
177*4882a593Smuzhiyun  * @htotal: horizontal total size
178*4882a593Smuzhiyun  * @hskew: horizontal skew?!
179*4882a593Smuzhiyun  * @vdisplay: vertical display size
180*4882a593Smuzhiyun  * @vsync_start: vertical sync start
181*4882a593Smuzhiyun  * @vsync_end: vertical sync end
182*4882a593Smuzhiyun  * @vtotal: vertical total size
183*4882a593Smuzhiyun  * @vscan: vertical scan?!
184*4882a593Smuzhiyun  * @crtc_hdisplay: hardware mode horizontal display size
185*4882a593Smuzhiyun  * @crtc_hblank_start: hardware mode horizontal blank start
186*4882a593Smuzhiyun  * @crtc_hblank_end: hardware mode horizontal blank end
187*4882a593Smuzhiyun  * @crtc_hsync_start: hardware mode horizontal sync start
188*4882a593Smuzhiyun  * @crtc_hsync_end: hardware mode horizontal sync end
189*4882a593Smuzhiyun  * @crtc_htotal: hardware mode horizontal total size
190*4882a593Smuzhiyun  * @crtc_hskew: hardware mode horizontal skew?!
191*4882a593Smuzhiyun  * @crtc_vdisplay: hardware mode vertical display size
192*4882a593Smuzhiyun  * @crtc_vblank_start: hardware mode vertical blank start
193*4882a593Smuzhiyun  * @crtc_vblank_end: hardware mode vertical blank end
194*4882a593Smuzhiyun  * @crtc_vsync_start: hardware mode vertical sync start
195*4882a593Smuzhiyun  * @crtc_vsync_end: hardware mode vertical sync end
196*4882a593Smuzhiyun  * @crtc_vtotal: hardware mode vertical total size
197*4882a593Smuzhiyun  *
198*4882a593Smuzhiyun  * The horizontal and vertical timings are defined per the following diagram.
199*4882a593Smuzhiyun  *
200*4882a593Smuzhiyun  * ::
201*4882a593Smuzhiyun  *
202*4882a593Smuzhiyun  *
203*4882a593Smuzhiyun  *               Active                 Front           Sync           Back
204*4882a593Smuzhiyun  *              Region                 Porch                          Porch
205*4882a593Smuzhiyun  *     <-----------------------><----------------><-------------><-------------->
206*4882a593Smuzhiyun  *       //////////////////////|
207*4882a593Smuzhiyun  *      ////////////////////// |
208*4882a593Smuzhiyun  *     //////////////////////  |..................               ................
209*4882a593Smuzhiyun  *                                                _______________
210*4882a593Smuzhiyun  *     <----- [hv]display ----->
211*4882a593Smuzhiyun  *     <------------- [hv]sync_start ------------>
212*4882a593Smuzhiyun  *     <--------------------- [hv]sync_end --------------------->
213*4882a593Smuzhiyun  *     <-------------------------------- [hv]total ----------------------------->*
214*4882a593Smuzhiyun  *
215*4882a593Smuzhiyun  * This structure contains two copies of timings. First are the plain timings,
216*4882a593Smuzhiyun  * which specify the logical mode, as it would be for a progressive 1:1 scanout
217*4882a593Smuzhiyun  * at the refresh rate userspace can observe through vblank timestamps. Then
218*4882a593Smuzhiyun  * there's the hardware timings, which are corrected for interlacing,
219*4882a593Smuzhiyun  * double-clocking and similar things. They are provided as a convenience, and
220*4882a593Smuzhiyun  * can be appropriately computed using drm_mode_set_crtcinfo().
221*4882a593Smuzhiyun  *
222*4882a593Smuzhiyun  * For printing you can use %DRM_MODE_FMT and DRM_MODE_ARG().
223*4882a593Smuzhiyun  */
224*4882a593Smuzhiyun struct drm_display_mode {
225*4882a593Smuzhiyun 	/**
226*4882a593Smuzhiyun 	 * @clock:
227*4882a593Smuzhiyun 	 *
228*4882a593Smuzhiyun 	 * Pixel clock in kHz.
229*4882a593Smuzhiyun 	 */
230*4882a593Smuzhiyun 	int clock;		/* in kHz */
231*4882a593Smuzhiyun 	u16 hdisplay;
232*4882a593Smuzhiyun 	u16 hsync_start;
233*4882a593Smuzhiyun 	u16 hsync_end;
234*4882a593Smuzhiyun 	u16 htotal;
235*4882a593Smuzhiyun 	u16 hskew;
236*4882a593Smuzhiyun 	u16 vdisplay;
237*4882a593Smuzhiyun 	u16 vsync_start;
238*4882a593Smuzhiyun 	u16 vsync_end;
239*4882a593Smuzhiyun 	u16 vtotal;
240*4882a593Smuzhiyun 	u16 vscan;
241*4882a593Smuzhiyun 	/**
242*4882a593Smuzhiyun 	 * @flags:
243*4882a593Smuzhiyun 	 *
244*4882a593Smuzhiyun 	 * Sync and timing flags:
245*4882a593Smuzhiyun 	 *
246*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_PHSYNC: horizontal sync is active high.
247*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_NHSYNC: horizontal sync is active low.
248*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_PVSYNC: vertical sync is active high.
249*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_NVSYNC: vertical sync is active low.
250*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_INTERLACE: mode is interlaced.
251*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_DBLSCAN: mode uses doublescan.
252*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_CSYNC: mode uses composite sync.
253*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_PCSYNC: composite sync is active high.
254*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_NCSYNC: composite sync is active low.
255*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_HSKEW: hskew provided (not used?).
256*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_BCAST: <deprecated>
257*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_PIXMUX: <deprecated>
258*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_DBLCLK: double-clocked mode.
259*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_CLKDIV2: half-clocked mode.
260*4882a593Smuzhiyun 	 *
261*4882a593Smuzhiyun 	 * Additionally there's flags to specify how 3D modes are packed:
262*4882a593Smuzhiyun 	 *
263*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_3D_NONE: normal, non-3D mode.
264*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_3D_FRAME_PACKING: 2 full frames for left and right.
265*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE: interleaved like fields.
266*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_3D_LINE_ALTERNATIVE: interleaved lines.
267*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL: side-by-side full frames.
268*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_3D_L_DEPTH: ?
269*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH: ?
270*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_3D_TOP_AND_BOTTOM: frame split into top and bottom
271*4882a593Smuzhiyun 	 *    parts.
272*4882a593Smuzhiyun 	 *  - DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF: frame split into left and
273*4882a593Smuzhiyun 	 *    right parts.
274*4882a593Smuzhiyun 	 */
275*4882a593Smuzhiyun 	u32 flags;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	/**
278*4882a593Smuzhiyun 	 * @crtc_clock:
279*4882a593Smuzhiyun 	 *
280*4882a593Smuzhiyun 	 * Actual pixel or dot clock in the hardware. This differs from the
281*4882a593Smuzhiyun 	 * logical @clock when e.g. using interlacing, double-clocking, stereo
282*4882a593Smuzhiyun 	 * modes or other fancy stuff that changes the timings and signals
283*4882a593Smuzhiyun 	 * actually sent over the wire.
284*4882a593Smuzhiyun 	 *
285*4882a593Smuzhiyun 	 * This is again in kHz.
286*4882a593Smuzhiyun 	 *
287*4882a593Smuzhiyun 	 * Note that with digital outputs like HDMI or DP there's usually a
288*4882a593Smuzhiyun 	 * massive confusion between the dot clock and the signal clock at the
289*4882a593Smuzhiyun 	 * bit encoding level. Especially when a 8b/10b encoding is used and the
290*4882a593Smuzhiyun 	 * difference is exactly a factor of 10.
291*4882a593Smuzhiyun 	 */
292*4882a593Smuzhiyun 	int crtc_clock;
293*4882a593Smuzhiyun 	u16 crtc_hdisplay;
294*4882a593Smuzhiyun 	u16 crtc_hblank_start;
295*4882a593Smuzhiyun 	u16 crtc_hblank_end;
296*4882a593Smuzhiyun 	u16 crtc_hsync_start;
297*4882a593Smuzhiyun 	u16 crtc_hsync_end;
298*4882a593Smuzhiyun 	u16 crtc_htotal;
299*4882a593Smuzhiyun 	u16 crtc_hskew;
300*4882a593Smuzhiyun 	u16 crtc_vdisplay;
301*4882a593Smuzhiyun 	u16 crtc_vblank_start;
302*4882a593Smuzhiyun 	u16 crtc_vblank_end;
303*4882a593Smuzhiyun 	u16 crtc_vsync_start;
304*4882a593Smuzhiyun 	u16 crtc_vsync_end;
305*4882a593Smuzhiyun 	u16 crtc_vtotal;
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	/**
308*4882a593Smuzhiyun 	 * @width_mm:
309*4882a593Smuzhiyun 	 *
310*4882a593Smuzhiyun 	 * Addressable size of the output in mm, projectors should set this to
311*4882a593Smuzhiyun 	 * 0.
312*4882a593Smuzhiyun 	 */
313*4882a593Smuzhiyun 	u16 width_mm;
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	/**
316*4882a593Smuzhiyun 	 * @height_mm:
317*4882a593Smuzhiyun 	 *
318*4882a593Smuzhiyun 	 * Addressable size of the output in mm, projectors should set this to
319*4882a593Smuzhiyun 	 * 0.
320*4882a593Smuzhiyun 	 */
321*4882a593Smuzhiyun 	u16 height_mm;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	/**
324*4882a593Smuzhiyun 	 * @type:
325*4882a593Smuzhiyun 	 *
326*4882a593Smuzhiyun 	 * A bitmask of flags, mostly about the source of a mode. Possible flags
327*4882a593Smuzhiyun 	 * are:
328*4882a593Smuzhiyun 	 *
329*4882a593Smuzhiyun 	 *  - DRM_MODE_TYPE_PREFERRED: Preferred mode, usually the native
330*4882a593Smuzhiyun 	 *    resolution of an LCD panel. There should only be one preferred
331*4882a593Smuzhiyun 	 *    mode per connector at any given time.
332*4882a593Smuzhiyun 	 *  - DRM_MODE_TYPE_DRIVER: Mode created by the driver, which is all of
333*4882a593Smuzhiyun 	 *    them really. Drivers must set this bit for all modes they create
334*4882a593Smuzhiyun 	 *    and expose to userspace.
335*4882a593Smuzhiyun 	 *  - DRM_MODE_TYPE_USERDEF: Mode defined or selected via the kernel
336*4882a593Smuzhiyun 	 *    command line.
337*4882a593Smuzhiyun 	 *
338*4882a593Smuzhiyun 	 * Plus a big list of flags which shouldn't be used at all, but are
339*4882a593Smuzhiyun 	 * still around since these flags are also used in the userspace ABI.
340*4882a593Smuzhiyun 	 * We no longer accept modes with these types though:
341*4882a593Smuzhiyun 	 *
342*4882a593Smuzhiyun 	 *  - DRM_MODE_TYPE_BUILTIN: Meant for hard-coded modes, unused.
343*4882a593Smuzhiyun 	 *    Use DRM_MODE_TYPE_DRIVER instead.
344*4882a593Smuzhiyun 	 *  - DRM_MODE_TYPE_DEFAULT: Again a leftover, use
345*4882a593Smuzhiyun 	 *    DRM_MODE_TYPE_PREFERRED instead.
346*4882a593Smuzhiyun 	 *  - DRM_MODE_TYPE_CLOCK_C and DRM_MODE_TYPE_CRTC_C: Define leftovers
347*4882a593Smuzhiyun 	 *    which are stuck around for hysterical raisins only. No one has an
348*4882a593Smuzhiyun 	 *    idea what they were meant for. Don't use.
349*4882a593Smuzhiyun 	 */
350*4882a593Smuzhiyun 	u8 type;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	/**
353*4882a593Smuzhiyun 	 * @expose_to_userspace:
354*4882a593Smuzhiyun 	 *
355*4882a593Smuzhiyun 	 * Indicates whether the mode is to be exposed to the userspace.
356*4882a593Smuzhiyun 	 * This is to maintain a set of exposed modes while preparing
357*4882a593Smuzhiyun 	 * user-mode's list in drm_mode_getconnector ioctl. The purpose of
358*4882a593Smuzhiyun 	 * this only lies in the ioctl function, and is not to be used
359*4882a593Smuzhiyun 	 * outside the function.
360*4882a593Smuzhiyun 	 */
361*4882a593Smuzhiyun 	bool expose_to_userspace;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	/**
364*4882a593Smuzhiyun 	 * @head:
365*4882a593Smuzhiyun 	 *
366*4882a593Smuzhiyun 	 * struct list_head for mode lists.
367*4882a593Smuzhiyun 	 */
368*4882a593Smuzhiyun 	struct list_head head;
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	/**
371*4882a593Smuzhiyun 	 * @name:
372*4882a593Smuzhiyun 	 *
373*4882a593Smuzhiyun 	 * Human-readable name of the mode, filled out with drm_mode_set_name().
374*4882a593Smuzhiyun 	 */
375*4882a593Smuzhiyun 	char name[DRM_DISPLAY_MODE_LEN];
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	/**
378*4882a593Smuzhiyun 	 * @status:
379*4882a593Smuzhiyun 	 *
380*4882a593Smuzhiyun 	 * Status of the mode, used to filter out modes not supported by the
381*4882a593Smuzhiyun 	 * hardware. See enum &drm_mode_status.
382*4882a593Smuzhiyun 	 */
383*4882a593Smuzhiyun 	enum drm_mode_status status;
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	/**
386*4882a593Smuzhiyun 	 * @picture_aspect_ratio:
387*4882a593Smuzhiyun 	 *
388*4882a593Smuzhiyun 	 * Field for setting the HDMI picture aspect ratio of a mode.
389*4882a593Smuzhiyun 	 */
390*4882a593Smuzhiyun 	enum hdmi_picture_aspect picture_aspect_ratio;
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun };
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun /**
395*4882a593Smuzhiyun  * DRM_MODE_FMT - printf string for &struct drm_display_mode
396*4882a593Smuzhiyun  */
397*4882a593Smuzhiyun #define DRM_MODE_FMT    "\"%s\": %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x"
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun /**
400*4882a593Smuzhiyun  * DRM_MODE_ARG - printf arguments for &struct drm_display_mode
401*4882a593Smuzhiyun  * @m: display mode
402*4882a593Smuzhiyun  */
403*4882a593Smuzhiyun #define DRM_MODE_ARG(m) \
404*4882a593Smuzhiyun 	(m)->name, drm_mode_vrefresh(m), (m)->clock, \
405*4882a593Smuzhiyun 	(m)->hdisplay, (m)->hsync_start, (m)->hsync_end, (m)->htotal, \
406*4882a593Smuzhiyun 	(m)->vdisplay, (m)->vsync_start, (m)->vsync_end, (m)->vtotal, \
407*4882a593Smuzhiyun 	(m)->type, (m)->flags
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun #define obj_to_mode(x) container_of(x, struct drm_display_mode, base)
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun /**
412*4882a593Smuzhiyun  * drm_mode_is_stereo - check for stereo mode flags
413*4882a593Smuzhiyun  * @mode: drm_display_mode to check
414*4882a593Smuzhiyun  *
415*4882a593Smuzhiyun  * Returns:
416*4882a593Smuzhiyun  * True if the mode is one of the stereo modes (like side-by-side), false if
417*4882a593Smuzhiyun  * not.
418*4882a593Smuzhiyun  */
drm_mode_is_stereo(const struct drm_display_mode * mode)419*4882a593Smuzhiyun static inline bool drm_mode_is_stereo(const struct drm_display_mode *mode)
420*4882a593Smuzhiyun {
421*4882a593Smuzhiyun 	return mode->flags & DRM_MODE_FLAG_3D_MASK;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun struct drm_connector;
425*4882a593Smuzhiyun struct drm_cmdline_mode;
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun struct drm_display_mode *drm_mode_create(struct drm_device *dev);
428*4882a593Smuzhiyun void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode);
429*4882a593Smuzhiyun void drm_mode_convert_to_umode(struct drm_mode_modeinfo *out,
430*4882a593Smuzhiyun 			       const struct drm_display_mode *in);
431*4882a593Smuzhiyun int drm_mode_convert_umode(struct drm_device *dev,
432*4882a593Smuzhiyun 			   struct drm_display_mode *out,
433*4882a593Smuzhiyun 			   const struct drm_mode_modeinfo *in);
434*4882a593Smuzhiyun void drm_mode_probed_add(struct drm_connector *connector, struct drm_display_mode *mode);
435*4882a593Smuzhiyun void drm_mode_debug_printmodeline(const struct drm_display_mode *mode);
436*4882a593Smuzhiyun bool drm_mode_is_420_only(const struct drm_display_info *display,
437*4882a593Smuzhiyun 			  const struct drm_display_mode *mode);
438*4882a593Smuzhiyun bool drm_mode_is_420_also(const struct drm_display_info *display,
439*4882a593Smuzhiyun 			  const struct drm_display_mode *mode);
440*4882a593Smuzhiyun bool drm_mode_is_420(const struct drm_display_info *display,
441*4882a593Smuzhiyun 		     const struct drm_display_mode *mode);
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun struct drm_display_mode *drm_cvt_mode(struct drm_device *dev,
444*4882a593Smuzhiyun 				      int hdisplay, int vdisplay, int vrefresh,
445*4882a593Smuzhiyun 				      bool reduced, bool interlaced,
446*4882a593Smuzhiyun 				      bool margins);
447*4882a593Smuzhiyun struct drm_display_mode *drm_gtf_mode(struct drm_device *dev,
448*4882a593Smuzhiyun 				      int hdisplay, int vdisplay, int vrefresh,
449*4882a593Smuzhiyun 				      bool interlaced, int margins);
450*4882a593Smuzhiyun struct drm_display_mode *drm_gtf_mode_complex(struct drm_device *dev,
451*4882a593Smuzhiyun 					      int hdisplay, int vdisplay,
452*4882a593Smuzhiyun 					      int vrefresh, bool interlaced,
453*4882a593Smuzhiyun 					      int margins,
454*4882a593Smuzhiyun 					      int GTF_M, int GTF_2C,
455*4882a593Smuzhiyun 					      int GTF_K, int GTF_2J);
456*4882a593Smuzhiyun void drm_display_mode_from_videomode(const struct videomode *vm,
457*4882a593Smuzhiyun 				     struct drm_display_mode *dmode);
458*4882a593Smuzhiyun void drm_display_mode_to_videomode(const struct drm_display_mode *dmode,
459*4882a593Smuzhiyun 				   struct videomode *vm);
460*4882a593Smuzhiyun void drm_bus_flags_from_videomode(const struct videomode *vm, u32 *bus_flags);
461*4882a593Smuzhiyun int of_get_drm_display_mode(struct device_node *np,
462*4882a593Smuzhiyun 			    struct drm_display_mode *dmode, u32 *bus_flags,
463*4882a593Smuzhiyun 			    int index);
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun void drm_mode_set_name(struct drm_display_mode *mode);
466*4882a593Smuzhiyun int drm_mode_vrefresh(const struct drm_display_mode *mode);
467*4882a593Smuzhiyun void drm_mode_get_hv_timing(const struct drm_display_mode *mode,
468*4882a593Smuzhiyun 			    int *hdisplay, int *vdisplay);
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun void drm_mode_set_crtcinfo(struct drm_display_mode *p,
471*4882a593Smuzhiyun 			   int adjust_flags);
472*4882a593Smuzhiyun void drm_mode_copy(struct drm_display_mode *dst,
473*4882a593Smuzhiyun 		   const struct drm_display_mode *src);
474*4882a593Smuzhiyun struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
475*4882a593Smuzhiyun 					    const struct drm_display_mode *mode);
476*4882a593Smuzhiyun bool drm_mode_match(const struct drm_display_mode *mode1,
477*4882a593Smuzhiyun 		    const struct drm_display_mode *mode2,
478*4882a593Smuzhiyun 		    unsigned int match_flags);
479*4882a593Smuzhiyun bool drm_mode_equal(const struct drm_display_mode *mode1,
480*4882a593Smuzhiyun 		    const struct drm_display_mode *mode2);
481*4882a593Smuzhiyun bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1,
482*4882a593Smuzhiyun 			      const struct drm_display_mode *mode2);
483*4882a593Smuzhiyun bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
484*4882a593Smuzhiyun 					const struct drm_display_mode *mode2);
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun /* for use by the crtc helper probe functions */
487*4882a593Smuzhiyun enum drm_mode_status drm_mode_validate_driver(struct drm_device *dev,
488*4882a593Smuzhiyun 					      const struct drm_display_mode *mode);
489*4882a593Smuzhiyun enum drm_mode_status drm_mode_validate_size(const struct drm_display_mode *mode,
490*4882a593Smuzhiyun 					    int maxX, int maxY);
491*4882a593Smuzhiyun enum drm_mode_status
492*4882a593Smuzhiyun drm_mode_validate_ycbcr420(const struct drm_display_mode *mode,
493*4882a593Smuzhiyun 			   struct drm_connector *connector);
494*4882a593Smuzhiyun void drm_mode_prune_invalid(struct drm_device *dev,
495*4882a593Smuzhiyun 			    struct list_head *mode_list, bool verbose);
496*4882a593Smuzhiyun void drm_mode_sort(struct list_head *mode_list);
497*4882a593Smuzhiyun void drm_connector_list_update(struct drm_connector *connector);
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun /* parsing cmdline modes */
500*4882a593Smuzhiyun bool
501*4882a593Smuzhiyun drm_mode_parse_command_line_for_connector(const char *mode_option,
502*4882a593Smuzhiyun 					  const struct drm_connector *connector,
503*4882a593Smuzhiyun 					  struct drm_cmdline_mode *mode);
504*4882a593Smuzhiyun struct drm_display_mode *
505*4882a593Smuzhiyun drm_mode_create_from_cmdline_mode(struct drm_device *dev,
506*4882a593Smuzhiyun 				  struct drm_cmdline_mode *cmd);
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun #endif /* __DRM_MODES_H__ */
509