1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * MIPI Display Bus Interface (DBI) LCD controller support
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2016 Noralf Trønnes
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef __LINUX_MIPI_DBI_H
9*4882a593Smuzhiyun #define __LINUX_MIPI_DBI_H
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/mutex.h>
12*4882a593Smuzhiyun #include <drm/drm_device.h>
13*4882a593Smuzhiyun #include <drm/drm_simple_kms_helper.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun struct drm_rect;
16*4882a593Smuzhiyun struct spi_device;
17*4882a593Smuzhiyun struct gpio_desc;
18*4882a593Smuzhiyun struct regulator;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /**
21*4882a593Smuzhiyun * struct mipi_dbi - MIPI DBI interface
22*4882a593Smuzhiyun */
23*4882a593Smuzhiyun struct mipi_dbi {
24*4882a593Smuzhiyun /**
25*4882a593Smuzhiyun * @cmdlock: Command lock
26*4882a593Smuzhiyun */
27*4882a593Smuzhiyun struct mutex cmdlock;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /**
30*4882a593Smuzhiyun * @command: Bus specific callback executing commands.
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun int (*command)(struct mipi_dbi *dbi, u8 *cmd, u8 *param, size_t num);
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /**
35*4882a593Smuzhiyun * @read_commands: Array of read commands terminated by a zero entry.
36*4882a593Smuzhiyun * Reading is disabled if this is NULL.
37*4882a593Smuzhiyun */
38*4882a593Smuzhiyun const u8 *read_commands;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /**
41*4882a593Smuzhiyun * @swap_bytes: Swap bytes in buffer before transfer
42*4882a593Smuzhiyun */
43*4882a593Smuzhiyun bool swap_bytes;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /**
46*4882a593Smuzhiyun * @reset: Optional reset gpio
47*4882a593Smuzhiyun */
48*4882a593Smuzhiyun struct gpio_desc *reset;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /* Type C specific */
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /**
53*4882a593Smuzhiyun * @spi: SPI device
54*4882a593Smuzhiyun */
55*4882a593Smuzhiyun struct spi_device *spi;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /**
58*4882a593Smuzhiyun * @dc: Optional D/C gpio.
59*4882a593Smuzhiyun */
60*4882a593Smuzhiyun struct gpio_desc *dc;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun /**
63*4882a593Smuzhiyun * @tx_buf9: Buffer used for Option 1 9-bit conversion
64*4882a593Smuzhiyun */
65*4882a593Smuzhiyun void *tx_buf9;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /**
68*4882a593Smuzhiyun * @tx_buf9_len: Size of tx_buf9.
69*4882a593Smuzhiyun */
70*4882a593Smuzhiyun size_t tx_buf9_len;
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /**
74*4882a593Smuzhiyun * struct mipi_dbi_dev - MIPI DBI device
75*4882a593Smuzhiyun */
76*4882a593Smuzhiyun struct mipi_dbi_dev {
77*4882a593Smuzhiyun /**
78*4882a593Smuzhiyun * @drm: DRM device
79*4882a593Smuzhiyun */
80*4882a593Smuzhiyun struct drm_device drm;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /**
83*4882a593Smuzhiyun * @pipe: Display pipe structure
84*4882a593Smuzhiyun */
85*4882a593Smuzhiyun struct drm_simple_display_pipe pipe;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /**
88*4882a593Smuzhiyun * @connector: Connector
89*4882a593Smuzhiyun */
90*4882a593Smuzhiyun struct drm_connector connector;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /**
93*4882a593Smuzhiyun * @mode: Fixed display mode
94*4882a593Smuzhiyun */
95*4882a593Smuzhiyun struct drm_display_mode mode;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /**
98*4882a593Smuzhiyun * @tx_buf: Buffer used for transfer (copy clip rect area)
99*4882a593Smuzhiyun */
100*4882a593Smuzhiyun u16 *tx_buf;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun /**
103*4882a593Smuzhiyun * @rotation: initial rotation in degrees Counter Clock Wise
104*4882a593Smuzhiyun */
105*4882a593Smuzhiyun unsigned int rotation;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /**
108*4882a593Smuzhiyun * @left_offset: Horizontal offset of the display relative to the
109*4882a593Smuzhiyun * controller's driver array
110*4882a593Smuzhiyun */
111*4882a593Smuzhiyun unsigned int left_offset;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /**
114*4882a593Smuzhiyun * @top_offset: Vertical offset of the display relative to the
115*4882a593Smuzhiyun * controller's driver array
116*4882a593Smuzhiyun */
117*4882a593Smuzhiyun unsigned int top_offset;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /**
120*4882a593Smuzhiyun * @backlight: backlight device (optional)
121*4882a593Smuzhiyun */
122*4882a593Smuzhiyun struct backlight_device *backlight;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /**
125*4882a593Smuzhiyun * @regulator: power regulator (optional)
126*4882a593Smuzhiyun */
127*4882a593Smuzhiyun struct regulator *regulator;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /**
130*4882a593Smuzhiyun * @dbi: MIPI DBI interface
131*4882a593Smuzhiyun */
132*4882a593Smuzhiyun struct mipi_dbi dbi;
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun
drm_to_mipi_dbi_dev(struct drm_device * drm)135*4882a593Smuzhiyun static inline struct mipi_dbi_dev *drm_to_mipi_dbi_dev(struct drm_device *drm)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun return container_of(drm, struct mipi_dbi_dev, drm);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi,
141*4882a593Smuzhiyun struct gpio_desc *dc);
142*4882a593Smuzhiyun int mipi_dbi_dev_init_with_formats(struct mipi_dbi_dev *dbidev,
143*4882a593Smuzhiyun const struct drm_simple_display_pipe_funcs *funcs,
144*4882a593Smuzhiyun const uint32_t *formats, unsigned int format_count,
145*4882a593Smuzhiyun const struct drm_display_mode *mode,
146*4882a593Smuzhiyun unsigned int rotation, size_t tx_buf_size);
147*4882a593Smuzhiyun int mipi_dbi_dev_init(struct mipi_dbi_dev *dbidev,
148*4882a593Smuzhiyun const struct drm_simple_display_pipe_funcs *funcs,
149*4882a593Smuzhiyun const struct drm_display_mode *mode, unsigned int rotation);
150*4882a593Smuzhiyun void mipi_dbi_pipe_update(struct drm_simple_display_pipe *pipe,
151*4882a593Smuzhiyun struct drm_plane_state *old_state);
152*4882a593Smuzhiyun void mipi_dbi_enable_flush(struct mipi_dbi_dev *dbidev,
153*4882a593Smuzhiyun struct drm_crtc_state *crtc_state,
154*4882a593Smuzhiyun struct drm_plane_state *plan_state);
155*4882a593Smuzhiyun void mipi_dbi_pipe_disable(struct drm_simple_display_pipe *pipe);
156*4882a593Smuzhiyun void mipi_dbi_hw_reset(struct mipi_dbi *dbi);
157*4882a593Smuzhiyun bool mipi_dbi_display_is_on(struct mipi_dbi *dbi);
158*4882a593Smuzhiyun int mipi_dbi_poweron_reset(struct mipi_dbi_dev *dbidev);
159*4882a593Smuzhiyun int mipi_dbi_poweron_conditional_reset(struct mipi_dbi_dev *dbidev);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun u32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, size_t len);
162*4882a593Smuzhiyun int mipi_dbi_spi_transfer(struct spi_device *spi, u32 speed_hz,
163*4882a593Smuzhiyun u8 bpw, const void *buf, size_t len);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun int mipi_dbi_command_read(struct mipi_dbi *dbi, u8 cmd, u8 *val);
166*4882a593Smuzhiyun int mipi_dbi_command_buf(struct mipi_dbi *dbi, u8 cmd, u8 *data, size_t len);
167*4882a593Smuzhiyun int mipi_dbi_command_stackbuf(struct mipi_dbi *dbi, u8 cmd, const u8 *data,
168*4882a593Smuzhiyun size_t len);
169*4882a593Smuzhiyun int mipi_dbi_buf_copy(void *dst, struct drm_framebuffer *fb,
170*4882a593Smuzhiyun struct drm_rect *clip, bool swap);
171*4882a593Smuzhiyun /**
172*4882a593Smuzhiyun * mipi_dbi_command - MIPI DCS command with optional parameter(s)
173*4882a593Smuzhiyun * @dbi: MIPI DBI structure
174*4882a593Smuzhiyun * @cmd: Command
175*4882a593Smuzhiyun * @seq...: Optional parameter(s)
176*4882a593Smuzhiyun *
177*4882a593Smuzhiyun * Send MIPI DCS command to the controller. Use mipi_dbi_command_read() for
178*4882a593Smuzhiyun * get/read.
179*4882a593Smuzhiyun *
180*4882a593Smuzhiyun * Returns:
181*4882a593Smuzhiyun * Zero on success, negative error code on failure.
182*4882a593Smuzhiyun */
183*4882a593Smuzhiyun #define mipi_dbi_command(dbi, cmd, seq...) \
184*4882a593Smuzhiyun ({ \
185*4882a593Smuzhiyun const u8 d[] = { seq }; \
186*4882a593Smuzhiyun mipi_dbi_command_stackbuf(dbi, cmd, d, ARRAY_SIZE(d)); \
187*4882a593Smuzhiyun })
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_FS
190*4882a593Smuzhiyun void mipi_dbi_debugfs_init(struct drm_minor *minor);
191*4882a593Smuzhiyun #else
192*4882a593Smuzhiyun #define mipi_dbi_debugfs_init NULL
193*4882a593Smuzhiyun #endif
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun #endif /* __LINUX_MIPI_DBI_H */
196