xref: /OK3568_Linux_fs/kernel/include/drm/drm_dp_mst_helper.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright © 2014 Red Hat.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Permission to use, copy, modify, distribute, and sell this software and its
5*4882a593Smuzhiyun  * documentation for any purpose is hereby granted without fee, provided that
6*4882a593Smuzhiyun  * the above copyright notice appear in all copies and that both that copyright
7*4882a593Smuzhiyun  * notice and this permission notice appear in supporting documentation, and
8*4882a593Smuzhiyun  * that the name of the copyright holders not be used in advertising or
9*4882a593Smuzhiyun  * publicity pertaining to distribution of the software without specific,
10*4882a593Smuzhiyun  * written prior permission.  The copyright holders make no representations
11*4882a593Smuzhiyun  * about the suitability of this software for any purpose.  It is provided "as
12*4882a593Smuzhiyun  * is" without express or implied warranty.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15*4882a593Smuzhiyun  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16*4882a593Smuzhiyun  * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17*4882a593Smuzhiyun  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18*4882a593Smuzhiyun  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19*4882a593Smuzhiyun  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20*4882a593Smuzhiyun  * OF THIS SOFTWARE.
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun #ifndef _DRM_DP_MST_HELPER_H_
23*4882a593Smuzhiyun #define _DRM_DP_MST_HELPER_H_
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include <linux/types.h>
26*4882a593Smuzhiyun #include <drm/drm_dp_helper.h>
27*4882a593Smuzhiyun #include <drm/drm_atomic.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS)
30*4882a593Smuzhiyun #include <linux/stackdepot.h>
31*4882a593Smuzhiyun #include <linux/timekeeping.h>
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun enum drm_dp_mst_topology_ref_type {
34*4882a593Smuzhiyun 	DRM_DP_MST_TOPOLOGY_REF_GET,
35*4882a593Smuzhiyun 	DRM_DP_MST_TOPOLOGY_REF_PUT,
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun struct drm_dp_mst_topology_ref_history {
39*4882a593Smuzhiyun 	struct drm_dp_mst_topology_ref_entry {
40*4882a593Smuzhiyun 		enum drm_dp_mst_topology_ref_type type;
41*4882a593Smuzhiyun 		int count;
42*4882a593Smuzhiyun 		ktime_t ts_nsec;
43*4882a593Smuzhiyun 		depot_stack_handle_t backtrace;
44*4882a593Smuzhiyun 	} *entries;
45*4882a593Smuzhiyun 	int len;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun #endif /* IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS) */
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun struct drm_dp_mst_branch;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun /**
52*4882a593Smuzhiyun  * struct drm_dp_vcpi - Virtual Channel Payload Identifier
53*4882a593Smuzhiyun  * @vcpi: Virtual channel ID.
54*4882a593Smuzhiyun  * @pbn: Payload Bandwidth Number for this channel
55*4882a593Smuzhiyun  * @aligned_pbn: PBN aligned with slot size
56*4882a593Smuzhiyun  * @num_slots: number of slots for this PBN
57*4882a593Smuzhiyun  */
58*4882a593Smuzhiyun struct drm_dp_vcpi {
59*4882a593Smuzhiyun 	int vcpi;
60*4882a593Smuzhiyun 	int pbn;
61*4882a593Smuzhiyun 	int aligned_pbn;
62*4882a593Smuzhiyun 	int num_slots;
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun /**
66*4882a593Smuzhiyun  * struct drm_dp_mst_port - MST port
67*4882a593Smuzhiyun  * @port_num: port number
68*4882a593Smuzhiyun  * @input: if this port is an input port. Protected by
69*4882a593Smuzhiyun  * &drm_dp_mst_topology_mgr.base.lock.
70*4882a593Smuzhiyun  * @mcs: message capability status - DP 1.2 spec. Protected by
71*4882a593Smuzhiyun  * &drm_dp_mst_topology_mgr.base.lock.
72*4882a593Smuzhiyun  * @ddps: DisplayPort Device Plug Status - DP 1.2. Protected by
73*4882a593Smuzhiyun  * &drm_dp_mst_topology_mgr.base.lock.
74*4882a593Smuzhiyun  * @pdt: Peer Device Type. Protected by
75*4882a593Smuzhiyun  * &drm_dp_mst_topology_mgr.base.lock.
76*4882a593Smuzhiyun  * @ldps: Legacy Device Plug Status. Protected by
77*4882a593Smuzhiyun  * &drm_dp_mst_topology_mgr.base.lock.
78*4882a593Smuzhiyun  * @dpcd_rev: DPCD revision of device on this port. Protected by
79*4882a593Smuzhiyun  * &drm_dp_mst_topology_mgr.base.lock.
80*4882a593Smuzhiyun  * @num_sdp_streams: Number of simultaneous streams. Protected by
81*4882a593Smuzhiyun  * &drm_dp_mst_topology_mgr.base.lock.
82*4882a593Smuzhiyun  * @num_sdp_stream_sinks: Number of stream sinks. Protected by
83*4882a593Smuzhiyun  * &drm_dp_mst_topology_mgr.base.lock.
84*4882a593Smuzhiyun  * @full_pbn: Max possible bandwidth for this port. Protected by
85*4882a593Smuzhiyun  * &drm_dp_mst_topology_mgr.base.lock.
86*4882a593Smuzhiyun  * @next: link to next port on this branch device
87*4882a593Smuzhiyun  * @aux: i2c aux transport to talk to device connected to this port, protected
88*4882a593Smuzhiyun  * by &drm_dp_mst_topology_mgr.base.lock.
89*4882a593Smuzhiyun  * @parent: branch device parent of this port
90*4882a593Smuzhiyun  * @vcpi: Virtual Channel Payload info for this port.
91*4882a593Smuzhiyun  * @connector: DRM connector this port is connected to. Protected by
92*4882a593Smuzhiyun  * &drm_dp_mst_topology_mgr.base.lock.
93*4882a593Smuzhiyun  * @mgr: topology manager this port lives under.
94*4882a593Smuzhiyun  *
95*4882a593Smuzhiyun  * This structure represents an MST port endpoint on a device somewhere
96*4882a593Smuzhiyun  * in the MST topology.
97*4882a593Smuzhiyun  */
98*4882a593Smuzhiyun struct drm_dp_mst_port {
99*4882a593Smuzhiyun 	/**
100*4882a593Smuzhiyun 	 * @topology_kref: refcount for this port's lifetime in the topology,
101*4882a593Smuzhiyun 	 * only the DP MST helpers should need to touch this
102*4882a593Smuzhiyun 	 */
103*4882a593Smuzhiyun 	struct kref topology_kref;
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	/**
106*4882a593Smuzhiyun 	 * @malloc_kref: refcount for the memory allocation containing this
107*4882a593Smuzhiyun 	 * structure. See drm_dp_mst_get_port_malloc() and
108*4882a593Smuzhiyun 	 * drm_dp_mst_put_port_malloc().
109*4882a593Smuzhiyun 	 */
110*4882a593Smuzhiyun 	struct kref malloc_kref;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS)
113*4882a593Smuzhiyun 	/**
114*4882a593Smuzhiyun 	 * @topology_ref_history: A history of each topology
115*4882a593Smuzhiyun 	 * reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.
116*4882a593Smuzhiyun 	 */
117*4882a593Smuzhiyun 	struct drm_dp_mst_topology_ref_history topology_ref_history;
118*4882a593Smuzhiyun #endif
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	u8 port_num;
121*4882a593Smuzhiyun 	bool input;
122*4882a593Smuzhiyun 	bool mcs;
123*4882a593Smuzhiyun 	bool ddps;
124*4882a593Smuzhiyun 	u8 pdt;
125*4882a593Smuzhiyun 	bool ldps;
126*4882a593Smuzhiyun 	u8 dpcd_rev;
127*4882a593Smuzhiyun 	u8 num_sdp_streams;
128*4882a593Smuzhiyun 	u8 num_sdp_stream_sinks;
129*4882a593Smuzhiyun 	uint16_t full_pbn;
130*4882a593Smuzhiyun 	struct list_head next;
131*4882a593Smuzhiyun 	/**
132*4882a593Smuzhiyun 	 * @mstb: the branch device connected to this port, if there is one.
133*4882a593Smuzhiyun 	 * This should be considered protected for reading by
134*4882a593Smuzhiyun 	 * &drm_dp_mst_topology_mgr.lock. There are two exceptions to this:
135*4882a593Smuzhiyun 	 * &drm_dp_mst_topology_mgr.up_req_work and
136*4882a593Smuzhiyun 	 * &drm_dp_mst_topology_mgr.work, which do not grab
137*4882a593Smuzhiyun 	 * &drm_dp_mst_topology_mgr.lock during reads but are the only
138*4882a593Smuzhiyun 	 * updaters of this list and are protected from writing concurrently
139*4882a593Smuzhiyun 	 * by &drm_dp_mst_topology_mgr.probe_lock.
140*4882a593Smuzhiyun 	 */
141*4882a593Smuzhiyun 	struct drm_dp_mst_branch *mstb;
142*4882a593Smuzhiyun 	struct drm_dp_aux aux; /* i2c bus for this port? */
143*4882a593Smuzhiyun 	struct drm_dp_mst_branch *parent;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	struct drm_dp_vcpi vcpi;
146*4882a593Smuzhiyun 	struct drm_connector *connector;
147*4882a593Smuzhiyun 	struct drm_dp_mst_topology_mgr *mgr;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	/**
150*4882a593Smuzhiyun 	 * @cached_edid: for DP logical ports - make tiling work by ensuring
151*4882a593Smuzhiyun 	 * that the EDID for all connectors is read immediately.
152*4882a593Smuzhiyun 	 */
153*4882a593Smuzhiyun 	struct edid *cached_edid;
154*4882a593Smuzhiyun 	/**
155*4882a593Smuzhiyun 	 * @has_audio: Tracks whether the sink connector to this port is
156*4882a593Smuzhiyun 	 * audio-capable.
157*4882a593Smuzhiyun 	 */
158*4882a593Smuzhiyun 	bool has_audio;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	/**
161*4882a593Smuzhiyun 	 * @fec_capable: bool indicating if FEC can be supported up to that
162*4882a593Smuzhiyun 	 * point in the MST topology.
163*4882a593Smuzhiyun 	 */
164*4882a593Smuzhiyun 	bool fec_capable;
165*4882a593Smuzhiyun };
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun /* sideband msg header - not bit struct */
168*4882a593Smuzhiyun struct drm_dp_sideband_msg_hdr {
169*4882a593Smuzhiyun 	u8 lct;
170*4882a593Smuzhiyun 	u8 lcr;
171*4882a593Smuzhiyun 	u8 rad[8];
172*4882a593Smuzhiyun 	bool broadcast;
173*4882a593Smuzhiyun 	bool path_msg;
174*4882a593Smuzhiyun 	u8 msg_len;
175*4882a593Smuzhiyun 	bool somt;
176*4882a593Smuzhiyun 	bool eomt;
177*4882a593Smuzhiyun 	bool seqno;
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun struct drm_dp_sideband_msg_rx {
181*4882a593Smuzhiyun 	u8 chunk[48];
182*4882a593Smuzhiyun 	u8 msg[256];
183*4882a593Smuzhiyun 	u8 curchunk_len;
184*4882a593Smuzhiyun 	u8 curchunk_idx; /* chunk we are parsing now */
185*4882a593Smuzhiyun 	u8 curchunk_hdrlen;
186*4882a593Smuzhiyun 	u8 curlen; /* total length of the msg */
187*4882a593Smuzhiyun 	bool have_somt;
188*4882a593Smuzhiyun 	bool have_eomt;
189*4882a593Smuzhiyun 	struct drm_dp_sideband_msg_hdr initial_hdr;
190*4882a593Smuzhiyun };
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun /**
193*4882a593Smuzhiyun  * struct drm_dp_mst_branch - MST branch device.
194*4882a593Smuzhiyun  * @rad: Relative Address to talk to this branch device.
195*4882a593Smuzhiyun  * @lct: Link count total to talk to this branch device.
196*4882a593Smuzhiyun  * @num_ports: number of ports on the branch.
197*4882a593Smuzhiyun  * @port_parent: pointer to the port parent, NULL if toplevel.
198*4882a593Smuzhiyun  * @mgr: topology manager for this branch device.
199*4882a593Smuzhiyun  * @link_address_sent: if a link address message has been sent to this device yet.
200*4882a593Smuzhiyun  * @guid: guid for DP 1.2 branch device. port under this branch can be
201*4882a593Smuzhiyun  * identified by port #.
202*4882a593Smuzhiyun  *
203*4882a593Smuzhiyun  * This structure represents an MST branch device, there is one
204*4882a593Smuzhiyun  * primary branch device at the root, along with any other branches connected
205*4882a593Smuzhiyun  * to downstream port of parent branches.
206*4882a593Smuzhiyun  */
207*4882a593Smuzhiyun struct drm_dp_mst_branch {
208*4882a593Smuzhiyun 	/**
209*4882a593Smuzhiyun 	 * @topology_kref: refcount for this branch device's lifetime in the
210*4882a593Smuzhiyun 	 * topology, only the DP MST helpers should need to touch this
211*4882a593Smuzhiyun 	 */
212*4882a593Smuzhiyun 	struct kref topology_kref;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	/**
215*4882a593Smuzhiyun 	 * @malloc_kref: refcount for the memory allocation containing this
216*4882a593Smuzhiyun 	 * structure. See drm_dp_mst_get_mstb_malloc() and
217*4882a593Smuzhiyun 	 * drm_dp_mst_put_mstb_malloc().
218*4882a593Smuzhiyun 	 */
219*4882a593Smuzhiyun 	struct kref malloc_kref;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS)
222*4882a593Smuzhiyun 	/**
223*4882a593Smuzhiyun 	 * @topology_ref_history: A history of each topology
224*4882a593Smuzhiyun 	 * reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.
225*4882a593Smuzhiyun 	 */
226*4882a593Smuzhiyun 	struct drm_dp_mst_topology_ref_history topology_ref_history;
227*4882a593Smuzhiyun #endif
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	/**
230*4882a593Smuzhiyun 	 * @destroy_next: linked-list entry used by
231*4882a593Smuzhiyun 	 * drm_dp_delayed_destroy_work()
232*4882a593Smuzhiyun 	 */
233*4882a593Smuzhiyun 	struct list_head destroy_next;
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	u8 rad[8];
236*4882a593Smuzhiyun 	u8 lct;
237*4882a593Smuzhiyun 	int num_ports;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	/**
240*4882a593Smuzhiyun 	 * @ports: the list of ports on this branch device. This should be
241*4882a593Smuzhiyun 	 * considered protected for reading by &drm_dp_mst_topology_mgr.lock.
242*4882a593Smuzhiyun 	 * There are two exceptions to this:
243*4882a593Smuzhiyun 	 * &drm_dp_mst_topology_mgr.up_req_work and
244*4882a593Smuzhiyun 	 * &drm_dp_mst_topology_mgr.work, which do not grab
245*4882a593Smuzhiyun 	 * &drm_dp_mst_topology_mgr.lock during reads but are the only
246*4882a593Smuzhiyun 	 * updaters of this list and are protected from updating the list
247*4882a593Smuzhiyun 	 * concurrently by @drm_dp_mst_topology_mgr.probe_lock
248*4882a593Smuzhiyun 	 */
249*4882a593Smuzhiyun 	struct list_head ports;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	struct drm_dp_mst_port *port_parent;
252*4882a593Smuzhiyun 	struct drm_dp_mst_topology_mgr *mgr;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	bool link_address_sent;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	/* global unique identifier to identify branch devices */
257*4882a593Smuzhiyun 	u8 guid[16];
258*4882a593Smuzhiyun };
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun struct drm_dp_nak_reply {
262*4882a593Smuzhiyun 	u8 guid[16];
263*4882a593Smuzhiyun 	u8 reason;
264*4882a593Smuzhiyun 	u8 nak_data;
265*4882a593Smuzhiyun };
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun struct drm_dp_link_address_ack_reply {
268*4882a593Smuzhiyun 	u8 guid[16];
269*4882a593Smuzhiyun 	u8 nports;
270*4882a593Smuzhiyun 	struct drm_dp_link_addr_reply_port {
271*4882a593Smuzhiyun 		bool input_port;
272*4882a593Smuzhiyun 		u8 peer_device_type;
273*4882a593Smuzhiyun 		u8 port_number;
274*4882a593Smuzhiyun 		bool mcs;
275*4882a593Smuzhiyun 		bool ddps;
276*4882a593Smuzhiyun 		bool legacy_device_plug_status;
277*4882a593Smuzhiyun 		u8 dpcd_revision;
278*4882a593Smuzhiyun 		u8 peer_guid[16];
279*4882a593Smuzhiyun 		u8 num_sdp_streams;
280*4882a593Smuzhiyun 		u8 num_sdp_stream_sinks;
281*4882a593Smuzhiyun 	} ports[16];
282*4882a593Smuzhiyun };
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun struct drm_dp_remote_dpcd_read_ack_reply {
285*4882a593Smuzhiyun 	u8 port_number;
286*4882a593Smuzhiyun 	u8 num_bytes;
287*4882a593Smuzhiyun 	u8 bytes[255];
288*4882a593Smuzhiyun };
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun struct drm_dp_remote_dpcd_write_ack_reply {
291*4882a593Smuzhiyun 	u8 port_number;
292*4882a593Smuzhiyun };
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun struct drm_dp_remote_dpcd_write_nak_reply {
295*4882a593Smuzhiyun 	u8 port_number;
296*4882a593Smuzhiyun 	u8 reason;
297*4882a593Smuzhiyun 	u8 bytes_written_before_failure;
298*4882a593Smuzhiyun };
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun struct drm_dp_remote_i2c_read_ack_reply {
301*4882a593Smuzhiyun 	u8 port_number;
302*4882a593Smuzhiyun 	u8 num_bytes;
303*4882a593Smuzhiyun 	u8 bytes[255];
304*4882a593Smuzhiyun };
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun struct drm_dp_remote_i2c_read_nak_reply {
307*4882a593Smuzhiyun 	u8 port_number;
308*4882a593Smuzhiyun 	u8 nak_reason;
309*4882a593Smuzhiyun 	u8 i2c_nak_transaction;
310*4882a593Smuzhiyun };
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun struct drm_dp_remote_i2c_write_ack_reply {
313*4882a593Smuzhiyun 	u8 port_number;
314*4882a593Smuzhiyun };
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun struct drm_dp_query_stream_enc_status_ack_reply {
317*4882a593Smuzhiyun 	/* Bit[23:16]- Stream Id */
318*4882a593Smuzhiyun 	u8 stream_id;
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	/* Bit[15]- Signed */
321*4882a593Smuzhiyun 	bool reply_signed;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	/* Bit[10:8]- Stream Output Sink Type */
324*4882a593Smuzhiyun 	bool unauthorizable_device_present;
325*4882a593Smuzhiyun 	bool legacy_device_present;
326*4882a593Smuzhiyun 	bool query_capable_device_present;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	/* Bit[12:11]- Stream Output CP Type */
329*4882a593Smuzhiyun 	bool hdcp_1x_device_present;
330*4882a593Smuzhiyun 	bool hdcp_2x_device_present;
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	/* Bit[4]- Stream Authentication */
333*4882a593Smuzhiyun 	bool auth_completed;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	/* Bit[3]- Stream Encryption */
336*4882a593Smuzhiyun 	bool encryption_enabled;
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	/* Bit[2]- Stream Repeater Function Present */
339*4882a593Smuzhiyun 	bool repeater_present;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	/* Bit[1:0]- Stream State */
342*4882a593Smuzhiyun 	u8 state;
343*4882a593Smuzhiyun };
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun #define DRM_DP_MAX_SDP_STREAMS 16
346*4882a593Smuzhiyun struct drm_dp_allocate_payload {
347*4882a593Smuzhiyun 	u8 port_number;
348*4882a593Smuzhiyun 	u8 number_sdp_streams;
349*4882a593Smuzhiyun 	u8 vcpi;
350*4882a593Smuzhiyun 	u16 pbn;
351*4882a593Smuzhiyun 	u8 sdp_stream_sink[DRM_DP_MAX_SDP_STREAMS];
352*4882a593Smuzhiyun };
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun struct drm_dp_allocate_payload_ack_reply {
355*4882a593Smuzhiyun 	u8 port_number;
356*4882a593Smuzhiyun 	u8 vcpi;
357*4882a593Smuzhiyun 	u16 allocated_pbn;
358*4882a593Smuzhiyun };
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun struct drm_dp_connection_status_notify {
361*4882a593Smuzhiyun 	u8 guid[16];
362*4882a593Smuzhiyun 	u8 port_number;
363*4882a593Smuzhiyun 	bool legacy_device_plug_status;
364*4882a593Smuzhiyun 	bool displayport_device_plug_status;
365*4882a593Smuzhiyun 	bool message_capability_status;
366*4882a593Smuzhiyun 	bool input_port;
367*4882a593Smuzhiyun 	u8 peer_device_type;
368*4882a593Smuzhiyun };
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun struct drm_dp_remote_dpcd_read {
371*4882a593Smuzhiyun 	u8 port_number;
372*4882a593Smuzhiyun 	u32 dpcd_address;
373*4882a593Smuzhiyun 	u8 num_bytes;
374*4882a593Smuzhiyun };
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun struct drm_dp_remote_dpcd_write {
377*4882a593Smuzhiyun 	u8 port_number;
378*4882a593Smuzhiyun 	u32 dpcd_address;
379*4882a593Smuzhiyun 	u8 num_bytes;
380*4882a593Smuzhiyun 	u8 *bytes;
381*4882a593Smuzhiyun };
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun #define DP_REMOTE_I2C_READ_MAX_TRANSACTIONS 4
384*4882a593Smuzhiyun struct drm_dp_remote_i2c_read {
385*4882a593Smuzhiyun 	u8 num_transactions;
386*4882a593Smuzhiyun 	u8 port_number;
387*4882a593Smuzhiyun 	struct drm_dp_remote_i2c_read_tx {
388*4882a593Smuzhiyun 		u8 i2c_dev_id;
389*4882a593Smuzhiyun 		u8 num_bytes;
390*4882a593Smuzhiyun 		u8 *bytes;
391*4882a593Smuzhiyun 		u8 no_stop_bit;
392*4882a593Smuzhiyun 		u8 i2c_transaction_delay;
393*4882a593Smuzhiyun 	} transactions[DP_REMOTE_I2C_READ_MAX_TRANSACTIONS];
394*4882a593Smuzhiyun 	u8 read_i2c_device_id;
395*4882a593Smuzhiyun 	u8 num_bytes_read;
396*4882a593Smuzhiyun };
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun struct drm_dp_remote_i2c_write {
399*4882a593Smuzhiyun 	u8 port_number;
400*4882a593Smuzhiyun 	u8 write_i2c_device_id;
401*4882a593Smuzhiyun 	u8 num_bytes;
402*4882a593Smuzhiyun 	u8 *bytes;
403*4882a593Smuzhiyun };
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun struct drm_dp_query_stream_enc_status {
406*4882a593Smuzhiyun 	u8 stream_id;
407*4882a593Smuzhiyun 	u8 client_id[7];	/* 56-bit nonce */
408*4882a593Smuzhiyun 	u8 stream_event;
409*4882a593Smuzhiyun 	bool valid_stream_event;
410*4882a593Smuzhiyun 	u8 stream_behavior;
411*4882a593Smuzhiyun 	u8 valid_stream_behavior;
412*4882a593Smuzhiyun };
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun /* this covers ENUM_RESOURCES, POWER_DOWN_PHY, POWER_UP_PHY */
415*4882a593Smuzhiyun struct drm_dp_port_number_req {
416*4882a593Smuzhiyun 	u8 port_number;
417*4882a593Smuzhiyun };
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun struct drm_dp_enum_path_resources_ack_reply {
420*4882a593Smuzhiyun 	u8 port_number;
421*4882a593Smuzhiyun 	bool fec_capable;
422*4882a593Smuzhiyun 	u16 full_payload_bw_number;
423*4882a593Smuzhiyun 	u16 avail_payload_bw_number;
424*4882a593Smuzhiyun };
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun /* covers POWER_DOWN_PHY, POWER_UP_PHY */
427*4882a593Smuzhiyun struct drm_dp_port_number_rep {
428*4882a593Smuzhiyun 	u8 port_number;
429*4882a593Smuzhiyun };
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun struct drm_dp_query_payload {
432*4882a593Smuzhiyun 	u8 port_number;
433*4882a593Smuzhiyun 	u8 vcpi;
434*4882a593Smuzhiyun };
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun struct drm_dp_resource_status_notify {
437*4882a593Smuzhiyun 	u8 port_number;
438*4882a593Smuzhiyun 	u8 guid[16];
439*4882a593Smuzhiyun 	u16 available_pbn;
440*4882a593Smuzhiyun };
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun struct drm_dp_query_payload_ack_reply {
443*4882a593Smuzhiyun 	u8 port_number;
444*4882a593Smuzhiyun 	u16 allocated_pbn;
445*4882a593Smuzhiyun };
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun struct drm_dp_sideband_msg_req_body {
448*4882a593Smuzhiyun 	u8 req_type;
449*4882a593Smuzhiyun 	union ack_req {
450*4882a593Smuzhiyun 		struct drm_dp_connection_status_notify conn_stat;
451*4882a593Smuzhiyun 		struct drm_dp_port_number_req port_num;
452*4882a593Smuzhiyun 		struct drm_dp_resource_status_notify resource_stat;
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 		struct drm_dp_query_payload query_payload;
455*4882a593Smuzhiyun 		struct drm_dp_allocate_payload allocate_payload;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 		struct drm_dp_remote_dpcd_read dpcd_read;
458*4882a593Smuzhiyun 		struct drm_dp_remote_dpcd_write dpcd_write;
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 		struct drm_dp_remote_i2c_read i2c_read;
461*4882a593Smuzhiyun 		struct drm_dp_remote_i2c_write i2c_write;
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 		struct drm_dp_query_stream_enc_status enc_status;
464*4882a593Smuzhiyun 	} u;
465*4882a593Smuzhiyun };
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun struct drm_dp_sideband_msg_reply_body {
468*4882a593Smuzhiyun 	u8 reply_type;
469*4882a593Smuzhiyun 	u8 req_type;
470*4882a593Smuzhiyun 	union ack_replies {
471*4882a593Smuzhiyun 		struct drm_dp_nak_reply nak;
472*4882a593Smuzhiyun 		struct drm_dp_link_address_ack_reply link_addr;
473*4882a593Smuzhiyun 		struct drm_dp_port_number_rep port_number;
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 		struct drm_dp_enum_path_resources_ack_reply path_resources;
476*4882a593Smuzhiyun 		struct drm_dp_allocate_payload_ack_reply allocate_payload;
477*4882a593Smuzhiyun 		struct drm_dp_query_payload_ack_reply query_payload;
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 		struct drm_dp_remote_dpcd_read_ack_reply remote_dpcd_read_ack;
480*4882a593Smuzhiyun 		struct drm_dp_remote_dpcd_write_ack_reply remote_dpcd_write_ack;
481*4882a593Smuzhiyun 		struct drm_dp_remote_dpcd_write_nak_reply remote_dpcd_write_nack;
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 		struct drm_dp_remote_i2c_read_ack_reply remote_i2c_read_ack;
484*4882a593Smuzhiyun 		struct drm_dp_remote_i2c_read_nak_reply remote_i2c_read_nack;
485*4882a593Smuzhiyun 		struct drm_dp_remote_i2c_write_ack_reply remote_i2c_write_ack;
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 		struct drm_dp_query_stream_enc_status_ack_reply enc_status;
488*4882a593Smuzhiyun 	} u;
489*4882a593Smuzhiyun };
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun /* msg is queued to be put into a slot */
492*4882a593Smuzhiyun #define DRM_DP_SIDEBAND_TX_QUEUED 0
493*4882a593Smuzhiyun /* msg has started transmitting on a slot - still on msgq */
494*4882a593Smuzhiyun #define DRM_DP_SIDEBAND_TX_START_SEND 1
495*4882a593Smuzhiyun /* msg has finished transmitting on a slot - removed from msgq only in slot */
496*4882a593Smuzhiyun #define DRM_DP_SIDEBAND_TX_SENT 2
497*4882a593Smuzhiyun /* msg has received a response - removed from slot */
498*4882a593Smuzhiyun #define DRM_DP_SIDEBAND_TX_RX 3
499*4882a593Smuzhiyun #define DRM_DP_SIDEBAND_TX_TIMEOUT 4
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun struct drm_dp_sideband_msg_tx {
502*4882a593Smuzhiyun 	u8 msg[256];
503*4882a593Smuzhiyun 	u8 chunk[48];
504*4882a593Smuzhiyun 	u8 cur_offset;
505*4882a593Smuzhiyun 	u8 cur_len;
506*4882a593Smuzhiyun 	struct drm_dp_mst_branch *dst;
507*4882a593Smuzhiyun 	struct list_head next;
508*4882a593Smuzhiyun 	int seqno;
509*4882a593Smuzhiyun 	int state;
510*4882a593Smuzhiyun 	bool path_msg;
511*4882a593Smuzhiyun 	struct drm_dp_sideband_msg_reply_body reply;
512*4882a593Smuzhiyun };
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun /* sideband msg handler */
515*4882a593Smuzhiyun struct drm_dp_mst_topology_mgr;
516*4882a593Smuzhiyun struct drm_dp_mst_topology_cbs {
517*4882a593Smuzhiyun 	/* create a connector for a port */
518*4882a593Smuzhiyun 	struct drm_connector *(*add_connector)(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *path);
519*4882a593Smuzhiyun 	/*
520*4882a593Smuzhiyun 	 * Checks for any pending MST interrupts, passing them to MST core for
521*4882a593Smuzhiyun 	 * processing, the same way an HPD IRQ pulse handler would do this.
522*4882a593Smuzhiyun 	 * If provided MST core calls this callback from a poll-waiting loop
523*4882a593Smuzhiyun 	 * when waiting for MST down message replies. The driver is expected
524*4882a593Smuzhiyun 	 * to guard against a race between this callback and the driver's HPD
525*4882a593Smuzhiyun 	 * IRQ pulse handler.
526*4882a593Smuzhiyun 	 */
527*4882a593Smuzhiyun 	void (*poll_hpd_irq)(struct drm_dp_mst_topology_mgr *mgr);
528*4882a593Smuzhiyun };
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun #define DP_MAX_PAYLOAD (sizeof(unsigned long) * 8)
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun #define DP_PAYLOAD_LOCAL 1
533*4882a593Smuzhiyun #define DP_PAYLOAD_REMOTE 2
534*4882a593Smuzhiyun #define DP_PAYLOAD_DELETE_LOCAL 3
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun struct drm_dp_payload {
537*4882a593Smuzhiyun 	int payload_state;
538*4882a593Smuzhiyun 	int start_slot;
539*4882a593Smuzhiyun 	int num_slots;
540*4882a593Smuzhiyun 	int vcpi;
541*4882a593Smuzhiyun };
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun #define to_dp_mst_topology_state(x) container_of(x, struct drm_dp_mst_topology_state, base)
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun struct drm_dp_vcpi_allocation {
546*4882a593Smuzhiyun 	struct drm_dp_mst_port *port;
547*4882a593Smuzhiyun 	int vcpi;
548*4882a593Smuzhiyun 	int pbn;
549*4882a593Smuzhiyun 	bool dsc_enabled;
550*4882a593Smuzhiyun 	struct list_head next;
551*4882a593Smuzhiyun };
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun struct drm_dp_mst_topology_state {
554*4882a593Smuzhiyun 	struct drm_private_state base;
555*4882a593Smuzhiyun 	struct list_head vcpis;
556*4882a593Smuzhiyun 	struct drm_dp_mst_topology_mgr *mgr;
557*4882a593Smuzhiyun };
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun #define to_dp_mst_topology_mgr(x) container_of(x, struct drm_dp_mst_topology_mgr, base)
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun /**
562*4882a593Smuzhiyun  * struct drm_dp_mst_topology_mgr - DisplayPort MST manager
563*4882a593Smuzhiyun  *
564*4882a593Smuzhiyun  * This struct represents the toplevel displayport MST topology manager.
565*4882a593Smuzhiyun  * There should be one instance of this for every MST capable DP connector
566*4882a593Smuzhiyun  * on the GPU.
567*4882a593Smuzhiyun  */
568*4882a593Smuzhiyun struct drm_dp_mst_topology_mgr {
569*4882a593Smuzhiyun 	/**
570*4882a593Smuzhiyun 	 * @base: Base private object for atomic
571*4882a593Smuzhiyun 	 */
572*4882a593Smuzhiyun 	struct drm_private_obj base;
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	/**
575*4882a593Smuzhiyun 	 * @dev: device pointer for adding i2c devices etc.
576*4882a593Smuzhiyun 	 */
577*4882a593Smuzhiyun 	struct drm_device *dev;
578*4882a593Smuzhiyun 	/**
579*4882a593Smuzhiyun 	 * @cbs: callbacks for connector addition and destruction.
580*4882a593Smuzhiyun 	 */
581*4882a593Smuzhiyun 	const struct drm_dp_mst_topology_cbs *cbs;
582*4882a593Smuzhiyun 	/**
583*4882a593Smuzhiyun 	 * @max_dpcd_transaction_bytes: maximum number of bytes to read/write
584*4882a593Smuzhiyun 	 * in one go.
585*4882a593Smuzhiyun 	 */
586*4882a593Smuzhiyun 	int max_dpcd_transaction_bytes;
587*4882a593Smuzhiyun 	/**
588*4882a593Smuzhiyun 	 * @aux: AUX channel for the DP MST connector this topolgy mgr is
589*4882a593Smuzhiyun 	 * controlling.
590*4882a593Smuzhiyun 	 */
591*4882a593Smuzhiyun 	struct drm_dp_aux *aux;
592*4882a593Smuzhiyun 	/**
593*4882a593Smuzhiyun 	 * @max_payloads: maximum number of payloads the GPU can generate.
594*4882a593Smuzhiyun 	 */
595*4882a593Smuzhiyun 	int max_payloads;
596*4882a593Smuzhiyun 	/**
597*4882a593Smuzhiyun 	 * @conn_base_id: DRM connector ID this mgr is connected to. Only used
598*4882a593Smuzhiyun 	 * to build the MST connector path value.
599*4882a593Smuzhiyun 	 */
600*4882a593Smuzhiyun 	int conn_base_id;
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 	/**
603*4882a593Smuzhiyun 	 * @up_req_recv: Message receiver state for up requests.
604*4882a593Smuzhiyun 	 */
605*4882a593Smuzhiyun 	struct drm_dp_sideband_msg_rx up_req_recv;
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	/**
608*4882a593Smuzhiyun 	 * @down_rep_recv: Message receiver state for replies to down
609*4882a593Smuzhiyun 	 * requests.
610*4882a593Smuzhiyun 	 */
611*4882a593Smuzhiyun 	struct drm_dp_sideband_msg_rx down_rep_recv;
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun 	/**
614*4882a593Smuzhiyun 	 * @lock: protects @mst_state, @mst_primary, @dpcd, and
615*4882a593Smuzhiyun 	 * @payload_id_table_cleared.
616*4882a593Smuzhiyun 	 */
617*4882a593Smuzhiyun 	struct mutex lock;
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun 	/**
620*4882a593Smuzhiyun 	 * @probe_lock: Prevents @work and @up_req_work, the only writers of
621*4882a593Smuzhiyun 	 * &drm_dp_mst_port.mstb and &drm_dp_mst_branch.ports, from racing
622*4882a593Smuzhiyun 	 * while they update the topology.
623*4882a593Smuzhiyun 	 */
624*4882a593Smuzhiyun 	struct mutex probe_lock;
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	/**
627*4882a593Smuzhiyun 	 * @mst_state: If this manager is enabled for an MST capable port. False
628*4882a593Smuzhiyun 	 * if no MST sink/branch devices is connected.
629*4882a593Smuzhiyun 	 */
630*4882a593Smuzhiyun 	bool mst_state : 1;
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	/**
633*4882a593Smuzhiyun 	 * @payload_id_table_cleared: Whether or not we've cleared the payload
634*4882a593Smuzhiyun 	 * ID table for @mst_primary. Protected by @lock.
635*4882a593Smuzhiyun 	 */
636*4882a593Smuzhiyun 	bool payload_id_table_cleared : 1;
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 	/**
639*4882a593Smuzhiyun 	 * @mst_primary: Pointer to the primary/first branch device.
640*4882a593Smuzhiyun 	 */
641*4882a593Smuzhiyun 	struct drm_dp_mst_branch *mst_primary;
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	/**
644*4882a593Smuzhiyun 	 * @dpcd: Cache of DPCD for primary port.
645*4882a593Smuzhiyun 	 */
646*4882a593Smuzhiyun 	u8 dpcd[DP_RECEIVER_CAP_SIZE];
647*4882a593Smuzhiyun 	/**
648*4882a593Smuzhiyun 	 * @sink_count: Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0.
649*4882a593Smuzhiyun 	 */
650*4882a593Smuzhiyun 	u8 sink_count;
651*4882a593Smuzhiyun 	/**
652*4882a593Smuzhiyun 	 * @pbn_div: PBN to slots divisor.
653*4882a593Smuzhiyun 	 */
654*4882a593Smuzhiyun 	int pbn_div;
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	/**
657*4882a593Smuzhiyun 	 * @funcs: Atomic helper callbacks
658*4882a593Smuzhiyun 	 */
659*4882a593Smuzhiyun 	const struct drm_private_state_funcs *funcs;
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 	/**
662*4882a593Smuzhiyun 	 * @qlock: protects @tx_msg_downq and &drm_dp_sideband_msg_tx.state
663*4882a593Smuzhiyun 	 */
664*4882a593Smuzhiyun 	struct mutex qlock;
665*4882a593Smuzhiyun 
666*4882a593Smuzhiyun 	/**
667*4882a593Smuzhiyun 	 * @tx_msg_downq: List of pending down requests
668*4882a593Smuzhiyun 	 */
669*4882a593Smuzhiyun 	struct list_head tx_msg_downq;
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun 	/**
672*4882a593Smuzhiyun 	 * @payload_lock: Protect payload information.
673*4882a593Smuzhiyun 	 */
674*4882a593Smuzhiyun 	struct mutex payload_lock;
675*4882a593Smuzhiyun 	/**
676*4882a593Smuzhiyun 	 * @proposed_vcpis: Array of pointers for the new VCPI allocation. The
677*4882a593Smuzhiyun 	 * VCPI structure itself is &drm_dp_mst_port.vcpi, and the size of
678*4882a593Smuzhiyun 	 * this array is determined by @max_payloads.
679*4882a593Smuzhiyun 	 */
680*4882a593Smuzhiyun 	struct drm_dp_vcpi **proposed_vcpis;
681*4882a593Smuzhiyun 	/**
682*4882a593Smuzhiyun 	 * @payloads: Array of payloads. The size of this array is determined
683*4882a593Smuzhiyun 	 * by @max_payloads.
684*4882a593Smuzhiyun 	 */
685*4882a593Smuzhiyun 	struct drm_dp_payload *payloads;
686*4882a593Smuzhiyun 	/**
687*4882a593Smuzhiyun 	 * @payload_mask: Elements of @payloads actually in use. Since
688*4882a593Smuzhiyun 	 * reallocation of active outputs isn't possible gaps can be created by
689*4882a593Smuzhiyun 	 * disabling outputs out of order compared to how they've been enabled.
690*4882a593Smuzhiyun 	 */
691*4882a593Smuzhiyun 	unsigned long payload_mask;
692*4882a593Smuzhiyun 	/**
693*4882a593Smuzhiyun 	 * @vcpi_mask: Similar to @payload_mask, but for @proposed_vcpis.
694*4882a593Smuzhiyun 	 */
695*4882a593Smuzhiyun 	unsigned long vcpi_mask;
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	/**
698*4882a593Smuzhiyun 	 * @tx_waitq: Wait to queue stall for the tx worker.
699*4882a593Smuzhiyun 	 */
700*4882a593Smuzhiyun 	wait_queue_head_t tx_waitq;
701*4882a593Smuzhiyun 	/**
702*4882a593Smuzhiyun 	 * @work: Probe work.
703*4882a593Smuzhiyun 	 */
704*4882a593Smuzhiyun 	struct work_struct work;
705*4882a593Smuzhiyun 	/**
706*4882a593Smuzhiyun 	 * @tx_work: Sideband transmit worker. This can nest within the main
707*4882a593Smuzhiyun 	 * @work worker for each transaction @work launches.
708*4882a593Smuzhiyun 	 */
709*4882a593Smuzhiyun 	struct work_struct tx_work;
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	/**
712*4882a593Smuzhiyun 	 * @destroy_port_list: List of to be destroyed connectors.
713*4882a593Smuzhiyun 	 */
714*4882a593Smuzhiyun 	struct list_head destroy_port_list;
715*4882a593Smuzhiyun 	/**
716*4882a593Smuzhiyun 	 * @destroy_branch_device_list: List of to be destroyed branch
717*4882a593Smuzhiyun 	 * devices.
718*4882a593Smuzhiyun 	 */
719*4882a593Smuzhiyun 	struct list_head destroy_branch_device_list;
720*4882a593Smuzhiyun 	/**
721*4882a593Smuzhiyun 	 * @delayed_destroy_lock: Protects @destroy_port_list and
722*4882a593Smuzhiyun 	 * @destroy_branch_device_list.
723*4882a593Smuzhiyun 	 */
724*4882a593Smuzhiyun 	struct mutex delayed_destroy_lock;
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun 	/**
727*4882a593Smuzhiyun 	 * @delayed_destroy_wq: Workqueue used for delayed_destroy_work items.
728*4882a593Smuzhiyun 	 * A dedicated WQ makes it possible to drain any requeued work items
729*4882a593Smuzhiyun 	 * on it.
730*4882a593Smuzhiyun 	 */
731*4882a593Smuzhiyun 	struct workqueue_struct *delayed_destroy_wq;
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun 	/**
734*4882a593Smuzhiyun 	 * @delayed_destroy_work: Work item to destroy MST port and branch
735*4882a593Smuzhiyun 	 * devices, needed to avoid locking inversion.
736*4882a593Smuzhiyun 	 */
737*4882a593Smuzhiyun 	struct work_struct delayed_destroy_work;
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun 	/**
740*4882a593Smuzhiyun 	 * @up_req_list: List of pending up requests from the topology that
741*4882a593Smuzhiyun 	 * need to be processed, in chronological order.
742*4882a593Smuzhiyun 	 */
743*4882a593Smuzhiyun 	struct list_head up_req_list;
744*4882a593Smuzhiyun 	/**
745*4882a593Smuzhiyun 	 * @up_req_lock: Protects @up_req_list
746*4882a593Smuzhiyun 	 */
747*4882a593Smuzhiyun 	struct mutex up_req_lock;
748*4882a593Smuzhiyun 	/**
749*4882a593Smuzhiyun 	 * @up_req_work: Work item to process up requests received from the
750*4882a593Smuzhiyun 	 * topology. Needed to avoid blocking hotplug handling and sideband
751*4882a593Smuzhiyun 	 * transmissions.
752*4882a593Smuzhiyun 	 */
753*4882a593Smuzhiyun 	struct work_struct up_req_work;
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS)
756*4882a593Smuzhiyun 	/**
757*4882a593Smuzhiyun 	 * @topology_ref_history_lock: protects
758*4882a593Smuzhiyun 	 * &drm_dp_mst_port.topology_ref_history and
759*4882a593Smuzhiyun 	 * &drm_dp_mst_branch.topology_ref_history.
760*4882a593Smuzhiyun 	 */
761*4882a593Smuzhiyun 	struct mutex topology_ref_history_lock;
762*4882a593Smuzhiyun #endif
763*4882a593Smuzhiyun };
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr,
766*4882a593Smuzhiyun 				 struct drm_device *dev, struct drm_dp_aux *aux,
767*4882a593Smuzhiyun 				 int max_dpcd_transaction_bytes,
768*4882a593Smuzhiyun 				 int max_payloads, int conn_base_id);
769*4882a593Smuzhiyun 
770*4882a593Smuzhiyun void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr);
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun bool drm_dp_read_mst_cap(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
773*4882a593Smuzhiyun int drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool mst_state);
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun int drm_dp_mst_hpd_irq(struct drm_dp_mst_topology_mgr *mgr, u8 *esi, bool *handled);
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 
778*4882a593Smuzhiyun int
779*4882a593Smuzhiyun drm_dp_mst_detect_port(struct drm_connector *connector,
780*4882a593Smuzhiyun 		       struct drm_modeset_acquire_ctx *ctx,
781*4882a593Smuzhiyun 		       struct drm_dp_mst_topology_mgr *mgr,
782*4882a593Smuzhiyun 		       struct drm_dp_mst_port *port);
783*4882a593Smuzhiyun 
784*4882a593Smuzhiyun struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun int drm_dp_get_vc_payload_bw(int link_rate, int link_lane_count);
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc);
789*4882a593Smuzhiyun 
790*4882a593Smuzhiyun bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr,
791*4882a593Smuzhiyun 			      struct drm_dp_mst_port *port, int pbn, int slots);
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun int drm_dp_mst_get_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun 
796*4882a593Smuzhiyun void drm_dp_mst_reset_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 
799*4882a593Smuzhiyun void drm_dp_mst_deallocate_vcpi(struct drm_dp_mst_topology_mgr *mgr,
800*4882a593Smuzhiyun 				struct drm_dp_mst_port *port);
801*4882a593Smuzhiyun 
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun int drm_dp_find_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr,
804*4882a593Smuzhiyun 			   int pbn);
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun 
807*4882a593Smuzhiyun int drm_dp_update_payload_part1(struct drm_dp_mst_topology_mgr *mgr);
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun 
810*4882a593Smuzhiyun int drm_dp_update_payload_part2(struct drm_dp_mst_topology_mgr *mgr);
811*4882a593Smuzhiyun 
812*4882a593Smuzhiyun int drm_dp_check_act_status(struct drm_dp_mst_topology_mgr *mgr);
813*4882a593Smuzhiyun 
814*4882a593Smuzhiyun void drm_dp_mst_dump_topology(struct seq_file *m,
815*4882a593Smuzhiyun 			      struct drm_dp_mst_topology_mgr *mgr);
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun void drm_dp_mst_topology_mgr_suspend(struct drm_dp_mst_topology_mgr *mgr);
818*4882a593Smuzhiyun int __must_check
819*4882a593Smuzhiyun drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr,
820*4882a593Smuzhiyun 			       bool sync);
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun ssize_t drm_dp_mst_dpcd_read(struct drm_dp_aux *aux,
823*4882a593Smuzhiyun 			     unsigned int offset, void *buffer, size_t size);
824*4882a593Smuzhiyun ssize_t drm_dp_mst_dpcd_write(struct drm_dp_aux *aux,
825*4882a593Smuzhiyun 			      unsigned int offset, void *buffer, size_t size);
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun int drm_dp_mst_connector_late_register(struct drm_connector *connector,
828*4882a593Smuzhiyun 				       struct drm_dp_mst_port *port);
829*4882a593Smuzhiyun void drm_dp_mst_connector_early_unregister(struct drm_connector *connector,
830*4882a593Smuzhiyun 					   struct drm_dp_mst_port *port);
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun struct drm_dp_mst_topology_state *drm_atomic_get_mst_topology_state(struct drm_atomic_state *state,
833*4882a593Smuzhiyun 								    struct drm_dp_mst_topology_mgr *mgr);
834*4882a593Smuzhiyun int __must_check
835*4882a593Smuzhiyun drm_dp_atomic_find_vcpi_slots(struct drm_atomic_state *state,
836*4882a593Smuzhiyun 			      struct drm_dp_mst_topology_mgr *mgr,
837*4882a593Smuzhiyun 			      struct drm_dp_mst_port *port, int pbn,
838*4882a593Smuzhiyun 			      int pbn_div);
839*4882a593Smuzhiyun int drm_dp_mst_atomic_enable_dsc(struct drm_atomic_state *state,
840*4882a593Smuzhiyun 				 struct drm_dp_mst_port *port,
841*4882a593Smuzhiyun 				 int pbn, int pbn_div,
842*4882a593Smuzhiyun 				 bool enable);
843*4882a593Smuzhiyun int __must_check
844*4882a593Smuzhiyun drm_dp_mst_add_affected_dsc_crtcs(struct drm_atomic_state *state,
845*4882a593Smuzhiyun 				  struct drm_dp_mst_topology_mgr *mgr);
846*4882a593Smuzhiyun int __must_check
847*4882a593Smuzhiyun drm_dp_atomic_release_vcpi_slots(struct drm_atomic_state *state,
848*4882a593Smuzhiyun 				 struct drm_dp_mst_topology_mgr *mgr,
849*4882a593Smuzhiyun 				 struct drm_dp_mst_port *port);
850*4882a593Smuzhiyun int drm_dp_send_power_updown_phy(struct drm_dp_mst_topology_mgr *mgr,
851*4882a593Smuzhiyun 				 struct drm_dp_mst_port *port, bool power_up);
852*4882a593Smuzhiyun int drm_dp_send_query_stream_enc_status(struct drm_dp_mst_topology_mgr *mgr,
853*4882a593Smuzhiyun 		struct drm_dp_mst_port *port,
854*4882a593Smuzhiyun 		struct drm_dp_query_stream_enc_status_ack_reply *status);
855*4882a593Smuzhiyun int __must_check drm_dp_mst_atomic_check(struct drm_atomic_state *state);
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun void drm_dp_mst_get_port_malloc(struct drm_dp_mst_port *port);
858*4882a593Smuzhiyun void drm_dp_mst_put_port_malloc(struct drm_dp_mst_port *port);
859*4882a593Smuzhiyun 
860*4882a593Smuzhiyun struct drm_dp_aux *drm_dp_mst_dsc_aux_for_port(struct drm_dp_mst_port *port);
861*4882a593Smuzhiyun 
862*4882a593Smuzhiyun extern const struct drm_private_state_funcs drm_dp_mst_topology_state_funcs;
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun /**
865*4882a593Smuzhiyun  * __drm_dp_mst_state_iter_get - private atomic state iterator function for
866*4882a593Smuzhiyun  * macro-internal use
867*4882a593Smuzhiyun  * @state: &struct drm_atomic_state pointer
868*4882a593Smuzhiyun  * @mgr: pointer to the &struct drm_dp_mst_topology_mgr iteration cursor
869*4882a593Smuzhiyun  * @old_state: optional pointer to the old &struct drm_dp_mst_topology_state
870*4882a593Smuzhiyun  * iteration cursor
871*4882a593Smuzhiyun  * @new_state: optional pointer to the new &struct drm_dp_mst_topology_state
872*4882a593Smuzhiyun  * iteration cursor
873*4882a593Smuzhiyun  * @i: int iteration cursor, for macro-internal use
874*4882a593Smuzhiyun  *
875*4882a593Smuzhiyun  * Used by for_each_oldnew_mst_mgr_in_state(),
876*4882a593Smuzhiyun  * for_each_old_mst_mgr_in_state(), and for_each_new_mst_mgr_in_state(). Don't
877*4882a593Smuzhiyun  * call this directly.
878*4882a593Smuzhiyun  *
879*4882a593Smuzhiyun  * Returns:
880*4882a593Smuzhiyun  * True if the current &struct drm_private_obj is a &struct
881*4882a593Smuzhiyun  * drm_dp_mst_topology_mgr, false otherwise.
882*4882a593Smuzhiyun  */
883*4882a593Smuzhiyun static inline bool
__drm_dp_mst_state_iter_get(struct drm_atomic_state * state,struct drm_dp_mst_topology_mgr ** mgr,struct drm_dp_mst_topology_state ** old_state,struct drm_dp_mst_topology_state ** new_state,int i)884*4882a593Smuzhiyun __drm_dp_mst_state_iter_get(struct drm_atomic_state *state,
885*4882a593Smuzhiyun 			    struct drm_dp_mst_topology_mgr **mgr,
886*4882a593Smuzhiyun 			    struct drm_dp_mst_topology_state **old_state,
887*4882a593Smuzhiyun 			    struct drm_dp_mst_topology_state **new_state,
888*4882a593Smuzhiyun 			    int i)
889*4882a593Smuzhiyun {
890*4882a593Smuzhiyun 	struct __drm_private_objs_state *objs_state = &state->private_objs[i];
891*4882a593Smuzhiyun 
892*4882a593Smuzhiyun 	if (objs_state->ptr->funcs != &drm_dp_mst_topology_state_funcs)
893*4882a593Smuzhiyun 		return false;
894*4882a593Smuzhiyun 
895*4882a593Smuzhiyun 	*mgr = to_dp_mst_topology_mgr(objs_state->ptr);
896*4882a593Smuzhiyun 	if (old_state)
897*4882a593Smuzhiyun 		*old_state = to_dp_mst_topology_state(objs_state->old_state);
898*4882a593Smuzhiyun 	if (new_state)
899*4882a593Smuzhiyun 		*new_state = to_dp_mst_topology_state(objs_state->new_state);
900*4882a593Smuzhiyun 
901*4882a593Smuzhiyun 	return true;
902*4882a593Smuzhiyun }
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun /**
905*4882a593Smuzhiyun  * for_each_oldnew_mst_mgr_in_state - iterate over all DP MST topology
906*4882a593Smuzhiyun  * managers in an atomic update
907*4882a593Smuzhiyun  * @__state: &struct drm_atomic_state pointer
908*4882a593Smuzhiyun  * @mgr: &struct drm_dp_mst_topology_mgr iteration cursor
909*4882a593Smuzhiyun  * @old_state: &struct drm_dp_mst_topology_state iteration cursor for the old
910*4882a593Smuzhiyun  * state
911*4882a593Smuzhiyun  * @new_state: &struct drm_dp_mst_topology_state iteration cursor for the new
912*4882a593Smuzhiyun  * state
913*4882a593Smuzhiyun  * @__i: int iteration cursor, for macro-internal use
914*4882a593Smuzhiyun  *
915*4882a593Smuzhiyun  * This iterates over all DRM DP MST topology managers in an atomic update,
916*4882a593Smuzhiyun  * tracking both old and new state. This is useful in places where the state
917*4882a593Smuzhiyun  * delta needs to be considered, for example in atomic check functions.
918*4882a593Smuzhiyun  */
919*4882a593Smuzhiyun #define for_each_oldnew_mst_mgr_in_state(__state, mgr, old_state, new_state, __i) \
920*4882a593Smuzhiyun 	for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
921*4882a593Smuzhiyun 		for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), &(old_state), &(new_state), (__i)))
922*4882a593Smuzhiyun 
923*4882a593Smuzhiyun /**
924*4882a593Smuzhiyun  * for_each_old_mst_mgr_in_state - iterate over all DP MST topology managers
925*4882a593Smuzhiyun  * in an atomic update
926*4882a593Smuzhiyun  * @__state: &struct drm_atomic_state pointer
927*4882a593Smuzhiyun  * @mgr: &struct drm_dp_mst_topology_mgr iteration cursor
928*4882a593Smuzhiyun  * @old_state: &struct drm_dp_mst_topology_state iteration cursor for the old
929*4882a593Smuzhiyun  * state
930*4882a593Smuzhiyun  * @__i: int iteration cursor, for macro-internal use
931*4882a593Smuzhiyun  *
932*4882a593Smuzhiyun  * This iterates over all DRM DP MST topology managers in an atomic update,
933*4882a593Smuzhiyun  * tracking only the old state. This is useful in disable functions, where we
934*4882a593Smuzhiyun  * need the old state the hardware is still in.
935*4882a593Smuzhiyun  */
936*4882a593Smuzhiyun #define for_each_old_mst_mgr_in_state(__state, mgr, old_state, __i) \
937*4882a593Smuzhiyun 	for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
938*4882a593Smuzhiyun 		for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), &(old_state), NULL, (__i)))
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun /**
941*4882a593Smuzhiyun  * for_each_new_mst_mgr_in_state - iterate over all DP MST topology managers
942*4882a593Smuzhiyun  * in an atomic update
943*4882a593Smuzhiyun  * @__state: &struct drm_atomic_state pointer
944*4882a593Smuzhiyun  * @mgr: &struct drm_dp_mst_topology_mgr iteration cursor
945*4882a593Smuzhiyun  * @new_state: &struct drm_dp_mst_topology_state iteration cursor for the new
946*4882a593Smuzhiyun  * state
947*4882a593Smuzhiyun  * @__i: int iteration cursor, for macro-internal use
948*4882a593Smuzhiyun  *
949*4882a593Smuzhiyun  * This iterates over all DRM DP MST topology managers in an atomic update,
950*4882a593Smuzhiyun  * tracking only the new state. This is useful in enable functions, where we
951*4882a593Smuzhiyun  * need the new state the hardware should be in when the atomic commit
952*4882a593Smuzhiyun  * operation has completed.
953*4882a593Smuzhiyun  */
954*4882a593Smuzhiyun #define for_each_new_mst_mgr_in_state(__state, mgr, new_state, __i) \
955*4882a593Smuzhiyun 	for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
956*4882a593Smuzhiyun 		for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), NULL, &(new_state), (__i)))
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun #endif
959