1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright © 2016 Intel Corporation 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a 5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"), 6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation 7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the 9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions: 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in 12*4882a593Smuzhiyun * all copies or substantial portions of the Software. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #ifndef DRM_DP_DUAL_MODE_HELPER_H 24*4882a593Smuzhiyun #define DRM_DP_DUAL_MODE_HELPER_H 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #include <linux/types.h> 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* 29*4882a593Smuzhiyun * Optional for type 1 DVI adaptors 30*4882a593Smuzhiyun * Mandatory for type 1 HDMI and type 2 adaptors 31*4882a593Smuzhiyun */ 32*4882a593Smuzhiyun #define DP_DUAL_MODE_HDMI_ID 0x00 /* 00-0f */ 33*4882a593Smuzhiyun #define DP_DUAL_MODE_HDMI_ID_LEN 16 34*4882a593Smuzhiyun /* 35*4882a593Smuzhiyun * Optional for type 1 adaptors 36*4882a593Smuzhiyun * Mandatory for type 2 adaptors 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun #define DP_DUAL_MODE_ADAPTOR_ID 0x10 39*4882a593Smuzhiyun #define DP_DUAL_MODE_REV_MASK 0x07 40*4882a593Smuzhiyun #define DP_DUAL_MODE_REV_TYPE2 0x00 41*4882a593Smuzhiyun #define DP_DUAL_MODE_TYPE_MASK 0xf0 42*4882a593Smuzhiyun #define DP_DUAL_MODE_TYPE_TYPE2 0xa0 43*4882a593Smuzhiyun /* This field is marked reserved in dual mode spec, used in LSPCON */ 44*4882a593Smuzhiyun #define DP_DUAL_MODE_TYPE_HAS_DPCD 0x08 45*4882a593Smuzhiyun #define DP_DUAL_MODE_IEEE_OUI 0x11 /* 11-13*/ 46*4882a593Smuzhiyun #define DP_DUAL_IEEE_OUI_LEN 3 47*4882a593Smuzhiyun #define DP_DUAL_DEVICE_ID 0x14 /* 14-19 */ 48*4882a593Smuzhiyun #define DP_DUAL_DEVICE_ID_LEN 6 49*4882a593Smuzhiyun #define DP_DUAL_MODE_HARDWARE_REV 0x1a 50*4882a593Smuzhiyun #define DP_DUAL_MODE_FIRMWARE_MAJOR_REV 0x1b 51*4882a593Smuzhiyun #define DP_DUAL_MODE_FIRMWARE_MINOR_REV 0x1c 52*4882a593Smuzhiyun #define DP_DUAL_MODE_MAX_TMDS_CLOCK 0x1d 53*4882a593Smuzhiyun #define DP_DUAL_MODE_I2C_SPEED_CAP 0x1e 54*4882a593Smuzhiyun #define DP_DUAL_MODE_TMDS_OEN 0x20 55*4882a593Smuzhiyun #define DP_DUAL_MODE_TMDS_DISABLE 0x01 56*4882a593Smuzhiyun #define DP_DUAL_MODE_HDMI_PIN_CTRL 0x21 57*4882a593Smuzhiyun #define DP_DUAL_MODE_CEC_ENABLE 0x01 58*4882a593Smuzhiyun #define DP_DUAL_MODE_I2C_SPEED_CTRL 0x22 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun /* LSPCON specific registers, defined by MCA */ 61*4882a593Smuzhiyun #define DP_DUAL_MODE_LSPCON_MODE_CHANGE 0x40 62*4882a593Smuzhiyun #define DP_DUAL_MODE_LSPCON_CURRENT_MODE 0x41 63*4882a593Smuzhiyun #define DP_DUAL_MODE_LSPCON_MODE_PCON 0x1 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun struct i2c_adapter; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun ssize_t drm_dp_dual_mode_read(struct i2c_adapter *adapter, 68*4882a593Smuzhiyun u8 offset, void *buffer, size_t size); 69*4882a593Smuzhiyun ssize_t drm_dp_dual_mode_write(struct i2c_adapter *adapter, 70*4882a593Smuzhiyun u8 offset, const void *buffer, size_t size); 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /** 73*4882a593Smuzhiyun * enum drm_lspcon_mode 74*4882a593Smuzhiyun * @DRM_LSPCON_MODE_INVALID: No LSPCON. 75*4882a593Smuzhiyun * @DRM_LSPCON_MODE_LS: Level shifter mode of LSPCON 76*4882a593Smuzhiyun * which drives DP++ to HDMI 1.4 conversion. 77*4882a593Smuzhiyun * @DRM_LSPCON_MODE_PCON: Protocol converter mode of LSPCON 78*4882a593Smuzhiyun * which drives DP++ to HDMI 2.0 active conversion. 79*4882a593Smuzhiyun */ 80*4882a593Smuzhiyun enum drm_lspcon_mode { 81*4882a593Smuzhiyun DRM_LSPCON_MODE_INVALID, 82*4882a593Smuzhiyun DRM_LSPCON_MODE_LS, 83*4882a593Smuzhiyun DRM_LSPCON_MODE_PCON, 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun /** 87*4882a593Smuzhiyun * enum drm_dp_dual_mode_type - Type of the DP dual mode adaptor 88*4882a593Smuzhiyun * @DRM_DP_DUAL_MODE_NONE: No DP dual mode adaptor 89*4882a593Smuzhiyun * @DRM_DP_DUAL_MODE_UNKNOWN: Could be either none or type 1 DVI adaptor 90*4882a593Smuzhiyun * @DRM_DP_DUAL_MODE_TYPE1_DVI: Type 1 DVI adaptor 91*4882a593Smuzhiyun * @DRM_DP_DUAL_MODE_TYPE1_HDMI: Type 1 HDMI adaptor 92*4882a593Smuzhiyun * @DRM_DP_DUAL_MODE_TYPE2_DVI: Type 2 DVI adaptor 93*4882a593Smuzhiyun * @DRM_DP_DUAL_MODE_TYPE2_HDMI: Type 2 HDMI adaptor 94*4882a593Smuzhiyun * @DRM_DP_DUAL_MODE_LSPCON: Level shifter / protocol converter 95*4882a593Smuzhiyun */ 96*4882a593Smuzhiyun enum drm_dp_dual_mode_type { 97*4882a593Smuzhiyun DRM_DP_DUAL_MODE_NONE, 98*4882a593Smuzhiyun DRM_DP_DUAL_MODE_UNKNOWN, 99*4882a593Smuzhiyun DRM_DP_DUAL_MODE_TYPE1_DVI, 100*4882a593Smuzhiyun DRM_DP_DUAL_MODE_TYPE1_HDMI, 101*4882a593Smuzhiyun DRM_DP_DUAL_MODE_TYPE2_DVI, 102*4882a593Smuzhiyun DRM_DP_DUAL_MODE_TYPE2_HDMI, 103*4882a593Smuzhiyun DRM_DP_DUAL_MODE_LSPCON, 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun enum drm_dp_dual_mode_type drm_dp_dual_mode_detect(struct i2c_adapter *adapter); 107*4882a593Smuzhiyun int drm_dp_dual_mode_max_tmds_clock(enum drm_dp_dual_mode_type type, 108*4882a593Smuzhiyun struct i2c_adapter *adapter); 109*4882a593Smuzhiyun int drm_dp_dual_mode_get_tmds_output(enum drm_dp_dual_mode_type type, 110*4882a593Smuzhiyun struct i2c_adapter *adapter, bool *enabled); 111*4882a593Smuzhiyun int drm_dp_dual_mode_set_tmds_output(enum drm_dp_dual_mode_type type, 112*4882a593Smuzhiyun struct i2c_adapter *adapter, bool enable); 113*4882a593Smuzhiyun const char *drm_dp_get_dual_mode_type_name(enum drm_dp_dual_mode_type type); 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun int drm_lspcon_get_mode(struct i2c_adapter *adapter, 116*4882a593Smuzhiyun enum drm_lspcon_mode *current_mode); 117*4882a593Smuzhiyun int drm_lspcon_set_mode(struct i2c_adapter *adapter, 118*4882a593Smuzhiyun enum drm_lspcon_mode reqd_mode); 119*4882a593Smuzhiyun #endif 120