xref: /OK3568_Linux_fs/kernel/include/clocksource/arm_arch_timer.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2012 ARM Ltd.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun #ifndef __CLKSOURCE_ARM_ARCH_TIMER_H
6*4882a593Smuzhiyun #define __CLKSOURCE_ARM_ARCH_TIMER_H
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/bitops.h>
9*4882a593Smuzhiyun #include <linux/timecounter.h>
10*4882a593Smuzhiyun #include <linux/types.h>
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #define ARCH_TIMER_TYPE_CP15		BIT(0)
13*4882a593Smuzhiyun #define ARCH_TIMER_TYPE_MEM		BIT(1)
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define ARCH_TIMER_CTRL_ENABLE		(1 << 0)
16*4882a593Smuzhiyun #define ARCH_TIMER_CTRL_IT_MASK		(1 << 1)
17*4882a593Smuzhiyun #define ARCH_TIMER_CTRL_IT_STAT		(1 << 2)
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define CNTHCTL_EL1PCTEN		(1 << 0)
20*4882a593Smuzhiyun #define CNTHCTL_EL1PCEN			(1 << 1)
21*4882a593Smuzhiyun #define CNTHCTL_EVNTEN			(1 << 2)
22*4882a593Smuzhiyun #define CNTHCTL_EVNTDIR			(1 << 3)
23*4882a593Smuzhiyun #define CNTHCTL_EVNTI			(0xF << 4)
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun enum arch_timer_reg {
26*4882a593Smuzhiyun 	ARCH_TIMER_REG_CTRL,
27*4882a593Smuzhiyun 	ARCH_TIMER_REG_TVAL,
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun enum arch_timer_ppi_nr {
31*4882a593Smuzhiyun 	ARCH_TIMER_PHYS_SECURE_PPI,
32*4882a593Smuzhiyun 	ARCH_TIMER_PHYS_NONSECURE_PPI,
33*4882a593Smuzhiyun 	ARCH_TIMER_VIRT_PPI,
34*4882a593Smuzhiyun 	ARCH_TIMER_HYP_PPI,
35*4882a593Smuzhiyun 	ARCH_TIMER_MAX_TIMER_PPI
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun enum arch_timer_spi_nr {
39*4882a593Smuzhiyun 	ARCH_TIMER_PHYS_SPI,
40*4882a593Smuzhiyun 	ARCH_TIMER_VIRT_SPI,
41*4882a593Smuzhiyun 	ARCH_TIMER_MAX_TIMER_SPI
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define ARCH_TIMER_PHYS_ACCESS		0
45*4882a593Smuzhiyun #define ARCH_TIMER_VIRT_ACCESS		1
46*4882a593Smuzhiyun #define ARCH_TIMER_MEM_PHYS_ACCESS	2
47*4882a593Smuzhiyun #define ARCH_TIMER_MEM_VIRT_ACCESS	3
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define ARCH_TIMER_MEM_MAX_FRAMES	8
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define ARCH_TIMER_USR_PCT_ACCESS_EN	(1 << 0) /* physical counter */
52*4882a593Smuzhiyun #define ARCH_TIMER_USR_VCT_ACCESS_EN	(1 << 1) /* virtual counter */
53*4882a593Smuzhiyun #define ARCH_TIMER_VIRT_EVT_EN		(1 << 2)
54*4882a593Smuzhiyun #define ARCH_TIMER_EVT_TRIGGER_SHIFT	(4)
55*4882a593Smuzhiyun #define ARCH_TIMER_EVT_TRIGGER_MASK	(0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT)
56*4882a593Smuzhiyun #define ARCH_TIMER_USR_VT_ACCESS_EN	(1 << 8) /* virtual timer registers */
57*4882a593Smuzhiyun #define ARCH_TIMER_USR_PT_ACCESS_EN	(1 << 9) /* physical timer registers */
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun #define ARCH_TIMER_EVT_STREAM_PERIOD_US	100
60*4882a593Smuzhiyun #define ARCH_TIMER_EVT_STREAM_FREQ				\
61*4882a593Smuzhiyun 	(USEC_PER_SEC / ARCH_TIMER_EVT_STREAM_PERIOD_US)
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun struct arch_timer_kvm_info {
64*4882a593Smuzhiyun 	struct timecounter timecounter;
65*4882a593Smuzhiyun 	int virtual_irq;
66*4882a593Smuzhiyun 	int physical_irq;
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun struct arch_timer_mem_frame {
70*4882a593Smuzhiyun 	bool valid;
71*4882a593Smuzhiyun 	phys_addr_t cntbase;
72*4882a593Smuzhiyun 	size_t size;
73*4882a593Smuzhiyun 	int phys_irq;
74*4882a593Smuzhiyun 	int virt_irq;
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun struct arch_timer_mem {
78*4882a593Smuzhiyun 	phys_addr_t cntctlbase;
79*4882a593Smuzhiyun 	size_t size;
80*4882a593Smuzhiyun 	struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES];
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun #ifdef CONFIG_ARM_ARCH_TIMER
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun extern u32 arch_timer_get_rate(void);
86*4882a593Smuzhiyun extern u64 (*arch_timer_read_counter)(void);
87*4882a593Smuzhiyun extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void);
88*4882a593Smuzhiyun extern bool arch_timer_evtstrm_available(void);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun #else
91*4882a593Smuzhiyun 
arch_timer_get_rate(void)92*4882a593Smuzhiyun static inline u32 arch_timer_get_rate(void)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	return 0;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun 
arch_timer_read_counter(void)97*4882a593Smuzhiyun static inline u64 arch_timer_read_counter(void)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	return 0;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
arch_timer_evtstrm_available(void)102*4882a593Smuzhiyun static inline bool arch_timer_evtstrm_available(void)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun 	return false;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun #endif
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun #endif
110