1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef __GENERIC_IO_H
3*4882a593Smuzhiyun #define __GENERIC_IO_H
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <linux/linkage.h>
6*4882a593Smuzhiyun #include <asm/byteorder.h>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun /*
9*4882a593Smuzhiyun * These are the "generic" interfaces for doing new-style
10*4882a593Smuzhiyun * memory-mapped or PIO accesses. Architectures may do
11*4882a593Smuzhiyun * their own arch-optimized versions, these just act as
12*4882a593Smuzhiyun * wrappers around the old-style IO register access functions:
13*4882a593Smuzhiyun * read[bwl]/write[bwl]/in[bwl]/out[bwl]
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * Don't include this directly, include it from <asm/io.h>.
16*4882a593Smuzhiyun */
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /*
19*4882a593Smuzhiyun * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
20*4882a593Smuzhiyun * access or a MMIO access, these functions don't care. The info is
21*4882a593Smuzhiyun * encoded in the hardware mapping set up by the mapping functions
22*4882a593Smuzhiyun * (or the cookie itself, depending on implementation and hw).
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * The generic routines just encode the PIO/MMIO as part of the
25*4882a593Smuzhiyun * cookie, and coldly assume that the MMIO IO mappings are not
26*4882a593Smuzhiyun * in the low address range. Architectures for which this is not
27*4882a593Smuzhiyun * true can't use this generic implementation.
28*4882a593Smuzhiyun */
29*4882a593Smuzhiyun extern unsigned int ioread8(const void __iomem *);
30*4882a593Smuzhiyun extern unsigned int ioread16(const void __iomem *);
31*4882a593Smuzhiyun extern unsigned int ioread16be(const void __iomem *);
32*4882a593Smuzhiyun extern unsigned int ioread32(const void __iomem *);
33*4882a593Smuzhiyun extern unsigned int ioread32be(const void __iomem *);
34*4882a593Smuzhiyun #ifdef CONFIG_64BIT
35*4882a593Smuzhiyun extern u64 ioread64(const void __iomem *);
36*4882a593Smuzhiyun extern u64 ioread64be(const void __iomem *);
37*4882a593Smuzhiyun #endif
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #ifdef readq
40*4882a593Smuzhiyun #define ioread64_lo_hi ioread64_lo_hi
41*4882a593Smuzhiyun #define ioread64_hi_lo ioread64_hi_lo
42*4882a593Smuzhiyun #define ioread64be_lo_hi ioread64be_lo_hi
43*4882a593Smuzhiyun #define ioread64be_hi_lo ioread64be_hi_lo
44*4882a593Smuzhiyun extern u64 ioread64_lo_hi(const void __iomem *addr);
45*4882a593Smuzhiyun extern u64 ioread64_hi_lo(const void __iomem *addr);
46*4882a593Smuzhiyun extern u64 ioread64be_lo_hi(const void __iomem *addr);
47*4882a593Smuzhiyun extern u64 ioread64be_hi_lo(const void __iomem *addr);
48*4882a593Smuzhiyun #endif
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun extern void iowrite8(u8, void __iomem *);
51*4882a593Smuzhiyun extern void iowrite16(u16, void __iomem *);
52*4882a593Smuzhiyun extern void iowrite16be(u16, void __iomem *);
53*4882a593Smuzhiyun extern void iowrite32(u32, void __iomem *);
54*4882a593Smuzhiyun extern void iowrite32be(u32, void __iomem *);
55*4882a593Smuzhiyun #ifdef CONFIG_64BIT
56*4882a593Smuzhiyun extern void iowrite64(u64, void __iomem *);
57*4882a593Smuzhiyun extern void iowrite64be(u64, void __iomem *);
58*4882a593Smuzhiyun #endif
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #ifdef writeq
61*4882a593Smuzhiyun #define iowrite64_lo_hi iowrite64_lo_hi
62*4882a593Smuzhiyun #define iowrite64_hi_lo iowrite64_hi_lo
63*4882a593Smuzhiyun #define iowrite64be_lo_hi iowrite64be_lo_hi
64*4882a593Smuzhiyun #define iowrite64be_hi_lo iowrite64be_hi_lo
65*4882a593Smuzhiyun extern void iowrite64_lo_hi(u64 val, void __iomem *addr);
66*4882a593Smuzhiyun extern void iowrite64_hi_lo(u64 val, void __iomem *addr);
67*4882a593Smuzhiyun extern void iowrite64be_lo_hi(u64 val, void __iomem *addr);
68*4882a593Smuzhiyun extern void iowrite64be_hi_lo(u64 val, void __iomem *addr);
69*4882a593Smuzhiyun #endif
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /*
72*4882a593Smuzhiyun * "string" versions of the above. Note that they
73*4882a593Smuzhiyun * use native byte ordering for the accesses (on
74*4882a593Smuzhiyun * the assumption that IO and memory agree on a
75*4882a593Smuzhiyun * byte order, and CPU byteorder is irrelevant).
76*4882a593Smuzhiyun *
77*4882a593Smuzhiyun * They do _not_ update the port address. If you
78*4882a593Smuzhiyun * want MMIO that copies stuff laid out in MMIO
79*4882a593Smuzhiyun * memory across multiple ports, use "memcpy_toio()"
80*4882a593Smuzhiyun * and friends.
81*4882a593Smuzhiyun */
82*4882a593Smuzhiyun extern void ioread8_rep(const void __iomem *port, void *buf, unsigned long count);
83*4882a593Smuzhiyun extern void ioread16_rep(const void __iomem *port, void *buf, unsigned long count);
84*4882a593Smuzhiyun extern void ioread32_rep(const void __iomem *port, void *buf, unsigned long count);
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count);
87*4882a593Smuzhiyun extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count);
88*4882a593Smuzhiyun extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #ifdef CONFIG_HAS_IOPORT_MAP
91*4882a593Smuzhiyun /* Create a virtual mapping cookie for an IO port range */
92*4882a593Smuzhiyun extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
93*4882a593Smuzhiyun extern void ioport_unmap(void __iomem *);
94*4882a593Smuzhiyun #endif
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun #ifndef ARCH_HAS_IOREMAP_WC
97*4882a593Smuzhiyun #define ioremap_wc ioremap
98*4882a593Smuzhiyun #endif
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun #ifndef ARCH_HAS_IOREMAP_WT
101*4882a593Smuzhiyun #define ioremap_wt ioremap
102*4882a593Smuzhiyun #endif
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun #ifdef CONFIG_PCI
105*4882a593Smuzhiyun /* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */
106*4882a593Smuzhiyun struct pci_dev;
107*4882a593Smuzhiyun extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
108*4882a593Smuzhiyun #elif defined(CONFIG_GENERIC_IOMAP)
109*4882a593Smuzhiyun struct pci_dev;
pci_iounmap(struct pci_dev * dev,void __iomem * addr)110*4882a593Smuzhiyun static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
111*4882a593Smuzhiyun { }
112*4882a593Smuzhiyun #endif
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun #include <asm-generic/pci_iomap.h>
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun #endif
117