1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /* Generic I/O and MEMIO string operations. */
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun #define __ide_insw insw
5*4882a593Smuzhiyun #define __ide_insl insl
6*4882a593Smuzhiyun #define __ide_outsw outsw
7*4882a593Smuzhiyun #define __ide_outsl outsl
8*4882a593Smuzhiyun
__ide_mm_insw(void __iomem * port,void * addr,u32 count)9*4882a593Smuzhiyun static __inline__ void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
10*4882a593Smuzhiyun {
11*4882a593Smuzhiyun while (count--) {
12*4882a593Smuzhiyun *(u16 *)addr = readw(port);
13*4882a593Smuzhiyun addr += 2;
14*4882a593Smuzhiyun }
15*4882a593Smuzhiyun }
16*4882a593Smuzhiyun
__ide_mm_insl(void __iomem * port,void * addr,u32 count)17*4882a593Smuzhiyun static __inline__ void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
18*4882a593Smuzhiyun {
19*4882a593Smuzhiyun while (count--) {
20*4882a593Smuzhiyun *(u32 *)addr = readl(port);
21*4882a593Smuzhiyun addr += 4;
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun }
24*4882a593Smuzhiyun
__ide_mm_outsw(void __iomem * port,void * addr,u32 count)25*4882a593Smuzhiyun static __inline__ void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun while (count--) {
28*4882a593Smuzhiyun writew(*(u16 *)addr, port);
29*4882a593Smuzhiyun addr += 2;
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun
__ide_mm_outsl(void __iomem * port,void * addr,u32 count)33*4882a593Smuzhiyun static __inline__ void __ide_mm_outsl(void __iomem * port, void *addr, u32 count)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun while (count--) {
36*4882a593Smuzhiyun writel(*(u32 *)addr, port);
37*4882a593Smuzhiyun addr += 4;
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun }
40