1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun /* 4*4882a593Smuzhiyun * This file contains definitions from Hyper-V Hypervisor Top-Level Functional 5*4882a593Smuzhiyun * Specification (TLFS): 6*4882a593Smuzhiyun * https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _ASM_GENERIC_HYPERV_TLFS_H 10*4882a593Smuzhiyun #define _ASM_GENERIC_HYPERV_TLFS_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <linux/types.h> 13*4882a593Smuzhiyun #include <linux/bits.h> 14*4882a593Smuzhiyun #include <linux/time64.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * While not explicitly listed in the TLFS, Hyper-V always runs with a page size 18*4882a593Smuzhiyun * of 4096. These definitions are used when communicating with Hyper-V using 19*4882a593Smuzhiyun * guest physical pages and guest physical page addresses, since the guest page 20*4882a593Smuzhiyun * size may not be 4096 on all architectures. 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun #define HV_HYP_PAGE_SHIFT 12 23*4882a593Smuzhiyun #define HV_HYP_PAGE_SIZE BIT(HV_HYP_PAGE_SHIFT) 24*4882a593Smuzhiyun #define HV_HYP_PAGE_MASK (~(HV_HYP_PAGE_SIZE - 1)) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* 27*4882a593Smuzhiyun * Hyper-V provides two categories of flags relevant to guest VMs. The 28*4882a593Smuzhiyun * "Features" category indicates specific functionality that is available 29*4882a593Smuzhiyun * to guests on this particular instance of Hyper-V. The "Features" 30*4882a593Smuzhiyun * are presented in four groups, each of which is 32 bits. The group A 31*4882a593Smuzhiyun * and B definitions are common across architectures and are listed here. 32*4882a593Smuzhiyun * However, not all flags are relevant on all architectures. 33*4882a593Smuzhiyun * 34*4882a593Smuzhiyun * Groups C and D vary across architectures and are listed in the 35*4882a593Smuzhiyun * architecture specific portion of hyperv-tlfs.h. Some of these flags exist 36*4882a593Smuzhiyun * on multiple architectures, but the bit positions are different so they 37*4882a593Smuzhiyun * cannot appear in the generic portion of hyperv-tlfs.h. 38*4882a593Smuzhiyun * 39*4882a593Smuzhiyun * The "Enlightenments" category provides recommendations on whether to use 40*4882a593Smuzhiyun * specific enlightenments that are available. The Enlighenments are a single 41*4882a593Smuzhiyun * group of 32 bits, but they vary across architectures and are listed in 42*4882a593Smuzhiyun * the architecture specific portion of hyperv-tlfs.h. 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* 46*4882a593Smuzhiyun * Group A Features. 47*4882a593Smuzhiyun */ 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* VP Runtime register available */ 50*4882a593Smuzhiyun #define HV_MSR_VP_RUNTIME_AVAILABLE BIT(0) 51*4882a593Smuzhiyun /* Partition Reference Counter available*/ 52*4882a593Smuzhiyun #define HV_MSR_TIME_REF_COUNT_AVAILABLE BIT(1) 53*4882a593Smuzhiyun /* Basic SynIC register available */ 54*4882a593Smuzhiyun #define HV_MSR_SYNIC_AVAILABLE BIT(2) 55*4882a593Smuzhiyun /* Synthetic Timer registers available */ 56*4882a593Smuzhiyun #define HV_MSR_SYNTIMER_AVAILABLE BIT(3) 57*4882a593Smuzhiyun /* Virtual APIC assist and VP assist page registers available */ 58*4882a593Smuzhiyun #define HV_MSR_APIC_ACCESS_AVAILABLE BIT(4) 59*4882a593Smuzhiyun /* Hypercall and Guest OS ID registers available*/ 60*4882a593Smuzhiyun #define HV_MSR_HYPERCALL_AVAILABLE BIT(5) 61*4882a593Smuzhiyun /* Access virtual processor index register available*/ 62*4882a593Smuzhiyun #define HV_MSR_VP_INDEX_AVAILABLE BIT(6) 63*4882a593Smuzhiyun /* Virtual system reset register available*/ 64*4882a593Smuzhiyun #define HV_MSR_RESET_AVAILABLE BIT(7) 65*4882a593Smuzhiyun /* Access statistics page registers available */ 66*4882a593Smuzhiyun #define HV_MSR_STAT_PAGES_AVAILABLE BIT(8) 67*4882a593Smuzhiyun /* Partition reference TSC register is available */ 68*4882a593Smuzhiyun #define HV_MSR_REFERENCE_TSC_AVAILABLE BIT(9) 69*4882a593Smuzhiyun /* Partition Guest IDLE register is available */ 70*4882a593Smuzhiyun #define HV_MSR_GUEST_IDLE_AVAILABLE BIT(10) 71*4882a593Smuzhiyun /* Partition local APIC and TSC frequency registers available */ 72*4882a593Smuzhiyun #define HV_ACCESS_FREQUENCY_MSRS BIT(11) 73*4882a593Smuzhiyun /* AccessReenlightenmentControls privilege */ 74*4882a593Smuzhiyun #define HV_ACCESS_REENLIGHTENMENT BIT(13) 75*4882a593Smuzhiyun /* AccessTscInvariantControls privilege */ 76*4882a593Smuzhiyun #define HV_ACCESS_TSC_INVARIANT BIT(15) 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun /* 79*4882a593Smuzhiyun * Group B features. 80*4882a593Smuzhiyun */ 81*4882a593Smuzhiyun #define HV_CREATE_PARTITIONS BIT(0) 82*4882a593Smuzhiyun #define HV_ACCESS_PARTITION_ID BIT(1) 83*4882a593Smuzhiyun #define HV_ACCESS_MEMORY_POOL BIT(2) 84*4882a593Smuzhiyun #define HV_ADJUST_MESSAGE_BUFFERS BIT(3) 85*4882a593Smuzhiyun #define HV_POST_MESSAGES BIT(4) 86*4882a593Smuzhiyun #define HV_SIGNAL_EVENTS BIT(5) 87*4882a593Smuzhiyun #define HV_CREATE_PORT BIT(6) 88*4882a593Smuzhiyun #define HV_CONNECT_PORT BIT(7) 89*4882a593Smuzhiyun #define HV_ACCESS_STATS BIT(8) 90*4882a593Smuzhiyun #define HV_DEBUGGING BIT(11) 91*4882a593Smuzhiyun #define HV_CPU_POWER_MANAGEMENT BIT(12) 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun /* 95*4882a593Smuzhiyun * TSC page layout. 96*4882a593Smuzhiyun */ 97*4882a593Smuzhiyun struct ms_hyperv_tsc_page { 98*4882a593Smuzhiyun volatile u32 tsc_sequence; 99*4882a593Smuzhiyun u32 reserved1; 100*4882a593Smuzhiyun volatile u64 tsc_scale; 101*4882a593Smuzhiyun volatile s64 tsc_offset; 102*4882a593Smuzhiyun } __packed; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun /* 105*4882a593Smuzhiyun * The guest OS needs to register the guest ID with the hypervisor. 106*4882a593Smuzhiyun * The guest ID is a 64 bit entity and the structure of this ID is 107*4882a593Smuzhiyun * specified in the Hyper-V specification: 108*4882a593Smuzhiyun * 109*4882a593Smuzhiyun * msdn.microsoft.com/en-us/library/windows/hardware/ff542653%28v=vs.85%29.aspx 110*4882a593Smuzhiyun * 111*4882a593Smuzhiyun * While the current guideline does not specify how Linux guest ID(s) 112*4882a593Smuzhiyun * need to be generated, our plan is to publish the guidelines for 113*4882a593Smuzhiyun * Linux and other guest operating systems that currently are hosted 114*4882a593Smuzhiyun * on Hyper-V. The implementation here conforms to this yet 115*4882a593Smuzhiyun * unpublished guidelines. 116*4882a593Smuzhiyun * 117*4882a593Smuzhiyun * 118*4882a593Smuzhiyun * Bit(s) 119*4882a593Smuzhiyun * 63 - Indicates if the OS is Open Source or not; 1 is Open Source 120*4882a593Smuzhiyun * 62:56 - Os Type; Linux is 0x100 121*4882a593Smuzhiyun * 55:48 - Distro specific identification 122*4882a593Smuzhiyun * 47:16 - Linux kernel version number 123*4882a593Smuzhiyun * 15:0 - Distro specific identification 124*4882a593Smuzhiyun * 125*4882a593Smuzhiyun * 126*4882a593Smuzhiyun */ 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun #define HV_LINUX_VENDOR_ID 0x8100 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun /* 131*4882a593Smuzhiyun * Crash notification flags. 132*4882a593Smuzhiyun */ 133*4882a593Smuzhiyun #define HV_CRASH_CTL_CRASH_NOTIFY_MSG BIT_ULL(62) 134*4882a593Smuzhiyun #define HV_CRASH_CTL_CRASH_NOTIFY BIT_ULL(63) 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun /* Declare the various hypercall operations. */ 137*4882a593Smuzhiyun #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002 138*4882a593Smuzhiyun #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003 139*4882a593Smuzhiyun #define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008 140*4882a593Smuzhiyun #define HVCALL_SEND_IPI 0x000b 141*4882a593Smuzhiyun #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013 142*4882a593Smuzhiyun #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014 143*4882a593Smuzhiyun #define HVCALL_SEND_IPI_EX 0x0015 144*4882a593Smuzhiyun #define HVCALL_GET_VP_REGISTERS 0x0050 145*4882a593Smuzhiyun #define HVCALL_SET_VP_REGISTERS 0x0051 146*4882a593Smuzhiyun #define HVCALL_POST_MESSAGE 0x005c 147*4882a593Smuzhiyun #define HVCALL_SIGNAL_EVENT 0x005d 148*4882a593Smuzhiyun #define HVCALL_POST_DEBUG_DATA 0x0069 149*4882a593Smuzhiyun #define HVCALL_RETRIEVE_DEBUG_DATA 0x006a 150*4882a593Smuzhiyun #define HVCALL_RESET_DEBUG_SESSION 0x006b 151*4882a593Smuzhiyun #define HVCALL_RETARGET_INTERRUPT 0x007e 152*4882a593Smuzhiyun #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af 153*4882a593Smuzhiyun #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_LIST 0x00b0 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun #define HV_FLUSH_ALL_PROCESSORS BIT(0) 156*4882a593Smuzhiyun #define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1) 157*4882a593Smuzhiyun #define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2) 158*4882a593Smuzhiyun #define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT BIT(3) 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun enum HV_GENERIC_SET_FORMAT { 161*4882a593Smuzhiyun HV_GENERIC_SET_SPARSE_4K, 162*4882a593Smuzhiyun HV_GENERIC_SET_ALL, 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun #define HV_PARTITION_ID_SELF ((u64)-1) 166*4882a593Smuzhiyun #define HV_VP_INDEX_SELF ((u32)-2) 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun #define HV_HYPERCALL_RESULT_MASK GENMASK_ULL(15, 0) 169*4882a593Smuzhiyun #define HV_HYPERCALL_FAST_BIT BIT(16) 170*4882a593Smuzhiyun #define HV_HYPERCALL_VARHEAD_OFFSET 17 171*4882a593Smuzhiyun #define HV_HYPERCALL_REP_COMP_OFFSET 32 172*4882a593Smuzhiyun #define HV_HYPERCALL_REP_COMP_1 BIT_ULL(32) 173*4882a593Smuzhiyun #define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32) 174*4882a593Smuzhiyun #define HV_HYPERCALL_REP_START_OFFSET 48 175*4882a593Smuzhiyun #define HV_HYPERCALL_REP_START_MASK GENMASK_ULL(59, 48) 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun /* hypercall status code */ 178*4882a593Smuzhiyun #define HV_STATUS_SUCCESS 0 179*4882a593Smuzhiyun #define HV_STATUS_INVALID_HYPERCALL_CODE 2 180*4882a593Smuzhiyun #define HV_STATUS_INVALID_HYPERCALL_INPUT 3 181*4882a593Smuzhiyun #define HV_STATUS_INVALID_ALIGNMENT 4 182*4882a593Smuzhiyun #define HV_STATUS_INVALID_PARAMETER 5 183*4882a593Smuzhiyun #define HV_STATUS_OPERATION_DENIED 8 184*4882a593Smuzhiyun #define HV_STATUS_INSUFFICIENT_MEMORY 11 185*4882a593Smuzhiyun #define HV_STATUS_INVALID_PORT_ID 17 186*4882a593Smuzhiyun #define HV_STATUS_INVALID_CONNECTION_ID 18 187*4882a593Smuzhiyun #define HV_STATUS_INSUFFICIENT_BUFFERS 19 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun /* 190*4882a593Smuzhiyun * The Hyper-V TimeRefCount register and the TSC 191*4882a593Smuzhiyun * page provide a guest VM clock with 100ns tick rate 192*4882a593Smuzhiyun */ 193*4882a593Smuzhiyun #define HV_CLOCK_HZ (NSEC_PER_SEC/100) 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun /* Define the number of synthetic interrupt sources. */ 196*4882a593Smuzhiyun #define HV_SYNIC_SINT_COUNT (16) 197*4882a593Smuzhiyun /* Define the expected SynIC version. */ 198*4882a593Smuzhiyun #define HV_SYNIC_VERSION_1 (0x1) 199*4882a593Smuzhiyun /* Valid SynIC vectors are 16-255. */ 200*4882a593Smuzhiyun #define HV_SYNIC_FIRST_VALID_VECTOR (16) 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun #define HV_SYNIC_CONTROL_ENABLE (1ULL << 0) 203*4882a593Smuzhiyun #define HV_SYNIC_SIMP_ENABLE (1ULL << 0) 204*4882a593Smuzhiyun #define HV_SYNIC_SIEFP_ENABLE (1ULL << 0) 205*4882a593Smuzhiyun #define HV_SYNIC_SINT_MASKED (1ULL << 16) 206*4882a593Smuzhiyun #define HV_SYNIC_SINT_AUTO_EOI (1ULL << 17) 207*4882a593Smuzhiyun #define HV_SYNIC_SINT_VECTOR_MASK (0xFF) 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun #define HV_SYNIC_STIMER_COUNT (4) 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun /* Define synthetic interrupt controller message constants. */ 212*4882a593Smuzhiyun #define HV_MESSAGE_SIZE (256) 213*4882a593Smuzhiyun #define HV_MESSAGE_PAYLOAD_BYTE_COUNT (240) 214*4882a593Smuzhiyun #define HV_MESSAGE_PAYLOAD_QWORD_COUNT (30) 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun /* Define synthetic interrupt controller message flags. */ 217*4882a593Smuzhiyun union hv_message_flags { 218*4882a593Smuzhiyun __u8 asu8; 219*4882a593Smuzhiyun struct { 220*4882a593Smuzhiyun __u8 msg_pending:1; 221*4882a593Smuzhiyun __u8 reserved:7; 222*4882a593Smuzhiyun } __packed; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun /* Define port identifier type. */ 226*4882a593Smuzhiyun union hv_port_id { 227*4882a593Smuzhiyun __u32 asu32; 228*4882a593Smuzhiyun struct { 229*4882a593Smuzhiyun __u32 id:24; 230*4882a593Smuzhiyun __u32 reserved:8; 231*4882a593Smuzhiyun } __packed u; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun /* Define synthetic interrupt controller message header. */ 235*4882a593Smuzhiyun struct hv_message_header { 236*4882a593Smuzhiyun __u32 message_type; 237*4882a593Smuzhiyun __u8 payload_size; 238*4882a593Smuzhiyun union hv_message_flags message_flags; 239*4882a593Smuzhiyun __u8 reserved[2]; 240*4882a593Smuzhiyun union { 241*4882a593Smuzhiyun __u64 sender; 242*4882a593Smuzhiyun union hv_port_id port; 243*4882a593Smuzhiyun }; 244*4882a593Smuzhiyun } __packed; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun /* Define synthetic interrupt controller message format. */ 247*4882a593Smuzhiyun struct hv_message { 248*4882a593Smuzhiyun struct hv_message_header header; 249*4882a593Smuzhiyun union { 250*4882a593Smuzhiyun __u64 payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT]; 251*4882a593Smuzhiyun } u; 252*4882a593Smuzhiyun } __packed; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun /* Define the synthetic interrupt message page layout. */ 255*4882a593Smuzhiyun struct hv_message_page { 256*4882a593Smuzhiyun struct hv_message sint_message[HV_SYNIC_SINT_COUNT]; 257*4882a593Smuzhiyun } __packed; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun /* Define timer message payload structure. */ 260*4882a593Smuzhiyun struct hv_timer_message_payload { 261*4882a593Smuzhiyun __u32 timer_index; 262*4882a593Smuzhiyun __u32 reserved; 263*4882a593Smuzhiyun __u64 expiration_time; /* When the timer expired */ 264*4882a593Smuzhiyun __u64 delivery_time; /* When the message was delivered */ 265*4882a593Smuzhiyun } __packed; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun /* Define synthetic interrupt controller flag constants. */ 269*4882a593Smuzhiyun #define HV_EVENT_FLAGS_COUNT (256 * 8) 270*4882a593Smuzhiyun #define HV_EVENT_FLAGS_LONG_COUNT (256 / sizeof(unsigned long)) 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun /* 273*4882a593Smuzhiyun * Synthetic timer configuration. 274*4882a593Smuzhiyun */ 275*4882a593Smuzhiyun union hv_stimer_config { 276*4882a593Smuzhiyun u64 as_uint64; 277*4882a593Smuzhiyun struct { 278*4882a593Smuzhiyun u64 enable:1; 279*4882a593Smuzhiyun u64 periodic:1; 280*4882a593Smuzhiyun u64 lazy:1; 281*4882a593Smuzhiyun u64 auto_enable:1; 282*4882a593Smuzhiyun u64 apic_vector:8; 283*4882a593Smuzhiyun u64 direct_mode:1; 284*4882a593Smuzhiyun u64 reserved_z0:3; 285*4882a593Smuzhiyun u64 sintx:4; 286*4882a593Smuzhiyun u64 reserved_z1:44; 287*4882a593Smuzhiyun } __packed; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun /* Define the synthetic interrupt controller event flags format. */ 292*4882a593Smuzhiyun union hv_synic_event_flags { 293*4882a593Smuzhiyun unsigned long flags[HV_EVENT_FLAGS_LONG_COUNT]; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun /* Define SynIC control register. */ 297*4882a593Smuzhiyun union hv_synic_scontrol { 298*4882a593Smuzhiyun u64 as_uint64; 299*4882a593Smuzhiyun struct { 300*4882a593Smuzhiyun u64 enable:1; 301*4882a593Smuzhiyun u64 reserved:63; 302*4882a593Smuzhiyun } __packed; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun /* Define synthetic interrupt source. */ 306*4882a593Smuzhiyun union hv_synic_sint { 307*4882a593Smuzhiyun u64 as_uint64; 308*4882a593Smuzhiyun struct { 309*4882a593Smuzhiyun u64 vector:8; 310*4882a593Smuzhiyun u64 reserved1:8; 311*4882a593Smuzhiyun u64 masked:1; 312*4882a593Smuzhiyun u64 auto_eoi:1; 313*4882a593Smuzhiyun u64 polling:1; 314*4882a593Smuzhiyun u64 reserved2:45; 315*4882a593Smuzhiyun } __packed; 316*4882a593Smuzhiyun }; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun /* Define the format of the SIMP register */ 319*4882a593Smuzhiyun union hv_synic_simp { 320*4882a593Smuzhiyun u64 as_uint64; 321*4882a593Smuzhiyun struct { 322*4882a593Smuzhiyun u64 simp_enabled:1; 323*4882a593Smuzhiyun u64 preserved:11; 324*4882a593Smuzhiyun u64 base_simp_gpa:52; 325*4882a593Smuzhiyun } __packed; 326*4882a593Smuzhiyun }; 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun /* Define the format of the SIEFP register */ 329*4882a593Smuzhiyun union hv_synic_siefp { 330*4882a593Smuzhiyun u64 as_uint64; 331*4882a593Smuzhiyun struct { 332*4882a593Smuzhiyun u64 siefp_enabled:1; 333*4882a593Smuzhiyun u64 preserved:11; 334*4882a593Smuzhiyun u64 base_siefp_gpa:52; 335*4882a593Smuzhiyun } __packed; 336*4882a593Smuzhiyun }; 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun struct hv_vpset { 339*4882a593Smuzhiyun u64 format; 340*4882a593Smuzhiyun u64 valid_bank_mask; 341*4882a593Smuzhiyun u64 bank_contents[]; 342*4882a593Smuzhiyun } __packed; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun /* HvCallSendSyntheticClusterIpi hypercall */ 345*4882a593Smuzhiyun struct hv_send_ipi { 346*4882a593Smuzhiyun u32 vector; 347*4882a593Smuzhiyun u32 reserved; 348*4882a593Smuzhiyun u64 cpu_mask; 349*4882a593Smuzhiyun } __packed; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun /* HvCallSendSyntheticClusterIpiEx hypercall */ 352*4882a593Smuzhiyun struct hv_send_ipi_ex { 353*4882a593Smuzhiyun u32 vector; 354*4882a593Smuzhiyun u32 reserved; 355*4882a593Smuzhiyun struct hv_vpset vp_set; 356*4882a593Smuzhiyun } __packed; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun /* HvFlushGuestPhysicalAddressSpace hypercalls */ 359*4882a593Smuzhiyun struct hv_guest_mapping_flush { 360*4882a593Smuzhiyun u64 address_space; 361*4882a593Smuzhiyun u64 flags; 362*4882a593Smuzhiyun } __packed; 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun /* 365*4882a593Smuzhiyun * HV_MAX_FLUSH_PAGES = "additional_pages" + 1. It's limited 366*4882a593Smuzhiyun * by the bitwidth of "additional_pages" in union hv_gpa_page_range. 367*4882a593Smuzhiyun */ 368*4882a593Smuzhiyun #define HV_MAX_FLUSH_PAGES (2048) 369*4882a593Smuzhiyun 370*4882a593Smuzhiyun /* HvFlushGuestPhysicalAddressList hypercall */ 371*4882a593Smuzhiyun union hv_gpa_page_range { 372*4882a593Smuzhiyun u64 address_space; 373*4882a593Smuzhiyun struct { 374*4882a593Smuzhiyun u64 additional_pages:11; 375*4882a593Smuzhiyun u64 largepage:1; 376*4882a593Smuzhiyun u64 basepfn:52; 377*4882a593Smuzhiyun } page; 378*4882a593Smuzhiyun }; 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun /* 381*4882a593Smuzhiyun * All input flush parameters should be in single page. The max flush 382*4882a593Smuzhiyun * count is equal with how many entries of union hv_gpa_page_range can 383*4882a593Smuzhiyun * be populated into the input parameter page. 384*4882a593Smuzhiyun */ 385*4882a593Smuzhiyun #define HV_MAX_FLUSH_REP_COUNT ((HV_HYP_PAGE_SIZE - 2 * sizeof(u64)) / \ 386*4882a593Smuzhiyun sizeof(union hv_gpa_page_range)) 387*4882a593Smuzhiyun 388*4882a593Smuzhiyun struct hv_guest_mapping_flush_list { 389*4882a593Smuzhiyun u64 address_space; 390*4882a593Smuzhiyun u64 flags; 391*4882a593Smuzhiyun union hv_gpa_page_range gpa_list[HV_MAX_FLUSH_REP_COUNT]; 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun /* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */ 395*4882a593Smuzhiyun struct hv_tlb_flush { 396*4882a593Smuzhiyun u64 address_space; 397*4882a593Smuzhiyun u64 flags; 398*4882a593Smuzhiyun u64 processor_mask; 399*4882a593Smuzhiyun u64 gva_list[]; 400*4882a593Smuzhiyun } __packed; 401*4882a593Smuzhiyun 402*4882a593Smuzhiyun /* HvFlushVirtualAddressSpaceEx, HvFlushVirtualAddressListEx hypercalls */ 403*4882a593Smuzhiyun struct hv_tlb_flush_ex { 404*4882a593Smuzhiyun u64 address_space; 405*4882a593Smuzhiyun u64 flags; 406*4882a593Smuzhiyun struct hv_vpset hv_vp_set; 407*4882a593Smuzhiyun u64 gva_list[]; 408*4882a593Smuzhiyun } __packed; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun /* HvRetargetDeviceInterrupt hypercall */ 411*4882a593Smuzhiyun union hv_msi_entry { 412*4882a593Smuzhiyun u64 as_uint64; 413*4882a593Smuzhiyun struct { 414*4882a593Smuzhiyun u32 address; 415*4882a593Smuzhiyun u32 data; 416*4882a593Smuzhiyun } __packed; 417*4882a593Smuzhiyun }; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun struct hv_interrupt_entry { 420*4882a593Smuzhiyun u32 source; /* 1 for MSI(-X) */ 421*4882a593Smuzhiyun u32 reserved1; 422*4882a593Smuzhiyun union hv_msi_entry msi_entry; 423*4882a593Smuzhiyun } __packed; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun /* 426*4882a593Smuzhiyun * flags for hv_device_interrupt_target.flags 427*4882a593Smuzhiyun */ 428*4882a593Smuzhiyun #define HV_DEVICE_INTERRUPT_TARGET_MULTICAST 1 429*4882a593Smuzhiyun #define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET 2 430*4882a593Smuzhiyun 431*4882a593Smuzhiyun struct hv_device_interrupt_target { 432*4882a593Smuzhiyun u32 vector; 433*4882a593Smuzhiyun u32 flags; 434*4882a593Smuzhiyun union { 435*4882a593Smuzhiyun u64 vp_mask; 436*4882a593Smuzhiyun struct hv_vpset vp_set; 437*4882a593Smuzhiyun }; 438*4882a593Smuzhiyun } __packed; 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun struct hv_retarget_device_interrupt { 441*4882a593Smuzhiyun u64 partition_id; /* use "self" */ 442*4882a593Smuzhiyun u64 device_id; 443*4882a593Smuzhiyun struct hv_interrupt_entry int_entry; 444*4882a593Smuzhiyun u64 reserved2; 445*4882a593Smuzhiyun struct hv_device_interrupt_target int_target; 446*4882a593Smuzhiyun } __packed __aligned(8); 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun 449*4882a593Smuzhiyun /* HvGetVpRegisters hypercall input with variable size reg name list*/ 450*4882a593Smuzhiyun struct hv_get_vp_registers_input { 451*4882a593Smuzhiyun struct { 452*4882a593Smuzhiyun u64 partitionid; 453*4882a593Smuzhiyun u32 vpindex; 454*4882a593Smuzhiyun u8 inputvtl; 455*4882a593Smuzhiyun u8 padding[3]; 456*4882a593Smuzhiyun } header; 457*4882a593Smuzhiyun struct input { 458*4882a593Smuzhiyun u32 name0; 459*4882a593Smuzhiyun u32 name1; 460*4882a593Smuzhiyun } element[]; 461*4882a593Smuzhiyun } __packed; 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun 464*4882a593Smuzhiyun /* HvGetVpRegisters returns an array of these output elements */ 465*4882a593Smuzhiyun struct hv_get_vp_registers_output { 466*4882a593Smuzhiyun union { 467*4882a593Smuzhiyun struct { 468*4882a593Smuzhiyun u32 a; 469*4882a593Smuzhiyun u32 b; 470*4882a593Smuzhiyun u32 c; 471*4882a593Smuzhiyun u32 d; 472*4882a593Smuzhiyun } as32 __packed; 473*4882a593Smuzhiyun struct { 474*4882a593Smuzhiyun u64 low; 475*4882a593Smuzhiyun u64 high; 476*4882a593Smuzhiyun } as64 __packed; 477*4882a593Smuzhiyun }; 478*4882a593Smuzhiyun }; 479*4882a593Smuzhiyun 480*4882a593Smuzhiyun /* HvSetVpRegisters hypercall with variable size reg name/value list*/ 481*4882a593Smuzhiyun struct hv_set_vp_registers_input { 482*4882a593Smuzhiyun struct { 483*4882a593Smuzhiyun u64 partitionid; 484*4882a593Smuzhiyun u32 vpindex; 485*4882a593Smuzhiyun u8 inputvtl; 486*4882a593Smuzhiyun u8 padding[3]; 487*4882a593Smuzhiyun } header; 488*4882a593Smuzhiyun struct { 489*4882a593Smuzhiyun u32 name; 490*4882a593Smuzhiyun u32 padding1; 491*4882a593Smuzhiyun u64 padding2; 492*4882a593Smuzhiyun u64 valuelow; 493*4882a593Smuzhiyun u64 valuehigh; 494*4882a593Smuzhiyun } element[]; 495*4882a593Smuzhiyun } __packed; 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun #endif 498