1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef _ASM_GENERIC_BITOPS_NON_ATOMIC_H_
3*4882a593Smuzhiyun #define _ASM_GENERIC_BITOPS_NON_ATOMIC_H_
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <asm/types.h>
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun /**
8*4882a593Smuzhiyun * __set_bit - Set a bit in memory
9*4882a593Smuzhiyun * @nr: the bit to set
10*4882a593Smuzhiyun * @addr: the address to start counting from
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Unlike set_bit(), this function is non-atomic and may be reordered.
13*4882a593Smuzhiyun * If it's called on the same region of memory simultaneously, the effect
14*4882a593Smuzhiyun * may be that only one operation succeeds.
15*4882a593Smuzhiyun */
__set_bit(int nr,volatile unsigned long * addr)16*4882a593Smuzhiyun static inline void __set_bit(int nr, volatile unsigned long *addr)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun unsigned long mask = BIT_MASK(nr);
19*4882a593Smuzhiyun unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun *p |= mask;
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun
__clear_bit(int nr,volatile unsigned long * addr)24*4882a593Smuzhiyun static inline void __clear_bit(int nr, volatile unsigned long *addr)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun unsigned long mask = BIT_MASK(nr);
27*4882a593Smuzhiyun unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun *p &= ~mask;
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /**
33*4882a593Smuzhiyun * __change_bit - Toggle a bit in memory
34*4882a593Smuzhiyun * @nr: the bit to change
35*4882a593Smuzhiyun * @addr: the address to start counting from
36*4882a593Smuzhiyun *
37*4882a593Smuzhiyun * Unlike change_bit(), this function is non-atomic and may be reordered.
38*4882a593Smuzhiyun * If it's called on the same region of memory simultaneously, the effect
39*4882a593Smuzhiyun * may be that only one operation succeeds.
40*4882a593Smuzhiyun */
__change_bit(int nr,volatile unsigned long * addr)41*4882a593Smuzhiyun static inline void __change_bit(int nr, volatile unsigned long *addr)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun unsigned long mask = BIT_MASK(nr);
44*4882a593Smuzhiyun unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun *p ^= mask;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /**
50*4882a593Smuzhiyun * __test_and_set_bit - Set a bit and return its old value
51*4882a593Smuzhiyun * @nr: Bit to set
52*4882a593Smuzhiyun * @addr: Address to count from
53*4882a593Smuzhiyun *
54*4882a593Smuzhiyun * This operation is non-atomic and can be reordered.
55*4882a593Smuzhiyun * If two examples of this operation race, one can appear to succeed
56*4882a593Smuzhiyun * but actually fail. You must protect multiple accesses with a lock.
57*4882a593Smuzhiyun */
__test_and_set_bit(int nr,volatile unsigned long * addr)58*4882a593Smuzhiyun static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun unsigned long mask = BIT_MASK(nr);
61*4882a593Smuzhiyun unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
62*4882a593Smuzhiyun unsigned long old = *p;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun *p = old | mask;
65*4882a593Smuzhiyun return (old & mask) != 0;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /**
69*4882a593Smuzhiyun * __test_and_clear_bit - Clear a bit and return its old value
70*4882a593Smuzhiyun * @nr: Bit to clear
71*4882a593Smuzhiyun * @addr: Address to count from
72*4882a593Smuzhiyun *
73*4882a593Smuzhiyun * This operation is non-atomic and can be reordered.
74*4882a593Smuzhiyun * If two examples of this operation race, one can appear to succeed
75*4882a593Smuzhiyun * but actually fail. You must protect multiple accesses with a lock.
76*4882a593Smuzhiyun */
__test_and_clear_bit(int nr,volatile unsigned long * addr)77*4882a593Smuzhiyun static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun unsigned long mask = BIT_MASK(nr);
80*4882a593Smuzhiyun unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
81*4882a593Smuzhiyun unsigned long old = *p;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun *p = old & ~mask;
84*4882a593Smuzhiyun return (old & mask) != 0;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* WARNING: non atomic and it can be reordered! */
__test_and_change_bit(int nr,volatile unsigned long * addr)88*4882a593Smuzhiyun static inline int __test_and_change_bit(int nr,
89*4882a593Smuzhiyun volatile unsigned long *addr)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun unsigned long mask = BIT_MASK(nr);
92*4882a593Smuzhiyun unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
93*4882a593Smuzhiyun unsigned long old = *p;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun *p = old ^ mask;
96*4882a593Smuzhiyun return (old & mask) != 0;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /**
100*4882a593Smuzhiyun * test_bit - Determine whether a bit is set
101*4882a593Smuzhiyun * @nr: bit number to test
102*4882a593Smuzhiyun * @addr: Address to start counting from
103*4882a593Smuzhiyun */
test_bit(int nr,const volatile unsigned long * addr)104*4882a593Smuzhiyun static inline int test_bit(int nr, const volatile unsigned long *addr)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun #endif /* _ASM_GENERIC_BITOPS_NON_ATOMIC_H_ */
110