1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun /*
4*4882a593Smuzhiyun * This file provides wrappers with sanitizer instrumentation for atomic bit
5*4882a593Smuzhiyun * operations.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * To use this functionality, an arch's bitops.h file needs to define each of
8*4882a593Smuzhiyun * the below bit operations with an arch_ prefix (e.g. arch_set_bit(),
9*4882a593Smuzhiyun * arch___set_bit(), etc.).
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun #ifndef _ASM_GENERIC_BITOPS_INSTRUMENTED_ATOMIC_H
12*4882a593Smuzhiyun #define _ASM_GENERIC_BITOPS_INSTRUMENTED_ATOMIC_H
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/instrumented.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun /**
17*4882a593Smuzhiyun * set_bit - Atomically set a bit in memory
18*4882a593Smuzhiyun * @nr: the bit to set
19*4882a593Smuzhiyun * @addr: the address to start counting from
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * This is a relaxed atomic operation (no implied memory barriers).
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * Note that @nr may be almost arbitrarily large; this function is not
24*4882a593Smuzhiyun * restricted to acting on a single-word quantity.
25*4882a593Smuzhiyun */
set_bit(long nr,volatile unsigned long * addr)26*4882a593Smuzhiyun static inline void set_bit(long nr, volatile unsigned long *addr)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));
29*4882a593Smuzhiyun arch_set_bit(nr, addr);
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /**
33*4882a593Smuzhiyun * clear_bit - Clears a bit in memory
34*4882a593Smuzhiyun * @nr: Bit to clear
35*4882a593Smuzhiyun * @addr: Address to start counting from
36*4882a593Smuzhiyun *
37*4882a593Smuzhiyun * This is a relaxed atomic operation (no implied memory barriers).
38*4882a593Smuzhiyun */
clear_bit(long nr,volatile unsigned long * addr)39*4882a593Smuzhiyun static inline void clear_bit(long nr, volatile unsigned long *addr)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));
42*4882a593Smuzhiyun arch_clear_bit(nr, addr);
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /**
46*4882a593Smuzhiyun * change_bit - Toggle a bit in memory
47*4882a593Smuzhiyun * @nr: Bit to change
48*4882a593Smuzhiyun * @addr: Address to start counting from
49*4882a593Smuzhiyun *
50*4882a593Smuzhiyun * This is a relaxed atomic operation (no implied memory barriers).
51*4882a593Smuzhiyun *
52*4882a593Smuzhiyun * Note that @nr may be almost arbitrarily large; this function is not
53*4882a593Smuzhiyun * restricted to acting on a single-word quantity.
54*4882a593Smuzhiyun */
change_bit(long nr,volatile unsigned long * addr)55*4882a593Smuzhiyun static inline void change_bit(long nr, volatile unsigned long *addr)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));
58*4882a593Smuzhiyun arch_change_bit(nr, addr);
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /**
62*4882a593Smuzhiyun * test_and_set_bit - Set a bit and return its old value
63*4882a593Smuzhiyun * @nr: Bit to set
64*4882a593Smuzhiyun * @addr: Address to count from
65*4882a593Smuzhiyun *
66*4882a593Smuzhiyun * This is an atomic fully-ordered operation (implied full memory barrier).
67*4882a593Smuzhiyun */
test_and_set_bit(long nr,volatile unsigned long * addr)68*4882a593Smuzhiyun static inline bool test_and_set_bit(long nr, volatile unsigned long *addr)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
71*4882a593Smuzhiyun return arch_test_and_set_bit(nr, addr);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /**
75*4882a593Smuzhiyun * test_and_clear_bit - Clear a bit and return its old value
76*4882a593Smuzhiyun * @nr: Bit to clear
77*4882a593Smuzhiyun * @addr: Address to count from
78*4882a593Smuzhiyun *
79*4882a593Smuzhiyun * This is an atomic fully-ordered operation (implied full memory barrier).
80*4882a593Smuzhiyun */
test_and_clear_bit(long nr,volatile unsigned long * addr)81*4882a593Smuzhiyun static inline bool test_and_clear_bit(long nr, volatile unsigned long *addr)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
84*4882a593Smuzhiyun return arch_test_and_clear_bit(nr, addr);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /**
88*4882a593Smuzhiyun * test_and_change_bit - Change a bit and return its old value
89*4882a593Smuzhiyun * @nr: Bit to change
90*4882a593Smuzhiyun * @addr: Address to count from
91*4882a593Smuzhiyun *
92*4882a593Smuzhiyun * This is an atomic fully-ordered operation (implied full memory barrier).
93*4882a593Smuzhiyun */
test_and_change_bit(long nr,volatile unsigned long * addr)94*4882a593Smuzhiyun static inline bool test_and_change_bit(long nr, volatile unsigned long *addr)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
97*4882a593Smuzhiyun return arch_test_and_change_bit(nr, addr);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun #endif /* _ASM_GENERIC_BITOPS_INSTRUMENTED_NON_ATOMIC_H */
101