1*4882a593Smuzhiyun /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2*4882a593Smuzhiyun /****************************************************************************** 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Name: actbl1.h - Additional ACPI table definitions 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (C) 2000 - 2020, Intel Corp. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun *****************************************************************************/ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __ACTBL1_H__ 11*4882a593Smuzhiyun #define __ACTBL1_H__ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /******************************************************************************* 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * Additional ACPI Tables 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * These tables are not consumed directly by the ACPICA subsystem, but are 18*4882a593Smuzhiyun * included here to support device drivers and the AML disassembler. 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun ******************************************************************************/ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* 23*4882a593Smuzhiyun * Values for description table header signatures for tables defined in this 24*4882a593Smuzhiyun * file. Useful because they make it more difficult to inadvertently type in 25*4882a593Smuzhiyun * the wrong signature. 26*4882a593Smuzhiyun */ 27*4882a593Smuzhiyun #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */ 28*4882a593Smuzhiyun #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 29*4882a593Smuzhiyun #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */ 30*4882a593Smuzhiyun #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */ 31*4882a593Smuzhiyun #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 32*4882a593Smuzhiyun #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */ 33*4882a593Smuzhiyun #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */ 34*4882a593Smuzhiyun #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */ 35*4882a593Smuzhiyun #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */ 36*4882a593Smuzhiyun #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */ 37*4882a593Smuzhiyun #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 38*4882a593Smuzhiyun #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 39*4882a593Smuzhiyun #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 40*4882a593Smuzhiyun #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */ 41*4882a593Smuzhiyun #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */ 42*4882a593Smuzhiyun #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 43*4882a593Smuzhiyun #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 44*4882a593Smuzhiyun #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */ 45*4882a593Smuzhiyun #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */ 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */ 48*4882a593Smuzhiyun #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */ 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* Reserved table signatures */ 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ 53*4882a593Smuzhiyun #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* 56*4882a593Smuzhiyun * These tables have been seen in the field, but no definition has been found 57*4882a593Smuzhiyun */ 58*4882a593Smuzhiyun #ifdef ACPI_UNDEFINED_TABLES 59*4882a593Smuzhiyun #define ACPI_SIG_ATKG "ATKG" 60*4882a593Smuzhiyun #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */ 61*4882a593Smuzhiyun #define ACPI_SIG_IEIT "IEIT" 62*4882a593Smuzhiyun #endif 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /* 65*4882a593Smuzhiyun * All tables must be byte-packed to match the ACPI specification, since 66*4882a593Smuzhiyun * the tables are provided by the system BIOS. 67*4882a593Smuzhiyun */ 68*4882a593Smuzhiyun #pragma pack(1) 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun /* 71*4882a593Smuzhiyun * Note: C bitfields are not used for this reason: 72*4882a593Smuzhiyun * 73*4882a593Smuzhiyun * "Bitfields are great and easy to read, but unfortunately the C language 74*4882a593Smuzhiyun * does not specify the layout of bitfields in memory, which means they are 75*4882a593Smuzhiyun * essentially useless for dealing with packed data in on-disk formats or 76*4882a593Smuzhiyun * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 77*4882a593Smuzhiyun * this decision was a design error in C. Ritchie could have picked an order 78*4882a593Smuzhiyun * and stuck with it." Norman Ramsey. 79*4882a593Smuzhiyun * See http://stackoverflow.com/a/1053662/41661 80*4882a593Smuzhiyun */ 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /******************************************************************************* 83*4882a593Smuzhiyun * 84*4882a593Smuzhiyun * Common subtable headers 85*4882a593Smuzhiyun * 86*4882a593Smuzhiyun ******************************************************************************/ 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* Generic subtable header (used in MADT, SRAT, etc.) */ 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun struct acpi_subtable_header { 91*4882a593Smuzhiyun u8 type; 92*4882a593Smuzhiyun u8 length; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun struct acpi_whea_header { 98*4882a593Smuzhiyun u8 action; 99*4882a593Smuzhiyun u8 instruction; 100*4882a593Smuzhiyun u8 flags; 101*4882a593Smuzhiyun u8 reserved; 102*4882a593Smuzhiyun struct acpi_generic_address register_region; 103*4882a593Smuzhiyun u64 value; /* Value used with Read/Write register */ 104*4882a593Smuzhiyun u64 mask; /* Bitmask required for this register instruction */ 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun /******************************************************************************* 108*4882a593Smuzhiyun * 109*4882a593Smuzhiyun * ASF - Alert Standard Format table (Signature "ASF!") 110*4882a593Smuzhiyun * Revision 0x10 111*4882a593Smuzhiyun * 112*4882a593Smuzhiyun * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003 113*4882a593Smuzhiyun * 114*4882a593Smuzhiyun ******************************************************************************/ 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun struct acpi_table_asf { 117*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun /* ASF subtable header */ 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun struct acpi_asf_header { 123*4882a593Smuzhiyun u8 type; 124*4882a593Smuzhiyun u8 reserved; 125*4882a593Smuzhiyun u16 length; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun /* Values for Type field above */ 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun enum acpi_asf_type { 131*4882a593Smuzhiyun ACPI_ASF_TYPE_INFO = 0, 132*4882a593Smuzhiyun ACPI_ASF_TYPE_ALERT = 1, 133*4882a593Smuzhiyun ACPI_ASF_TYPE_CONTROL = 2, 134*4882a593Smuzhiyun ACPI_ASF_TYPE_BOOT = 3, 135*4882a593Smuzhiyun ACPI_ASF_TYPE_ADDRESS = 4, 136*4882a593Smuzhiyun ACPI_ASF_TYPE_RESERVED = 5 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun /* 140*4882a593Smuzhiyun * ASF subtables 141*4882a593Smuzhiyun */ 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun /* 0: ASF Information */ 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun struct acpi_asf_info { 146*4882a593Smuzhiyun struct acpi_asf_header header; 147*4882a593Smuzhiyun u8 min_reset_value; 148*4882a593Smuzhiyun u8 min_poll_interval; 149*4882a593Smuzhiyun u16 system_id; 150*4882a593Smuzhiyun u32 mfg_id; 151*4882a593Smuzhiyun u8 flags; 152*4882a593Smuzhiyun u8 reserved2[3]; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun /* Masks for Flags field above */ 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun #define ACPI_ASF_SMBUS_PROTOCOLS (1) 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun /* 1: ASF Alerts */ 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun struct acpi_asf_alert { 162*4882a593Smuzhiyun struct acpi_asf_header header; 163*4882a593Smuzhiyun u8 assert_mask; 164*4882a593Smuzhiyun u8 deassert_mask; 165*4882a593Smuzhiyun u8 alerts; 166*4882a593Smuzhiyun u8 data_length; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun struct acpi_asf_alert_data { 170*4882a593Smuzhiyun u8 address; 171*4882a593Smuzhiyun u8 command; 172*4882a593Smuzhiyun u8 mask; 173*4882a593Smuzhiyun u8 value; 174*4882a593Smuzhiyun u8 sensor_type; 175*4882a593Smuzhiyun u8 type; 176*4882a593Smuzhiyun u8 offset; 177*4882a593Smuzhiyun u8 source_type; 178*4882a593Smuzhiyun u8 severity; 179*4882a593Smuzhiyun u8 sensor_number; 180*4882a593Smuzhiyun u8 entity; 181*4882a593Smuzhiyun u8 instance; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun /* 2: ASF Remote Control */ 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun struct acpi_asf_remote { 187*4882a593Smuzhiyun struct acpi_asf_header header; 188*4882a593Smuzhiyun u8 controls; 189*4882a593Smuzhiyun u8 data_length; 190*4882a593Smuzhiyun u16 reserved2; 191*4882a593Smuzhiyun }; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun struct acpi_asf_control_data { 194*4882a593Smuzhiyun u8 function; 195*4882a593Smuzhiyun u8 address; 196*4882a593Smuzhiyun u8 command; 197*4882a593Smuzhiyun u8 value; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun /* 3: ASF RMCP Boot Options */ 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun struct acpi_asf_rmcp { 203*4882a593Smuzhiyun struct acpi_asf_header header; 204*4882a593Smuzhiyun u8 capabilities[7]; 205*4882a593Smuzhiyun u8 completion_code; 206*4882a593Smuzhiyun u32 enterprise_id; 207*4882a593Smuzhiyun u8 command; 208*4882a593Smuzhiyun u16 parameter; 209*4882a593Smuzhiyun u16 boot_options; 210*4882a593Smuzhiyun u16 oem_parameters; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun /* 4: ASF Address */ 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun struct acpi_asf_address { 216*4882a593Smuzhiyun struct acpi_asf_header header; 217*4882a593Smuzhiyun u8 eprom_address; 218*4882a593Smuzhiyun u8 devices; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun /******************************************************************************* 222*4882a593Smuzhiyun * 223*4882a593Smuzhiyun * BERT - Boot Error Record Table (ACPI 4.0) 224*4882a593Smuzhiyun * Version 1 225*4882a593Smuzhiyun * 226*4882a593Smuzhiyun ******************************************************************************/ 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun struct acpi_table_bert { 229*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 230*4882a593Smuzhiyun u32 region_length; /* Length of the boot error region */ 231*4882a593Smuzhiyun u64 address; /* Physical address of the error region */ 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun /* Boot Error Region (not a subtable, pointed to by Address field above) */ 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun struct acpi_bert_region { 237*4882a593Smuzhiyun u32 block_status; /* Type of error information */ 238*4882a593Smuzhiyun u32 raw_data_offset; /* Offset to raw error data */ 239*4882a593Smuzhiyun u32 raw_data_length; /* Length of raw error data */ 240*4882a593Smuzhiyun u32 data_length; /* Length of generic error data */ 241*4882a593Smuzhiyun u32 error_severity; /* Severity code */ 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun /* Values for block_status flags above */ 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun #define ACPI_BERT_UNCORRECTABLE (1) 247*4882a593Smuzhiyun #define ACPI_BERT_CORRECTABLE (1<<1) 248*4882a593Smuzhiyun #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 249*4882a593Smuzhiyun #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 250*4882a593Smuzhiyun #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun /* Values for error_severity above */ 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun enum acpi_bert_error_severity { 255*4882a593Smuzhiyun ACPI_BERT_ERROR_CORRECTABLE = 0, 256*4882a593Smuzhiyun ACPI_BERT_ERROR_FATAL = 1, 257*4882a593Smuzhiyun ACPI_BERT_ERROR_CORRECTED = 2, 258*4882a593Smuzhiyun ACPI_BERT_ERROR_NONE = 3, 259*4882a593Smuzhiyun ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 260*4882a593Smuzhiyun }; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun /* 263*4882a593Smuzhiyun * Note: The generic error data that follows the error_severity field above 264*4882a593Smuzhiyun * uses the struct acpi_hest_generic_data defined under the HEST table below 265*4882a593Smuzhiyun */ 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun /******************************************************************************* 268*4882a593Smuzhiyun * 269*4882a593Smuzhiyun * BGRT - Boot Graphics Resource Table (ACPI 5.0) 270*4882a593Smuzhiyun * Version 1 271*4882a593Smuzhiyun * 272*4882a593Smuzhiyun ******************************************************************************/ 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun struct acpi_table_bgrt { 275*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 276*4882a593Smuzhiyun u16 version; 277*4882a593Smuzhiyun u8 status; 278*4882a593Smuzhiyun u8 image_type; 279*4882a593Smuzhiyun u64 image_address; 280*4882a593Smuzhiyun u32 image_offset_x; 281*4882a593Smuzhiyun u32 image_offset_y; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun /* Flags for Status field above */ 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun #define ACPI_BGRT_DISPLAYED (1) 287*4882a593Smuzhiyun #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1) 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun /******************************************************************************* 290*4882a593Smuzhiyun * 291*4882a593Smuzhiyun * BOOT - Simple Boot Flag Table 292*4882a593Smuzhiyun * Version 1 293*4882a593Smuzhiyun * 294*4882a593Smuzhiyun * Conforms to the "Simple Boot Flag Specification", Version 2.1 295*4882a593Smuzhiyun * 296*4882a593Smuzhiyun ******************************************************************************/ 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun struct acpi_table_boot { 299*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 300*4882a593Smuzhiyun u8 cmos_index; /* Index in CMOS RAM for the boot register */ 301*4882a593Smuzhiyun u8 reserved[3]; 302*4882a593Smuzhiyun }; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun /******************************************************************************* 305*4882a593Smuzhiyun * 306*4882a593Smuzhiyun * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 307*4882a593Smuzhiyun * Version 1 308*4882a593Smuzhiyun * 309*4882a593Smuzhiyun ******************************************************************************/ 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun struct acpi_table_cpep { 312*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 313*4882a593Smuzhiyun u64 reserved; 314*4882a593Smuzhiyun }; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun /* Subtable */ 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun struct acpi_cpep_polling { 319*4882a593Smuzhiyun struct acpi_subtable_header header; 320*4882a593Smuzhiyun u8 id; /* Processor ID */ 321*4882a593Smuzhiyun u8 eid; /* Processor EID */ 322*4882a593Smuzhiyun u32 interval; /* Polling interval (msec) */ 323*4882a593Smuzhiyun }; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun /******************************************************************************* 326*4882a593Smuzhiyun * 327*4882a593Smuzhiyun * CSRT - Core System Resource Table 328*4882a593Smuzhiyun * Version 0 329*4882a593Smuzhiyun * 330*4882a593Smuzhiyun * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011 331*4882a593Smuzhiyun * 332*4882a593Smuzhiyun ******************************************************************************/ 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun struct acpi_table_csrt { 335*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 336*4882a593Smuzhiyun }; 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun /* Resource Group subtable */ 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun struct acpi_csrt_group { 341*4882a593Smuzhiyun u32 length; 342*4882a593Smuzhiyun u32 vendor_id; 343*4882a593Smuzhiyun u32 subvendor_id; 344*4882a593Smuzhiyun u16 device_id; 345*4882a593Smuzhiyun u16 subdevice_id; 346*4882a593Smuzhiyun u16 revision; 347*4882a593Smuzhiyun u16 reserved; 348*4882a593Smuzhiyun u32 shared_info_length; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun /* Shared data immediately follows (Length = shared_info_length) */ 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun /* Shared Info subtable */ 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun struct acpi_csrt_shared_info { 356*4882a593Smuzhiyun u16 major_version; 357*4882a593Smuzhiyun u16 minor_version; 358*4882a593Smuzhiyun u32 mmio_base_low; 359*4882a593Smuzhiyun u32 mmio_base_high; 360*4882a593Smuzhiyun u32 gsi_interrupt; 361*4882a593Smuzhiyun u8 interrupt_polarity; 362*4882a593Smuzhiyun u8 interrupt_mode; 363*4882a593Smuzhiyun u8 num_channels; 364*4882a593Smuzhiyun u8 dma_address_width; 365*4882a593Smuzhiyun u16 base_request_line; 366*4882a593Smuzhiyun u16 num_handshake_signals; 367*4882a593Smuzhiyun u32 max_block_size; 368*4882a593Smuzhiyun 369*4882a593Smuzhiyun /* Resource descriptors immediately follow (Length = Group length - shared_info_length) */ 370*4882a593Smuzhiyun }; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun /* Resource Descriptor subtable */ 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun struct acpi_csrt_descriptor { 375*4882a593Smuzhiyun u32 length; 376*4882a593Smuzhiyun u16 type; 377*4882a593Smuzhiyun u16 subtype; 378*4882a593Smuzhiyun u32 uid; 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun /* Resource-specific information immediately follows */ 381*4882a593Smuzhiyun }; 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun /* Resource Types */ 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun #define ACPI_CSRT_TYPE_INTERRUPT 0x0001 386*4882a593Smuzhiyun #define ACPI_CSRT_TYPE_TIMER 0x0002 387*4882a593Smuzhiyun #define ACPI_CSRT_TYPE_DMA 0x0003 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun /* Resource Subtypes */ 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun #define ACPI_CSRT_XRUPT_LINE 0x0000 392*4882a593Smuzhiyun #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001 393*4882a593Smuzhiyun #define ACPI_CSRT_TIMER 0x0000 394*4882a593Smuzhiyun #define ACPI_CSRT_DMA_CHANNEL 0x0000 395*4882a593Smuzhiyun #define ACPI_CSRT_DMA_CONTROLLER 0x0001 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun /******************************************************************************* 398*4882a593Smuzhiyun * 399*4882a593Smuzhiyun * DBG2 - Debug Port Table 2 400*4882a593Smuzhiyun * Version 0 (Both main table and subtables) 401*4882a593Smuzhiyun * 402*4882a593Smuzhiyun * Conforms to "Microsoft Debug Port Table 2 (DBG2)", December 10, 2015 403*4882a593Smuzhiyun * 404*4882a593Smuzhiyun ******************************************************************************/ 405*4882a593Smuzhiyun 406*4882a593Smuzhiyun struct acpi_table_dbg2 { 407*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 408*4882a593Smuzhiyun u32 info_offset; 409*4882a593Smuzhiyun u32 info_count; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun struct acpi_dbg2_header { 413*4882a593Smuzhiyun u32 info_offset; 414*4882a593Smuzhiyun u32 info_count; 415*4882a593Smuzhiyun }; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun /* Debug Device Information Subtable */ 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun struct acpi_dbg2_device { 420*4882a593Smuzhiyun u8 revision; 421*4882a593Smuzhiyun u16 length; 422*4882a593Smuzhiyun u8 register_count; /* Number of base_address registers */ 423*4882a593Smuzhiyun u16 namepath_length; 424*4882a593Smuzhiyun u16 namepath_offset; 425*4882a593Smuzhiyun u16 oem_data_length; 426*4882a593Smuzhiyun u16 oem_data_offset; 427*4882a593Smuzhiyun u16 port_type; 428*4882a593Smuzhiyun u16 port_subtype; 429*4882a593Smuzhiyun u16 reserved; 430*4882a593Smuzhiyun u16 base_address_offset; 431*4882a593Smuzhiyun u16 address_size_offset; 432*4882a593Smuzhiyun /* 433*4882a593Smuzhiyun * Data that follows: 434*4882a593Smuzhiyun * base_address (required) - Each in 12-byte Generic Address Structure format. 435*4882a593Smuzhiyun * address_size (required) - Array of u32 sizes corresponding to each base_address register. 436*4882a593Smuzhiyun * Namepath (required) - Null terminated string. Single dot if not supported. 437*4882a593Smuzhiyun * oem_data (optional) - Length is oem_data_length. 438*4882a593Smuzhiyun */ 439*4882a593Smuzhiyun }; 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun /* Types for port_type field above */ 442*4882a593Smuzhiyun 443*4882a593Smuzhiyun #define ACPI_DBG2_SERIAL_PORT 0x8000 444*4882a593Smuzhiyun #define ACPI_DBG2_1394_PORT 0x8001 445*4882a593Smuzhiyun #define ACPI_DBG2_USB_PORT 0x8002 446*4882a593Smuzhiyun #define ACPI_DBG2_NET_PORT 0x8003 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun /* Subtypes for port_subtype field above */ 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun #define ACPI_DBG2_16550_COMPATIBLE 0x0000 451*4882a593Smuzhiyun #define ACPI_DBG2_16550_SUBSET 0x0001 452*4882a593Smuzhiyun #define ACPI_DBG2_ARM_PL011 0x0003 453*4882a593Smuzhiyun #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D 454*4882a593Smuzhiyun #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E 455*4882a593Smuzhiyun #define ACPI_DBG2_ARM_DCC 0x000F 456*4882a593Smuzhiyun #define ACPI_DBG2_BCM2835 0x0010 457*4882a593Smuzhiyun 458*4882a593Smuzhiyun #define ACPI_DBG2_1394_STANDARD 0x0000 459*4882a593Smuzhiyun 460*4882a593Smuzhiyun #define ACPI_DBG2_USB_XHCI 0x0000 461*4882a593Smuzhiyun #define ACPI_DBG2_USB_EHCI 0x0001 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun /******************************************************************************* 464*4882a593Smuzhiyun * 465*4882a593Smuzhiyun * DBGP - Debug Port table 466*4882a593Smuzhiyun * Version 1 467*4882a593Smuzhiyun * 468*4882a593Smuzhiyun * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000 469*4882a593Smuzhiyun * 470*4882a593Smuzhiyun ******************************************************************************/ 471*4882a593Smuzhiyun 472*4882a593Smuzhiyun struct acpi_table_dbgp { 473*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 474*4882a593Smuzhiyun u8 type; /* 0=full 16550, 1=subset of 16550 */ 475*4882a593Smuzhiyun u8 reserved[3]; 476*4882a593Smuzhiyun struct acpi_generic_address debug_port; 477*4882a593Smuzhiyun }; 478*4882a593Smuzhiyun 479*4882a593Smuzhiyun /******************************************************************************* 480*4882a593Smuzhiyun * 481*4882a593Smuzhiyun * DMAR - DMA Remapping table 482*4882a593Smuzhiyun * Version 1 483*4882a593Smuzhiyun * 484*4882a593Smuzhiyun * Conforms to "Intel Virtualization Technology for Directed I/O", 485*4882a593Smuzhiyun * Version 2.3, October 2014 486*4882a593Smuzhiyun * 487*4882a593Smuzhiyun ******************************************************************************/ 488*4882a593Smuzhiyun 489*4882a593Smuzhiyun struct acpi_table_dmar { 490*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 491*4882a593Smuzhiyun u8 width; /* Host Address Width */ 492*4882a593Smuzhiyun u8 flags; 493*4882a593Smuzhiyun u8 reserved[10]; 494*4882a593Smuzhiyun }; 495*4882a593Smuzhiyun 496*4882a593Smuzhiyun /* Masks for Flags field above */ 497*4882a593Smuzhiyun 498*4882a593Smuzhiyun #define ACPI_DMAR_INTR_REMAP (1) 499*4882a593Smuzhiyun #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1) 500*4882a593Smuzhiyun #define ACPI_DMAR_X2APIC_MODE (1<<2) 501*4882a593Smuzhiyun 502*4882a593Smuzhiyun /* DMAR subtable header */ 503*4882a593Smuzhiyun 504*4882a593Smuzhiyun struct acpi_dmar_header { 505*4882a593Smuzhiyun u16 type; 506*4882a593Smuzhiyun u16 length; 507*4882a593Smuzhiyun }; 508*4882a593Smuzhiyun 509*4882a593Smuzhiyun /* Values for subtable type in struct acpi_dmar_header */ 510*4882a593Smuzhiyun 511*4882a593Smuzhiyun enum acpi_dmar_type { 512*4882a593Smuzhiyun ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, 513*4882a593Smuzhiyun ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, 514*4882a593Smuzhiyun ACPI_DMAR_TYPE_ROOT_ATS = 2, 515*4882a593Smuzhiyun ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, 516*4882a593Smuzhiyun ACPI_DMAR_TYPE_NAMESPACE = 4, 517*4882a593Smuzhiyun ACPI_DMAR_TYPE_RESERVED = 5 /* 5 and greater are reserved */ 518*4882a593Smuzhiyun }; 519*4882a593Smuzhiyun 520*4882a593Smuzhiyun /* DMAR Device Scope structure */ 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun struct acpi_dmar_device_scope { 523*4882a593Smuzhiyun u8 entry_type; 524*4882a593Smuzhiyun u8 length; 525*4882a593Smuzhiyun u16 reserved; 526*4882a593Smuzhiyun u8 enumeration_id; 527*4882a593Smuzhiyun u8 bus; 528*4882a593Smuzhiyun }; 529*4882a593Smuzhiyun 530*4882a593Smuzhiyun /* Values for entry_type in struct acpi_dmar_device_scope - device types */ 531*4882a593Smuzhiyun 532*4882a593Smuzhiyun enum acpi_dmar_scope_type { 533*4882a593Smuzhiyun ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0, 534*4882a593Smuzhiyun ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1, 535*4882a593Smuzhiyun ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2, 536*4882a593Smuzhiyun ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3, 537*4882a593Smuzhiyun ACPI_DMAR_SCOPE_TYPE_HPET = 4, 538*4882a593Smuzhiyun ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5, 539*4882a593Smuzhiyun ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 540*4882a593Smuzhiyun }; 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun struct acpi_dmar_pci_path { 543*4882a593Smuzhiyun u8 device; 544*4882a593Smuzhiyun u8 function; 545*4882a593Smuzhiyun }; 546*4882a593Smuzhiyun 547*4882a593Smuzhiyun /* 548*4882a593Smuzhiyun * DMAR Subtables, correspond to Type in struct acpi_dmar_header 549*4882a593Smuzhiyun */ 550*4882a593Smuzhiyun 551*4882a593Smuzhiyun /* 0: Hardware Unit Definition */ 552*4882a593Smuzhiyun 553*4882a593Smuzhiyun struct acpi_dmar_hardware_unit { 554*4882a593Smuzhiyun struct acpi_dmar_header header; 555*4882a593Smuzhiyun u8 flags; 556*4882a593Smuzhiyun u8 reserved; 557*4882a593Smuzhiyun u16 segment; 558*4882a593Smuzhiyun u64 address; /* Register Base Address */ 559*4882a593Smuzhiyun }; 560*4882a593Smuzhiyun 561*4882a593Smuzhiyun /* Masks for Flags field above */ 562*4882a593Smuzhiyun 563*4882a593Smuzhiyun #define ACPI_DMAR_INCLUDE_ALL (1) 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun /* 1: Reserved Memory Definition */ 566*4882a593Smuzhiyun 567*4882a593Smuzhiyun struct acpi_dmar_reserved_memory { 568*4882a593Smuzhiyun struct acpi_dmar_header header; 569*4882a593Smuzhiyun u16 reserved; 570*4882a593Smuzhiyun u16 segment; 571*4882a593Smuzhiyun u64 base_address; /* 4K aligned base address */ 572*4882a593Smuzhiyun u64 end_address; /* 4K aligned limit address */ 573*4882a593Smuzhiyun }; 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun /* Masks for Flags field above */ 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun #define ACPI_DMAR_ALLOW_ALL (1) 578*4882a593Smuzhiyun 579*4882a593Smuzhiyun /* 2: Root Port ATS Capability Reporting Structure */ 580*4882a593Smuzhiyun 581*4882a593Smuzhiyun struct acpi_dmar_atsr { 582*4882a593Smuzhiyun struct acpi_dmar_header header; 583*4882a593Smuzhiyun u8 flags; 584*4882a593Smuzhiyun u8 reserved; 585*4882a593Smuzhiyun u16 segment; 586*4882a593Smuzhiyun }; 587*4882a593Smuzhiyun 588*4882a593Smuzhiyun /* Masks for Flags field above */ 589*4882a593Smuzhiyun 590*4882a593Smuzhiyun #define ACPI_DMAR_ALL_PORTS (1) 591*4882a593Smuzhiyun 592*4882a593Smuzhiyun /* 3: Remapping Hardware Static Affinity Structure */ 593*4882a593Smuzhiyun 594*4882a593Smuzhiyun struct acpi_dmar_rhsa { 595*4882a593Smuzhiyun struct acpi_dmar_header header; 596*4882a593Smuzhiyun u32 reserved; 597*4882a593Smuzhiyun u64 base_address; 598*4882a593Smuzhiyun u32 proximity_domain; 599*4882a593Smuzhiyun }; 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun /* 4: ACPI Namespace Device Declaration Structure */ 602*4882a593Smuzhiyun 603*4882a593Smuzhiyun struct acpi_dmar_andd { 604*4882a593Smuzhiyun struct acpi_dmar_header header; 605*4882a593Smuzhiyun u8 reserved[3]; 606*4882a593Smuzhiyun u8 device_number; 607*4882a593Smuzhiyun char device_name[1]; 608*4882a593Smuzhiyun }; 609*4882a593Smuzhiyun 610*4882a593Smuzhiyun /******************************************************************************* 611*4882a593Smuzhiyun * 612*4882a593Smuzhiyun * DRTM - Dynamic Root of Trust for Measurement table 613*4882a593Smuzhiyun * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0 614*4882a593Smuzhiyun * Table version 1 615*4882a593Smuzhiyun * 616*4882a593Smuzhiyun ******************************************************************************/ 617*4882a593Smuzhiyun 618*4882a593Smuzhiyun struct acpi_table_drtm { 619*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 620*4882a593Smuzhiyun u64 entry_base_address; 621*4882a593Smuzhiyun u64 entry_length; 622*4882a593Smuzhiyun u32 entry_address32; 623*4882a593Smuzhiyun u64 entry_address64; 624*4882a593Smuzhiyun u64 exit_address; 625*4882a593Smuzhiyun u64 log_area_address; 626*4882a593Smuzhiyun u32 log_area_length; 627*4882a593Smuzhiyun u64 arch_dependent_address; 628*4882a593Smuzhiyun u32 flags; 629*4882a593Smuzhiyun }; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun /* Flag Definitions for above */ 632*4882a593Smuzhiyun 633*4882a593Smuzhiyun #define ACPI_DRTM_ACCESS_ALLOWED (1) 634*4882a593Smuzhiyun #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1) 635*4882a593Smuzhiyun #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2) 636*4882a593Smuzhiyun #define ACPI_DRTM_AUTHORITY_ORDER (1<<3) 637*4882a593Smuzhiyun 638*4882a593Smuzhiyun /* 1) Validated Tables List (64-bit addresses) */ 639*4882a593Smuzhiyun 640*4882a593Smuzhiyun struct acpi_drtm_vtable_list { 641*4882a593Smuzhiyun u32 validated_table_count; 642*4882a593Smuzhiyun u64 validated_tables[1]; 643*4882a593Smuzhiyun }; 644*4882a593Smuzhiyun 645*4882a593Smuzhiyun /* 2) Resources List (of Resource Descriptors) */ 646*4882a593Smuzhiyun 647*4882a593Smuzhiyun /* Resource Descriptor */ 648*4882a593Smuzhiyun 649*4882a593Smuzhiyun struct acpi_drtm_resource { 650*4882a593Smuzhiyun u8 size[7]; 651*4882a593Smuzhiyun u8 type; 652*4882a593Smuzhiyun u64 address; 653*4882a593Smuzhiyun }; 654*4882a593Smuzhiyun 655*4882a593Smuzhiyun struct acpi_drtm_resource_list { 656*4882a593Smuzhiyun u32 resource_count; 657*4882a593Smuzhiyun struct acpi_drtm_resource resources[1]; 658*4882a593Smuzhiyun }; 659*4882a593Smuzhiyun 660*4882a593Smuzhiyun /* 3) Platform-specific Identifiers List */ 661*4882a593Smuzhiyun 662*4882a593Smuzhiyun struct acpi_drtm_dps_id { 663*4882a593Smuzhiyun u32 dps_id_length; 664*4882a593Smuzhiyun u8 dps_id[16]; 665*4882a593Smuzhiyun }; 666*4882a593Smuzhiyun 667*4882a593Smuzhiyun /******************************************************************************* 668*4882a593Smuzhiyun * 669*4882a593Smuzhiyun * ECDT - Embedded Controller Boot Resources Table 670*4882a593Smuzhiyun * Version 1 671*4882a593Smuzhiyun * 672*4882a593Smuzhiyun ******************************************************************************/ 673*4882a593Smuzhiyun 674*4882a593Smuzhiyun struct acpi_table_ecdt { 675*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 676*4882a593Smuzhiyun struct acpi_generic_address control; /* Address of EC command/status register */ 677*4882a593Smuzhiyun struct acpi_generic_address data; /* Address of EC data register */ 678*4882a593Smuzhiyun u32 uid; /* Unique ID - must be same as the EC _UID method */ 679*4882a593Smuzhiyun u8 gpe; /* The GPE for the EC */ 680*4882a593Smuzhiyun u8 id[1]; /* Full namepath of the EC in the ACPI namespace */ 681*4882a593Smuzhiyun }; 682*4882a593Smuzhiyun 683*4882a593Smuzhiyun /******************************************************************************* 684*4882a593Smuzhiyun * 685*4882a593Smuzhiyun * EINJ - Error Injection Table (ACPI 4.0) 686*4882a593Smuzhiyun * Version 1 687*4882a593Smuzhiyun * 688*4882a593Smuzhiyun ******************************************************************************/ 689*4882a593Smuzhiyun 690*4882a593Smuzhiyun struct acpi_table_einj { 691*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 692*4882a593Smuzhiyun u32 header_length; 693*4882a593Smuzhiyun u8 flags; 694*4882a593Smuzhiyun u8 reserved[3]; 695*4882a593Smuzhiyun u32 entries; 696*4882a593Smuzhiyun }; 697*4882a593Smuzhiyun 698*4882a593Smuzhiyun /* EINJ Injection Instruction Entries (actions) */ 699*4882a593Smuzhiyun 700*4882a593Smuzhiyun struct acpi_einj_entry { 701*4882a593Smuzhiyun struct acpi_whea_header whea_header; /* Common header for WHEA tables */ 702*4882a593Smuzhiyun }; 703*4882a593Smuzhiyun 704*4882a593Smuzhiyun /* Masks for Flags field above */ 705*4882a593Smuzhiyun 706*4882a593Smuzhiyun #define ACPI_EINJ_PRESERVE (1) 707*4882a593Smuzhiyun 708*4882a593Smuzhiyun /* Values for Action field above */ 709*4882a593Smuzhiyun 710*4882a593Smuzhiyun enum acpi_einj_actions { 711*4882a593Smuzhiyun ACPI_EINJ_BEGIN_OPERATION = 0, 712*4882a593Smuzhiyun ACPI_EINJ_GET_TRIGGER_TABLE = 1, 713*4882a593Smuzhiyun ACPI_EINJ_SET_ERROR_TYPE = 2, 714*4882a593Smuzhiyun ACPI_EINJ_GET_ERROR_TYPE = 3, 715*4882a593Smuzhiyun ACPI_EINJ_END_OPERATION = 4, 716*4882a593Smuzhiyun ACPI_EINJ_EXECUTE_OPERATION = 5, 717*4882a593Smuzhiyun ACPI_EINJ_CHECK_BUSY_STATUS = 6, 718*4882a593Smuzhiyun ACPI_EINJ_GET_COMMAND_STATUS = 7, 719*4882a593Smuzhiyun ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8, 720*4882a593Smuzhiyun ACPI_EINJ_GET_EXECUTE_TIMINGS = 9, 721*4882a593Smuzhiyun ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */ 722*4882a593Smuzhiyun ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 723*4882a593Smuzhiyun }; 724*4882a593Smuzhiyun 725*4882a593Smuzhiyun /* Values for Instruction field above */ 726*4882a593Smuzhiyun 727*4882a593Smuzhiyun enum acpi_einj_instructions { 728*4882a593Smuzhiyun ACPI_EINJ_READ_REGISTER = 0, 729*4882a593Smuzhiyun ACPI_EINJ_READ_REGISTER_VALUE = 1, 730*4882a593Smuzhiyun ACPI_EINJ_WRITE_REGISTER = 2, 731*4882a593Smuzhiyun ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 732*4882a593Smuzhiyun ACPI_EINJ_NOOP = 4, 733*4882a593Smuzhiyun ACPI_EINJ_FLUSH_CACHELINE = 5, 734*4882a593Smuzhiyun ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 735*4882a593Smuzhiyun }; 736*4882a593Smuzhiyun 737*4882a593Smuzhiyun struct acpi_einj_error_type_with_addr { 738*4882a593Smuzhiyun u32 error_type; 739*4882a593Smuzhiyun u32 vendor_struct_offset; 740*4882a593Smuzhiyun u32 flags; 741*4882a593Smuzhiyun u32 apic_id; 742*4882a593Smuzhiyun u64 address; 743*4882a593Smuzhiyun u64 range; 744*4882a593Smuzhiyun u32 pcie_id; 745*4882a593Smuzhiyun }; 746*4882a593Smuzhiyun 747*4882a593Smuzhiyun struct acpi_einj_vendor { 748*4882a593Smuzhiyun u32 length; 749*4882a593Smuzhiyun u32 pcie_id; 750*4882a593Smuzhiyun u16 vendor_id; 751*4882a593Smuzhiyun u16 device_id; 752*4882a593Smuzhiyun u8 revision_id; 753*4882a593Smuzhiyun u8 reserved[3]; 754*4882a593Smuzhiyun }; 755*4882a593Smuzhiyun 756*4882a593Smuzhiyun /* EINJ Trigger Error Action Table */ 757*4882a593Smuzhiyun 758*4882a593Smuzhiyun struct acpi_einj_trigger { 759*4882a593Smuzhiyun u32 header_size; 760*4882a593Smuzhiyun u32 revision; 761*4882a593Smuzhiyun u32 table_size; 762*4882a593Smuzhiyun u32 entry_count; 763*4882a593Smuzhiyun }; 764*4882a593Smuzhiyun 765*4882a593Smuzhiyun /* Command status return values */ 766*4882a593Smuzhiyun 767*4882a593Smuzhiyun enum acpi_einj_command_status { 768*4882a593Smuzhiyun ACPI_EINJ_SUCCESS = 0, 769*4882a593Smuzhiyun ACPI_EINJ_FAILURE = 1, 770*4882a593Smuzhiyun ACPI_EINJ_INVALID_ACCESS = 2, 771*4882a593Smuzhiyun ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 772*4882a593Smuzhiyun }; 773*4882a593Smuzhiyun 774*4882a593Smuzhiyun /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 775*4882a593Smuzhiyun 776*4882a593Smuzhiyun #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 777*4882a593Smuzhiyun #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 778*4882a593Smuzhiyun #define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 779*4882a593Smuzhiyun #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 780*4882a593Smuzhiyun #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 781*4882a593Smuzhiyun #define ACPI_EINJ_MEMORY_FATAL (1<<5) 782*4882a593Smuzhiyun #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 783*4882a593Smuzhiyun #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 784*4882a593Smuzhiyun #define ACPI_EINJ_PCIX_FATAL (1<<8) 785*4882a593Smuzhiyun #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 786*4882a593Smuzhiyun #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 787*4882a593Smuzhiyun #define ACPI_EINJ_PLATFORM_FATAL (1<<11) 788*4882a593Smuzhiyun #define ACPI_EINJ_VENDOR_DEFINED (1<<31) 789*4882a593Smuzhiyun 790*4882a593Smuzhiyun /******************************************************************************* 791*4882a593Smuzhiyun * 792*4882a593Smuzhiyun * ERST - Error Record Serialization Table (ACPI 4.0) 793*4882a593Smuzhiyun * Version 1 794*4882a593Smuzhiyun * 795*4882a593Smuzhiyun ******************************************************************************/ 796*4882a593Smuzhiyun 797*4882a593Smuzhiyun struct acpi_table_erst { 798*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 799*4882a593Smuzhiyun u32 header_length; 800*4882a593Smuzhiyun u32 reserved; 801*4882a593Smuzhiyun u32 entries; 802*4882a593Smuzhiyun }; 803*4882a593Smuzhiyun 804*4882a593Smuzhiyun /* ERST Serialization Entries (actions) */ 805*4882a593Smuzhiyun 806*4882a593Smuzhiyun struct acpi_erst_entry { 807*4882a593Smuzhiyun struct acpi_whea_header whea_header; /* Common header for WHEA tables */ 808*4882a593Smuzhiyun }; 809*4882a593Smuzhiyun 810*4882a593Smuzhiyun /* Masks for Flags field above */ 811*4882a593Smuzhiyun 812*4882a593Smuzhiyun #define ACPI_ERST_PRESERVE (1) 813*4882a593Smuzhiyun 814*4882a593Smuzhiyun /* Values for Action field above */ 815*4882a593Smuzhiyun 816*4882a593Smuzhiyun enum acpi_erst_actions { 817*4882a593Smuzhiyun ACPI_ERST_BEGIN_WRITE = 0, 818*4882a593Smuzhiyun ACPI_ERST_BEGIN_READ = 1, 819*4882a593Smuzhiyun ACPI_ERST_BEGIN_CLEAR = 2, 820*4882a593Smuzhiyun ACPI_ERST_END = 3, 821*4882a593Smuzhiyun ACPI_ERST_SET_RECORD_OFFSET = 4, 822*4882a593Smuzhiyun ACPI_ERST_EXECUTE_OPERATION = 5, 823*4882a593Smuzhiyun ACPI_ERST_CHECK_BUSY_STATUS = 6, 824*4882a593Smuzhiyun ACPI_ERST_GET_COMMAND_STATUS = 7, 825*4882a593Smuzhiyun ACPI_ERST_GET_RECORD_ID = 8, 826*4882a593Smuzhiyun ACPI_ERST_SET_RECORD_ID = 9, 827*4882a593Smuzhiyun ACPI_ERST_GET_RECORD_COUNT = 10, 828*4882a593Smuzhiyun ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 829*4882a593Smuzhiyun ACPI_ERST_NOT_USED = 12, 830*4882a593Smuzhiyun ACPI_ERST_GET_ERROR_RANGE = 13, 831*4882a593Smuzhiyun ACPI_ERST_GET_ERROR_LENGTH = 14, 832*4882a593Smuzhiyun ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 833*4882a593Smuzhiyun ACPI_ERST_EXECUTE_TIMINGS = 16, 834*4882a593Smuzhiyun ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 835*4882a593Smuzhiyun }; 836*4882a593Smuzhiyun 837*4882a593Smuzhiyun /* Values for Instruction field above */ 838*4882a593Smuzhiyun 839*4882a593Smuzhiyun enum acpi_erst_instructions { 840*4882a593Smuzhiyun ACPI_ERST_READ_REGISTER = 0, 841*4882a593Smuzhiyun ACPI_ERST_READ_REGISTER_VALUE = 1, 842*4882a593Smuzhiyun ACPI_ERST_WRITE_REGISTER = 2, 843*4882a593Smuzhiyun ACPI_ERST_WRITE_REGISTER_VALUE = 3, 844*4882a593Smuzhiyun ACPI_ERST_NOOP = 4, 845*4882a593Smuzhiyun ACPI_ERST_LOAD_VAR1 = 5, 846*4882a593Smuzhiyun ACPI_ERST_LOAD_VAR2 = 6, 847*4882a593Smuzhiyun ACPI_ERST_STORE_VAR1 = 7, 848*4882a593Smuzhiyun ACPI_ERST_ADD = 8, 849*4882a593Smuzhiyun ACPI_ERST_SUBTRACT = 9, 850*4882a593Smuzhiyun ACPI_ERST_ADD_VALUE = 10, 851*4882a593Smuzhiyun ACPI_ERST_SUBTRACT_VALUE = 11, 852*4882a593Smuzhiyun ACPI_ERST_STALL = 12, 853*4882a593Smuzhiyun ACPI_ERST_STALL_WHILE_TRUE = 13, 854*4882a593Smuzhiyun ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 855*4882a593Smuzhiyun ACPI_ERST_GOTO = 15, 856*4882a593Smuzhiyun ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 857*4882a593Smuzhiyun ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 858*4882a593Smuzhiyun ACPI_ERST_MOVE_DATA = 18, 859*4882a593Smuzhiyun ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 860*4882a593Smuzhiyun }; 861*4882a593Smuzhiyun 862*4882a593Smuzhiyun /* Command status return values */ 863*4882a593Smuzhiyun 864*4882a593Smuzhiyun enum acpi_erst_command_status { 865*4882a593Smuzhiyun ACPI_ERST_SUCCESS = 0, 866*4882a593Smuzhiyun ACPI_ERST_NO_SPACE = 1, 867*4882a593Smuzhiyun ACPI_ERST_NOT_AVAILABLE = 2, 868*4882a593Smuzhiyun ACPI_ERST_FAILURE = 3, 869*4882a593Smuzhiyun ACPI_ERST_RECORD_EMPTY = 4, 870*4882a593Smuzhiyun ACPI_ERST_NOT_FOUND = 5, 871*4882a593Smuzhiyun ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 872*4882a593Smuzhiyun }; 873*4882a593Smuzhiyun 874*4882a593Smuzhiyun /* Error Record Serialization Information */ 875*4882a593Smuzhiyun 876*4882a593Smuzhiyun struct acpi_erst_info { 877*4882a593Smuzhiyun u16 signature; /* Should be "ER" */ 878*4882a593Smuzhiyun u8 data[48]; 879*4882a593Smuzhiyun }; 880*4882a593Smuzhiyun 881*4882a593Smuzhiyun /******************************************************************************* 882*4882a593Smuzhiyun * 883*4882a593Smuzhiyun * FPDT - Firmware Performance Data Table (ACPI 5.0) 884*4882a593Smuzhiyun * Version 1 885*4882a593Smuzhiyun * 886*4882a593Smuzhiyun ******************************************************************************/ 887*4882a593Smuzhiyun 888*4882a593Smuzhiyun struct acpi_table_fpdt { 889*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 890*4882a593Smuzhiyun }; 891*4882a593Smuzhiyun 892*4882a593Smuzhiyun /* FPDT subtable header (Performance Record Structure) */ 893*4882a593Smuzhiyun 894*4882a593Smuzhiyun struct acpi_fpdt_header { 895*4882a593Smuzhiyun u16 type; 896*4882a593Smuzhiyun u8 length; 897*4882a593Smuzhiyun u8 revision; 898*4882a593Smuzhiyun }; 899*4882a593Smuzhiyun 900*4882a593Smuzhiyun /* Values for Type field above */ 901*4882a593Smuzhiyun 902*4882a593Smuzhiyun enum acpi_fpdt_type { 903*4882a593Smuzhiyun ACPI_FPDT_TYPE_BOOT = 0, 904*4882a593Smuzhiyun ACPI_FPDT_TYPE_S3PERF = 1 905*4882a593Smuzhiyun }; 906*4882a593Smuzhiyun 907*4882a593Smuzhiyun /* 908*4882a593Smuzhiyun * FPDT subtables 909*4882a593Smuzhiyun */ 910*4882a593Smuzhiyun 911*4882a593Smuzhiyun /* 0: Firmware Basic Boot Performance Record */ 912*4882a593Smuzhiyun 913*4882a593Smuzhiyun struct acpi_fpdt_boot_pointer { 914*4882a593Smuzhiyun struct acpi_fpdt_header header; 915*4882a593Smuzhiyun u8 reserved[4]; 916*4882a593Smuzhiyun u64 address; 917*4882a593Smuzhiyun }; 918*4882a593Smuzhiyun 919*4882a593Smuzhiyun /* 1: S3 Performance Table Pointer Record */ 920*4882a593Smuzhiyun 921*4882a593Smuzhiyun struct acpi_fpdt_s3pt_pointer { 922*4882a593Smuzhiyun struct acpi_fpdt_header header; 923*4882a593Smuzhiyun u8 reserved[4]; 924*4882a593Smuzhiyun u64 address; 925*4882a593Smuzhiyun }; 926*4882a593Smuzhiyun 927*4882a593Smuzhiyun /* 928*4882a593Smuzhiyun * S3PT - S3 Performance Table. This table is pointed to by the 929*4882a593Smuzhiyun * S3 Pointer Record above. 930*4882a593Smuzhiyun */ 931*4882a593Smuzhiyun struct acpi_table_s3pt { 932*4882a593Smuzhiyun u8 signature[4]; /* "S3PT" */ 933*4882a593Smuzhiyun u32 length; 934*4882a593Smuzhiyun }; 935*4882a593Smuzhiyun 936*4882a593Smuzhiyun /* 937*4882a593Smuzhiyun * S3PT Subtables (Not part of the actual FPDT) 938*4882a593Smuzhiyun */ 939*4882a593Smuzhiyun 940*4882a593Smuzhiyun /* Values for Type field in S3PT header */ 941*4882a593Smuzhiyun 942*4882a593Smuzhiyun enum acpi_s3pt_type { 943*4882a593Smuzhiyun ACPI_S3PT_TYPE_RESUME = 0, 944*4882a593Smuzhiyun ACPI_S3PT_TYPE_SUSPEND = 1, 945*4882a593Smuzhiyun ACPI_FPDT_BOOT_PERFORMANCE = 2 946*4882a593Smuzhiyun }; 947*4882a593Smuzhiyun 948*4882a593Smuzhiyun struct acpi_s3pt_resume { 949*4882a593Smuzhiyun struct acpi_fpdt_header header; 950*4882a593Smuzhiyun u32 resume_count; 951*4882a593Smuzhiyun u64 full_resume; 952*4882a593Smuzhiyun u64 average_resume; 953*4882a593Smuzhiyun }; 954*4882a593Smuzhiyun 955*4882a593Smuzhiyun struct acpi_s3pt_suspend { 956*4882a593Smuzhiyun struct acpi_fpdt_header header; 957*4882a593Smuzhiyun u64 suspend_start; 958*4882a593Smuzhiyun u64 suspend_end; 959*4882a593Smuzhiyun }; 960*4882a593Smuzhiyun 961*4882a593Smuzhiyun /* 962*4882a593Smuzhiyun * FPDT Boot Performance Record (Not part of the actual FPDT) 963*4882a593Smuzhiyun */ 964*4882a593Smuzhiyun struct acpi_fpdt_boot { 965*4882a593Smuzhiyun struct acpi_fpdt_header header; 966*4882a593Smuzhiyun u8 reserved[4]; 967*4882a593Smuzhiyun u64 reset_end; 968*4882a593Smuzhiyun u64 load_start; 969*4882a593Smuzhiyun u64 startup_start; 970*4882a593Smuzhiyun u64 exit_services_entry; 971*4882a593Smuzhiyun u64 exit_services_exit; 972*4882a593Smuzhiyun }; 973*4882a593Smuzhiyun 974*4882a593Smuzhiyun /******************************************************************************* 975*4882a593Smuzhiyun * 976*4882a593Smuzhiyun * GTDT - Generic Timer Description Table (ACPI 5.1) 977*4882a593Smuzhiyun * Version 2 978*4882a593Smuzhiyun * 979*4882a593Smuzhiyun ******************************************************************************/ 980*4882a593Smuzhiyun 981*4882a593Smuzhiyun struct acpi_table_gtdt { 982*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 983*4882a593Smuzhiyun u64 counter_block_addresss; 984*4882a593Smuzhiyun u32 reserved; 985*4882a593Smuzhiyun u32 secure_el1_interrupt; 986*4882a593Smuzhiyun u32 secure_el1_flags; 987*4882a593Smuzhiyun u32 non_secure_el1_interrupt; 988*4882a593Smuzhiyun u32 non_secure_el1_flags; 989*4882a593Smuzhiyun u32 virtual_timer_interrupt; 990*4882a593Smuzhiyun u32 virtual_timer_flags; 991*4882a593Smuzhiyun u32 non_secure_el2_interrupt; 992*4882a593Smuzhiyun u32 non_secure_el2_flags; 993*4882a593Smuzhiyun u64 counter_read_block_address; 994*4882a593Smuzhiyun u32 platform_timer_count; 995*4882a593Smuzhiyun u32 platform_timer_offset; 996*4882a593Smuzhiyun }; 997*4882a593Smuzhiyun 998*4882a593Smuzhiyun /* Flag Definitions: Timer Block Physical Timers and Virtual timers */ 999*4882a593Smuzhiyun 1000*4882a593Smuzhiyun #define ACPI_GTDT_INTERRUPT_MODE (1) 1001*4882a593Smuzhiyun #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1) 1002*4882a593Smuzhiyun #define ACPI_GTDT_ALWAYS_ON (1<<2) 1003*4882a593Smuzhiyun 1004*4882a593Smuzhiyun struct acpi_gtdt_el2 { 1005*4882a593Smuzhiyun u32 virtual_el2_timer_gsiv; 1006*4882a593Smuzhiyun u32 virtual_el2_timer_flags; 1007*4882a593Smuzhiyun }; 1008*4882a593Smuzhiyun 1009*4882a593Smuzhiyun /* Common GTDT subtable header */ 1010*4882a593Smuzhiyun 1011*4882a593Smuzhiyun struct acpi_gtdt_header { 1012*4882a593Smuzhiyun u8 type; 1013*4882a593Smuzhiyun u16 length; 1014*4882a593Smuzhiyun }; 1015*4882a593Smuzhiyun 1016*4882a593Smuzhiyun /* Values for GTDT subtable type above */ 1017*4882a593Smuzhiyun 1018*4882a593Smuzhiyun enum acpi_gtdt_type { 1019*4882a593Smuzhiyun ACPI_GTDT_TYPE_TIMER_BLOCK = 0, 1020*4882a593Smuzhiyun ACPI_GTDT_TYPE_WATCHDOG = 1, 1021*4882a593Smuzhiyun ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1022*4882a593Smuzhiyun }; 1023*4882a593Smuzhiyun 1024*4882a593Smuzhiyun /* GTDT Subtables, correspond to Type in struct acpi_gtdt_header */ 1025*4882a593Smuzhiyun 1026*4882a593Smuzhiyun /* 0: Generic Timer Block */ 1027*4882a593Smuzhiyun 1028*4882a593Smuzhiyun struct acpi_gtdt_timer_block { 1029*4882a593Smuzhiyun struct acpi_gtdt_header header; 1030*4882a593Smuzhiyun u8 reserved; 1031*4882a593Smuzhiyun u64 block_address; 1032*4882a593Smuzhiyun u32 timer_count; 1033*4882a593Smuzhiyun u32 timer_offset; 1034*4882a593Smuzhiyun }; 1035*4882a593Smuzhiyun 1036*4882a593Smuzhiyun /* Timer Sub-Structure, one per timer */ 1037*4882a593Smuzhiyun 1038*4882a593Smuzhiyun struct acpi_gtdt_timer_entry { 1039*4882a593Smuzhiyun u8 frame_number; 1040*4882a593Smuzhiyun u8 reserved[3]; 1041*4882a593Smuzhiyun u64 base_address; 1042*4882a593Smuzhiyun u64 el0_base_address; 1043*4882a593Smuzhiyun u32 timer_interrupt; 1044*4882a593Smuzhiyun u32 timer_flags; 1045*4882a593Smuzhiyun u32 virtual_timer_interrupt; 1046*4882a593Smuzhiyun u32 virtual_timer_flags; 1047*4882a593Smuzhiyun u32 common_flags; 1048*4882a593Smuzhiyun }; 1049*4882a593Smuzhiyun 1050*4882a593Smuzhiyun /* Flag Definitions: timer_flags and virtual_timer_flags above */ 1051*4882a593Smuzhiyun 1052*4882a593Smuzhiyun #define ACPI_GTDT_GT_IRQ_MODE (1) 1053*4882a593Smuzhiyun #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1) 1054*4882a593Smuzhiyun 1055*4882a593Smuzhiyun /* Flag Definitions: common_flags above */ 1056*4882a593Smuzhiyun 1057*4882a593Smuzhiyun #define ACPI_GTDT_GT_IS_SECURE_TIMER (1) 1058*4882a593Smuzhiyun #define ACPI_GTDT_GT_ALWAYS_ON (1<<1) 1059*4882a593Smuzhiyun 1060*4882a593Smuzhiyun /* 1: SBSA Generic Watchdog Structure */ 1061*4882a593Smuzhiyun 1062*4882a593Smuzhiyun struct acpi_gtdt_watchdog { 1063*4882a593Smuzhiyun struct acpi_gtdt_header header; 1064*4882a593Smuzhiyun u8 reserved; 1065*4882a593Smuzhiyun u64 refresh_frame_address; 1066*4882a593Smuzhiyun u64 control_frame_address; 1067*4882a593Smuzhiyun u32 timer_interrupt; 1068*4882a593Smuzhiyun u32 timer_flags; 1069*4882a593Smuzhiyun }; 1070*4882a593Smuzhiyun 1071*4882a593Smuzhiyun /* Flag Definitions: timer_flags above */ 1072*4882a593Smuzhiyun 1073*4882a593Smuzhiyun #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1) 1074*4882a593Smuzhiyun #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1) 1075*4882a593Smuzhiyun #define ACPI_GTDT_WATCHDOG_SECURE (1<<2) 1076*4882a593Smuzhiyun 1077*4882a593Smuzhiyun /******************************************************************************* 1078*4882a593Smuzhiyun * 1079*4882a593Smuzhiyun * HEST - Hardware Error Source Table (ACPI 4.0) 1080*4882a593Smuzhiyun * Version 1 1081*4882a593Smuzhiyun * 1082*4882a593Smuzhiyun ******************************************************************************/ 1083*4882a593Smuzhiyun 1084*4882a593Smuzhiyun struct acpi_table_hest { 1085*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 1086*4882a593Smuzhiyun u32 error_source_count; 1087*4882a593Smuzhiyun }; 1088*4882a593Smuzhiyun 1089*4882a593Smuzhiyun /* HEST subtable header */ 1090*4882a593Smuzhiyun 1091*4882a593Smuzhiyun struct acpi_hest_header { 1092*4882a593Smuzhiyun u16 type; 1093*4882a593Smuzhiyun u16 source_id; 1094*4882a593Smuzhiyun }; 1095*4882a593Smuzhiyun 1096*4882a593Smuzhiyun /* Values for Type field above for subtables */ 1097*4882a593Smuzhiyun 1098*4882a593Smuzhiyun enum acpi_hest_types { 1099*4882a593Smuzhiyun ACPI_HEST_TYPE_IA32_CHECK = 0, 1100*4882a593Smuzhiyun ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 1101*4882a593Smuzhiyun ACPI_HEST_TYPE_IA32_NMI = 2, 1102*4882a593Smuzhiyun ACPI_HEST_TYPE_NOT_USED3 = 3, 1103*4882a593Smuzhiyun ACPI_HEST_TYPE_NOT_USED4 = 4, 1104*4882a593Smuzhiyun ACPI_HEST_TYPE_NOT_USED5 = 5, 1105*4882a593Smuzhiyun ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 1106*4882a593Smuzhiyun ACPI_HEST_TYPE_AER_ENDPOINT = 7, 1107*4882a593Smuzhiyun ACPI_HEST_TYPE_AER_BRIDGE = 8, 1108*4882a593Smuzhiyun ACPI_HEST_TYPE_GENERIC_ERROR = 9, 1109*4882a593Smuzhiyun ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 1110*4882a593Smuzhiyun ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 1111*4882a593Smuzhiyun ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 1112*4882a593Smuzhiyun }; 1113*4882a593Smuzhiyun 1114*4882a593Smuzhiyun /* 1115*4882a593Smuzhiyun * HEST substructures contained in subtables 1116*4882a593Smuzhiyun */ 1117*4882a593Smuzhiyun 1118*4882a593Smuzhiyun /* 1119*4882a593Smuzhiyun * IA32 Error Bank(s) - Follows the struct acpi_hest_ia_machine_check and 1120*4882a593Smuzhiyun * struct acpi_hest_ia_corrected structures. 1121*4882a593Smuzhiyun */ 1122*4882a593Smuzhiyun struct acpi_hest_ia_error_bank { 1123*4882a593Smuzhiyun u8 bank_number; 1124*4882a593Smuzhiyun u8 clear_status_on_init; 1125*4882a593Smuzhiyun u8 status_format; 1126*4882a593Smuzhiyun u8 reserved; 1127*4882a593Smuzhiyun u32 control_register; 1128*4882a593Smuzhiyun u64 control_data; 1129*4882a593Smuzhiyun u32 status_register; 1130*4882a593Smuzhiyun u32 address_register; 1131*4882a593Smuzhiyun u32 misc_register; 1132*4882a593Smuzhiyun }; 1133*4882a593Smuzhiyun 1134*4882a593Smuzhiyun /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 1135*4882a593Smuzhiyun 1136*4882a593Smuzhiyun struct acpi_hest_aer_common { 1137*4882a593Smuzhiyun u16 reserved1; 1138*4882a593Smuzhiyun u8 flags; 1139*4882a593Smuzhiyun u8 enabled; 1140*4882a593Smuzhiyun u32 records_to_preallocate; 1141*4882a593Smuzhiyun u32 max_sections_per_record; 1142*4882a593Smuzhiyun u32 bus; /* Bus and Segment numbers */ 1143*4882a593Smuzhiyun u16 device; 1144*4882a593Smuzhiyun u16 function; 1145*4882a593Smuzhiyun u16 device_control; 1146*4882a593Smuzhiyun u16 reserved2; 1147*4882a593Smuzhiyun u32 uncorrectable_mask; 1148*4882a593Smuzhiyun u32 uncorrectable_severity; 1149*4882a593Smuzhiyun u32 correctable_mask; 1150*4882a593Smuzhiyun u32 advanced_capabilities; 1151*4882a593Smuzhiyun }; 1152*4882a593Smuzhiyun 1153*4882a593Smuzhiyun /* Masks for HEST Flags fields */ 1154*4882a593Smuzhiyun 1155*4882a593Smuzhiyun #define ACPI_HEST_FIRMWARE_FIRST (1) 1156*4882a593Smuzhiyun #define ACPI_HEST_GLOBAL (1<<1) 1157*4882a593Smuzhiyun #define ACPI_HEST_GHES_ASSIST (1<<2) 1158*4882a593Smuzhiyun 1159*4882a593Smuzhiyun /* 1160*4882a593Smuzhiyun * Macros to access the bus/segment numbers in Bus field above: 1161*4882a593Smuzhiyun * Bus number is encoded in bits 7:0 1162*4882a593Smuzhiyun * Segment number is encoded in bits 23:8 1163*4882a593Smuzhiyun */ 1164*4882a593Smuzhiyun #define ACPI_HEST_BUS(bus) ((bus) & 0xFF) 1165*4882a593Smuzhiyun #define ACPI_HEST_SEGMENT(bus) (((bus) >> 8) & 0xFFFF) 1166*4882a593Smuzhiyun 1167*4882a593Smuzhiyun /* Hardware Error Notification */ 1168*4882a593Smuzhiyun 1169*4882a593Smuzhiyun struct acpi_hest_notify { 1170*4882a593Smuzhiyun u8 type; 1171*4882a593Smuzhiyun u8 length; 1172*4882a593Smuzhiyun u16 config_write_enable; 1173*4882a593Smuzhiyun u32 poll_interval; 1174*4882a593Smuzhiyun u32 vector; 1175*4882a593Smuzhiyun u32 polling_threshold_value; 1176*4882a593Smuzhiyun u32 polling_threshold_window; 1177*4882a593Smuzhiyun u32 error_threshold_value; 1178*4882a593Smuzhiyun u32 error_threshold_window; 1179*4882a593Smuzhiyun }; 1180*4882a593Smuzhiyun 1181*4882a593Smuzhiyun /* Values for Notify Type field above */ 1182*4882a593Smuzhiyun 1183*4882a593Smuzhiyun enum acpi_hest_notify_types { 1184*4882a593Smuzhiyun ACPI_HEST_NOTIFY_POLLED = 0, 1185*4882a593Smuzhiyun ACPI_HEST_NOTIFY_EXTERNAL = 1, 1186*4882a593Smuzhiyun ACPI_HEST_NOTIFY_LOCAL = 2, 1187*4882a593Smuzhiyun ACPI_HEST_NOTIFY_SCI = 3, 1188*4882a593Smuzhiyun ACPI_HEST_NOTIFY_NMI = 4, 1189*4882a593Smuzhiyun ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 1190*4882a593Smuzhiyun ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 1191*4882a593Smuzhiyun ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 1192*4882a593Smuzhiyun ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 1193*4882a593Smuzhiyun ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 1194*4882a593Smuzhiyun ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 1195*4882a593Smuzhiyun ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 1196*4882a593Smuzhiyun ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 1197*4882a593Smuzhiyun }; 1198*4882a593Smuzhiyun 1199*4882a593Smuzhiyun /* Values for config_write_enable bitfield above */ 1200*4882a593Smuzhiyun 1201*4882a593Smuzhiyun #define ACPI_HEST_TYPE (1) 1202*4882a593Smuzhiyun #define ACPI_HEST_POLL_INTERVAL (1<<1) 1203*4882a593Smuzhiyun #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 1204*4882a593Smuzhiyun #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 1205*4882a593Smuzhiyun #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 1206*4882a593Smuzhiyun #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 1207*4882a593Smuzhiyun 1208*4882a593Smuzhiyun /* 1209*4882a593Smuzhiyun * HEST subtables 1210*4882a593Smuzhiyun */ 1211*4882a593Smuzhiyun 1212*4882a593Smuzhiyun /* 0: IA32 Machine Check Exception */ 1213*4882a593Smuzhiyun 1214*4882a593Smuzhiyun struct acpi_hest_ia_machine_check { 1215*4882a593Smuzhiyun struct acpi_hest_header header; 1216*4882a593Smuzhiyun u16 reserved1; 1217*4882a593Smuzhiyun u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1218*4882a593Smuzhiyun u8 enabled; 1219*4882a593Smuzhiyun u32 records_to_preallocate; 1220*4882a593Smuzhiyun u32 max_sections_per_record; 1221*4882a593Smuzhiyun u64 global_capability_data; 1222*4882a593Smuzhiyun u64 global_control_data; 1223*4882a593Smuzhiyun u8 num_hardware_banks; 1224*4882a593Smuzhiyun u8 reserved3[7]; 1225*4882a593Smuzhiyun }; 1226*4882a593Smuzhiyun 1227*4882a593Smuzhiyun /* 1: IA32 Corrected Machine Check */ 1228*4882a593Smuzhiyun 1229*4882a593Smuzhiyun struct acpi_hest_ia_corrected { 1230*4882a593Smuzhiyun struct acpi_hest_header header; 1231*4882a593Smuzhiyun u16 reserved1; 1232*4882a593Smuzhiyun u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1233*4882a593Smuzhiyun u8 enabled; 1234*4882a593Smuzhiyun u32 records_to_preallocate; 1235*4882a593Smuzhiyun u32 max_sections_per_record; 1236*4882a593Smuzhiyun struct acpi_hest_notify notify; 1237*4882a593Smuzhiyun u8 num_hardware_banks; 1238*4882a593Smuzhiyun u8 reserved2[3]; 1239*4882a593Smuzhiyun }; 1240*4882a593Smuzhiyun 1241*4882a593Smuzhiyun /* 2: IA32 Non-Maskable Interrupt */ 1242*4882a593Smuzhiyun 1243*4882a593Smuzhiyun struct acpi_hest_ia_nmi { 1244*4882a593Smuzhiyun struct acpi_hest_header header; 1245*4882a593Smuzhiyun u32 reserved; 1246*4882a593Smuzhiyun u32 records_to_preallocate; 1247*4882a593Smuzhiyun u32 max_sections_per_record; 1248*4882a593Smuzhiyun u32 max_raw_data_length; 1249*4882a593Smuzhiyun }; 1250*4882a593Smuzhiyun 1251*4882a593Smuzhiyun /* 3,4,5: Not used */ 1252*4882a593Smuzhiyun 1253*4882a593Smuzhiyun /* 6: PCI Express Root Port AER */ 1254*4882a593Smuzhiyun 1255*4882a593Smuzhiyun struct acpi_hest_aer_root { 1256*4882a593Smuzhiyun struct acpi_hest_header header; 1257*4882a593Smuzhiyun struct acpi_hest_aer_common aer; 1258*4882a593Smuzhiyun u32 root_error_command; 1259*4882a593Smuzhiyun }; 1260*4882a593Smuzhiyun 1261*4882a593Smuzhiyun /* 7: PCI Express AER (AER Endpoint) */ 1262*4882a593Smuzhiyun 1263*4882a593Smuzhiyun struct acpi_hest_aer { 1264*4882a593Smuzhiyun struct acpi_hest_header header; 1265*4882a593Smuzhiyun struct acpi_hest_aer_common aer; 1266*4882a593Smuzhiyun }; 1267*4882a593Smuzhiyun 1268*4882a593Smuzhiyun /* 8: PCI Express/PCI-X Bridge AER */ 1269*4882a593Smuzhiyun 1270*4882a593Smuzhiyun struct acpi_hest_aer_bridge { 1271*4882a593Smuzhiyun struct acpi_hest_header header; 1272*4882a593Smuzhiyun struct acpi_hest_aer_common aer; 1273*4882a593Smuzhiyun u32 uncorrectable_mask2; 1274*4882a593Smuzhiyun u32 uncorrectable_severity2; 1275*4882a593Smuzhiyun u32 advanced_capabilities2; 1276*4882a593Smuzhiyun }; 1277*4882a593Smuzhiyun 1278*4882a593Smuzhiyun /* 9: Generic Hardware Error Source */ 1279*4882a593Smuzhiyun 1280*4882a593Smuzhiyun struct acpi_hest_generic { 1281*4882a593Smuzhiyun struct acpi_hest_header header; 1282*4882a593Smuzhiyun u16 related_source_id; 1283*4882a593Smuzhiyun u8 reserved; 1284*4882a593Smuzhiyun u8 enabled; 1285*4882a593Smuzhiyun u32 records_to_preallocate; 1286*4882a593Smuzhiyun u32 max_sections_per_record; 1287*4882a593Smuzhiyun u32 max_raw_data_length; 1288*4882a593Smuzhiyun struct acpi_generic_address error_status_address; 1289*4882a593Smuzhiyun struct acpi_hest_notify notify; 1290*4882a593Smuzhiyun u32 error_block_length; 1291*4882a593Smuzhiyun }; 1292*4882a593Smuzhiyun 1293*4882a593Smuzhiyun /* 10: Generic Hardware Error Source, version 2 */ 1294*4882a593Smuzhiyun 1295*4882a593Smuzhiyun struct acpi_hest_generic_v2 { 1296*4882a593Smuzhiyun struct acpi_hest_header header; 1297*4882a593Smuzhiyun u16 related_source_id; 1298*4882a593Smuzhiyun u8 reserved; 1299*4882a593Smuzhiyun u8 enabled; 1300*4882a593Smuzhiyun u32 records_to_preallocate; 1301*4882a593Smuzhiyun u32 max_sections_per_record; 1302*4882a593Smuzhiyun u32 max_raw_data_length; 1303*4882a593Smuzhiyun struct acpi_generic_address error_status_address; 1304*4882a593Smuzhiyun struct acpi_hest_notify notify; 1305*4882a593Smuzhiyun u32 error_block_length; 1306*4882a593Smuzhiyun struct acpi_generic_address read_ack_register; 1307*4882a593Smuzhiyun u64 read_ack_preserve; 1308*4882a593Smuzhiyun u64 read_ack_write; 1309*4882a593Smuzhiyun }; 1310*4882a593Smuzhiyun 1311*4882a593Smuzhiyun /* Generic Error Status block */ 1312*4882a593Smuzhiyun 1313*4882a593Smuzhiyun struct acpi_hest_generic_status { 1314*4882a593Smuzhiyun u32 block_status; 1315*4882a593Smuzhiyun u32 raw_data_offset; 1316*4882a593Smuzhiyun u32 raw_data_length; 1317*4882a593Smuzhiyun u32 data_length; 1318*4882a593Smuzhiyun u32 error_severity; 1319*4882a593Smuzhiyun }; 1320*4882a593Smuzhiyun 1321*4882a593Smuzhiyun /* Values for block_status flags above */ 1322*4882a593Smuzhiyun 1323*4882a593Smuzhiyun #define ACPI_HEST_UNCORRECTABLE (1) 1324*4882a593Smuzhiyun #define ACPI_HEST_CORRECTABLE (1<<1) 1325*4882a593Smuzhiyun #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 1326*4882a593Smuzhiyun #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 1327*4882a593Smuzhiyun #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 1328*4882a593Smuzhiyun 1329*4882a593Smuzhiyun /* Generic Error Data entry */ 1330*4882a593Smuzhiyun 1331*4882a593Smuzhiyun struct acpi_hest_generic_data { 1332*4882a593Smuzhiyun u8 section_type[16]; 1333*4882a593Smuzhiyun u32 error_severity; 1334*4882a593Smuzhiyun u16 revision; 1335*4882a593Smuzhiyun u8 validation_bits; 1336*4882a593Smuzhiyun u8 flags; 1337*4882a593Smuzhiyun u32 error_data_length; 1338*4882a593Smuzhiyun u8 fru_id[16]; 1339*4882a593Smuzhiyun u8 fru_text[20]; 1340*4882a593Smuzhiyun }; 1341*4882a593Smuzhiyun 1342*4882a593Smuzhiyun /* Extension for revision 0x0300 */ 1343*4882a593Smuzhiyun 1344*4882a593Smuzhiyun struct acpi_hest_generic_data_v300 { 1345*4882a593Smuzhiyun u8 section_type[16]; 1346*4882a593Smuzhiyun u32 error_severity; 1347*4882a593Smuzhiyun u16 revision; 1348*4882a593Smuzhiyun u8 validation_bits; 1349*4882a593Smuzhiyun u8 flags; 1350*4882a593Smuzhiyun u32 error_data_length; 1351*4882a593Smuzhiyun u8 fru_id[16]; 1352*4882a593Smuzhiyun u8 fru_text[20]; 1353*4882a593Smuzhiyun u64 time_stamp; 1354*4882a593Smuzhiyun }; 1355*4882a593Smuzhiyun 1356*4882a593Smuzhiyun /* Values for error_severity above */ 1357*4882a593Smuzhiyun 1358*4882a593Smuzhiyun #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 1359*4882a593Smuzhiyun #define ACPI_HEST_GEN_ERROR_FATAL 1 1360*4882a593Smuzhiyun #define ACPI_HEST_GEN_ERROR_CORRECTED 2 1361*4882a593Smuzhiyun #define ACPI_HEST_GEN_ERROR_NONE 3 1362*4882a593Smuzhiyun 1363*4882a593Smuzhiyun /* Flags for validation_bits above */ 1364*4882a593Smuzhiyun 1365*4882a593Smuzhiyun #define ACPI_HEST_GEN_VALID_FRU_ID (1) 1366*4882a593Smuzhiyun #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 1367*4882a593Smuzhiyun #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 1368*4882a593Smuzhiyun 1369*4882a593Smuzhiyun /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 1370*4882a593Smuzhiyun 1371*4882a593Smuzhiyun struct acpi_hest_ia_deferred_check { 1372*4882a593Smuzhiyun struct acpi_hest_header header; 1373*4882a593Smuzhiyun u16 reserved1; 1374*4882a593Smuzhiyun u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1375*4882a593Smuzhiyun u8 enabled; 1376*4882a593Smuzhiyun u32 records_to_preallocate; 1377*4882a593Smuzhiyun u32 max_sections_per_record; 1378*4882a593Smuzhiyun struct acpi_hest_notify notify; 1379*4882a593Smuzhiyun u8 num_hardware_banks; 1380*4882a593Smuzhiyun u8 reserved2[3]; 1381*4882a593Smuzhiyun }; 1382*4882a593Smuzhiyun 1383*4882a593Smuzhiyun /******************************************************************************* 1384*4882a593Smuzhiyun * 1385*4882a593Smuzhiyun * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.2) 1386*4882a593Smuzhiyun * Version 1 1387*4882a593Smuzhiyun * 1388*4882a593Smuzhiyun ******************************************************************************/ 1389*4882a593Smuzhiyun 1390*4882a593Smuzhiyun struct acpi_table_hmat { 1391*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 1392*4882a593Smuzhiyun u32 reserved; 1393*4882a593Smuzhiyun }; 1394*4882a593Smuzhiyun 1395*4882a593Smuzhiyun /* Values for HMAT structure types */ 1396*4882a593Smuzhiyun 1397*4882a593Smuzhiyun enum acpi_hmat_type { 1398*4882a593Smuzhiyun ACPI_HMAT_TYPE_PROXIMITY = 0, /* Memory proximity domain attributes */ 1399*4882a593Smuzhiyun ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 1400*4882a593Smuzhiyun ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 1401*4882a593Smuzhiyun ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 1402*4882a593Smuzhiyun }; 1403*4882a593Smuzhiyun 1404*4882a593Smuzhiyun struct acpi_hmat_structure { 1405*4882a593Smuzhiyun u16 type; 1406*4882a593Smuzhiyun u16 reserved; 1407*4882a593Smuzhiyun u32 length; 1408*4882a593Smuzhiyun }; 1409*4882a593Smuzhiyun 1410*4882a593Smuzhiyun /* 1411*4882a593Smuzhiyun * HMAT Structures, correspond to Type in struct acpi_hmat_structure 1412*4882a593Smuzhiyun */ 1413*4882a593Smuzhiyun 1414*4882a593Smuzhiyun /* 0: Memory proximity domain attributes */ 1415*4882a593Smuzhiyun 1416*4882a593Smuzhiyun struct acpi_hmat_proximity_domain { 1417*4882a593Smuzhiyun struct acpi_hmat_structure header; 1418*4882a593Smuzhiyun u16 flags; 1419*4882a593Smuzhiyun u16 reserved1; 1420*4882a593Smuzhiyun u32 processor_PD; /* Processor proximity domain */ 1421*4882a593Smuzhiyun u32 memory_PD; /* Memory proximity domain */ 1422*4882a593Smuzhiyun u32 reserved2; 1423*4882a593Smuzhiyun u64 reserved3; 1424*4882a593Smuzhiyun u64 reserved4; 1425*4882a593Smuzhiyun }; 1426*4882a593Smuzhiyun 1427*4882a593Smuzhiyun /* Masks for Flags field above */ 1428*4882a593Smuzhiyun 1429*4882a593Smuzhiyun #define ACPI_HMAT_PROCESSOR_PD_VALID (1) /* 1: processor_PD field is valid */ 1430*4882a593Smuzhiyun #define ACPI_HMAT_MEMORY_PD_VALID (1<<1) /* 1: memory_PD field is valid */ 1431*4882a593Smuzhiyun #define ACPI_HMAT_RESERVATION_HINT (1<<2) /* 1: Reservation hint */ 1432*4882a593Smuzhiyun 1433*4882a593Smuzhiyun /* 1: System locality latency and bandwidth information */ 1434*4882a593Smuzhiyun 1435*4882a593Smuzhiyun struct acpi_hmat_locality { 1436*4882a593Smuzhiyun struct acpi_hmat_structure header; 1437*4882a593Smuzhiyun u8 flags; 1438*4882a593Smuzhiyun u8 data_type; 1439*4882a593Smuzhiyun u16 reserved1; 1440*4882a593Smuzhiyun u32 number_of_initiator_Pds; 1441*4882a593Smuzhiyun u32 number_of_target_Pds; 1442*4882a593Smuzhiyun u32 reserved2; 1443*4882a593Smuzhiyun u64 entry_base_unit; 1444*4882a593Smuzhiyun }; 1445*4882a593Smuzhiyun 1446*4882a593Smuzhiyun /* Masks for Flags field above */ 1447*4882a593Smuzhiyun 1448*4882a593Smuzhiyun #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) 1449*4882a593Smuzhiyun 1450*4882a593Smuzhiyun /* Values for Memory Hierarchy flag */ 1451*4882a593Smuzhiyun 1452*4882a593Smuzhiyun #define ACPI_HMAT_MEMORY 0 1453*4882a593Smuzhiyun #define ACPI_HMAT_LAST_LEVEL_CACHE 1 1454*4882a593Smuzhiyun #define ACPI_HMAT_1ST_LEVEL_CACHE 2 1455*4882a593Smuzhiyun #define ACPI_HMAT_2ND_LEVEL_CACHE 3 1456*4882a593Smuzhiyun #define ACPI_HMAT_3RD_LEVEL_CACHE 4 1457*4882a593Smuzhiyun 1458*4882a593Smuzhiyun /* Values for data_type field above */ 1459*4882a593Smuzhiyun 1460*4882a593Smuzhiyun #define ACPI_HMAT_ACCESS_LATENCY 0 1461*4882a593Smuzhiyun #define ACPI_HMAT_READ_LATENCY 1 1462*4882a593Smuzhiyun #define ACPI_HMAT_WRITE_LATENCY 2 1463*4882a593Smuzhiyun #define ACPI_HMAT_ACCESS_BANDWIDTH 3 1464*4882a593Smuzhiyun #define ACPI_HMAT_READ_BANDWIDTH 4 1465*4882a593Smuzhiyun #define ACPI_HMAT_WRITE_BANDWIDTH 5 1466*4882a593Smuzhiyun 1467*4882a593Smuzhiyun /* 2: Memory side cache information */ 1468*4882a593Smuzhiyun 1469*4882a593Smuzhiyun struct acpi_hmat_cache { 1470*4882a593Smuzhiyun struct acpi_hmat_structure header; 1471*4882a593Smuzhiyun u32 memory_PD; 1472*4882a593Smuzhiyun u32 reserved1; 1473*4882a593Smuzhiyun u64 cache_size; 1474*4882a593Smuzhiyun u32 cache_attributes; 1475*4882a593Smuzhiyun u16 reserved2; 1476*4882a593Smuzhiyun u16 number_of_SMBIOShandles; 1477*4882a593Smuzhiyun }; 1478*4882a593Smuzhiyun 1479*4882a593Smuzhiyun /* Masks for cache_attributes field above */ 1480*4882a593Smuzhiyun 1481*4882a593Smuzhiyun #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 1482*4882a593Smuzhiyun #define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 1483*4882a593Smuzhiyun #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 1484*4882a593Smuzhiyun #define ACPI_HMAT_WRITE_POLICY (0x0000F000) 1485*4882a593Smuzhiyun #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 1486*4882a593Smuzhiyun 1487*4882a593Smuzhiyun /* Values for cache associativity flag */ 1488*4882a593Smuzhiyun 1489*4882a593Smuzhiyun #define ACPI_HMAT_CA_NONE (0) 1490*4882a593Smuzhiyun #define ACPI_HMAT_CA_DIRECT_MAPPED (1) 1491*4882a593Smuzhiyun #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 1492*4882a593Smuzhiyun 1493*4882a593Smuzhiyun /* Values for write policy flag */ 1494*4882a593Smuzhiyun 1495*4882a593Smuzhiyun #define ACPI_HMAT_CP_NONE (0) 1496*4882a593Smuzhiyun #define ACPI_HMAT_CP_WB (1) 1497*4882a593Smuzhiyun #define ACPI_HMAT_CP_WT (2) 1498*4882a593Smuzhiyun 1499*4882a593Smuzhiyun /******************************************************************************* 1500*4882a593Smuzhiyun * 1501*4882a593Smuzhiyun * HPET - High Precision Event Timer table 1502*4882a593Smuzhiyun * Version 1 1503*4882a593Smuzhiyun * 1504*4882a593Smuzhiyun * Conforms to "IA-PC HPET (High Precision Event Timers) Specification", 1505*4882a593Smuzhiyun * Version 1.0a, October 2004 1506*4882a593Smuzhiyun * 1507*4882a593Smuzhiyun ******************************************************************************/ 1508*4882a593Smuzhiyun 1509*4882a593Smuzhiyun struct acpi_table_hpet { 1510*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 1511*4882a593Smuzhiyun u32 id; /* Hardware ID of event timer block */ 1512*4882a593Smuzhiyun struct acpi_generic_address address; /* Address of event timer block */ 1513*4882a593Smuzhiyun u8 sequence; /* HPET sequence number */ 1514*4882a593Smuzhiyun u16 minimum_tick; /* Main counter min tick, periodic mode */ 1515*4882a593Smuzhiyun u8 flags; 1516*4882a593Smuzhiyun }; 1517*4882a593Smuzhiyun 1518*4882a593Smuzhiyun /* Masks for Flags field above */ 1519*4882a593Smuzhiyun 1520*4882a593Smuzhiyun #define ACPI_HPET_PAGE_PROTECT_MASK (3) 1521*4882a593Smuzhiyun 1522*4882a593Smuzhiyun /* Values for Page Protect flags */ 1523*4882a593Smuzhiyun 1524*4882a593Smuzhiyun enum acpi_hpet_page_protect { 1525*4882a593Smuzhiyun ACPI_HPET_NO_PAGE_PROTECT = 0, 1526*4882a593Smuzhiyun ACPI_HPET_PAGE_PROTECT4 = 1, 1527*4882a593Smuzhiyun ACPI_HPET_PAGE_PROTECT64 = 2 1528*4882a593Smuzhiyun }; 1529*4882a593Smuzhiyun 1530*4882a593Smuzhiyun /******************************************************************************* 1531*4882a593Smuzhiyun * 1532*4882a593Smuzhiyun * IBFT - Boot Firmware Table 1533*4882a593Smuzhiyun * Version 1 1534*4882a593Smuzhiyun * 1535*4882a593Smuzhiyun * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b 1536*4882a593Smuzhiyun * Specification", Version 1.01, March 1, 2007 1537*4882a593Smuzhiyun * 1538*4882a593Smuzhiyun * Note: It appears that this table is not intended to appear in the RSDT/XSDT. 1539*4882a593Smuzhiyun * Therefore, it is not currently supported by the disassembler. 1540*4882a593Smuzhiyun * 1541*4882a593Smuzhiyun ******************************************************************************/ 1542*4882a593Smuzhiyun 1543*4882a593Smuzhiyun struct acpi_table_ibft { 1544*4882a593Smuzhiyun struct acpi_table_header header; /* Common ACPI table header */ 1545*4882a593Smuzhiyun u8 reserved[12]; 1546*4882a593Smuzhiyun }; 1547*4882a593Smuzhiyun 1548*4882a593Smuzhiyun /* IBFT common subtable header */ 1549*4882a593Smuzhiyun 1550*4882a593Smuzhiyun struct acpi_ibft_header { 1551*4882a593Smuzhiyun u8 type; 1552*4882a593Smuzhiyun u8 version; 1553*4882a593Smuzhiyun u16 length; 1554*4882a593Smuzhiyun u8 index; 1555*4882a593Smuzhiyun u8 flags; 1556*4882a593Smuzhiyun }; 1557*4882a593Smuzhiyun 1558*4882a593Smuzhiyun /* Values for Type field above */ 1559*4882a593Smuzhiyun 1560*4882a593Smuzhiyun enum acpi_ibft_type { 1561*4882a593Smuzhiyun ACPI_IBFT_TYPE_NOT_USED = 0, 1562*4882a593Smuzhiyun ACPI_IBFT_TYPE_CONTROL = 1, 1563*4882a593Smuzhiyun ACPI_IBFT_TYPE_INITIATOR = 2, 1564*4882a593Smuzhiyun ACPI_IBFT_TYPE_NIC = 3, 1565*4882a593Smuzhiyun ACPI_IBFT_TYPE_TARGET = 4, 1566*4882a593Smuzhiyun ACPI_IBFT_TYPE_EXTENSIONS = 5, 1567*4882a593Smuzhiyun ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1568*4882a593Smuzhiyun }; 1569*4882a593Smuzhiyun 1570*4882a593Smuzhiyun /* IBFT subtables */ 1571*4882a593Smuzhiyun 1572*4882a593Smuzhiyun struct acpi_ibft_control { 1573*4882a593Smuzhiyun struct acpi_ibft_header header; 1574*4882a593Smuzhiyun u16 extensions; 1575*4882a593Smuzhiyun u16 initiator_offset; 1576*4882a593Smuzhiyun u16 nic0_offset; 1577*4882a593Smuzhiyun u16 target0_offset; 1578*4882a593Smuzhiyun u16 nic1_offset; 1579*4882a593Smuzhiyun u16 target1_offset; 1580*4882a593Smuzhiyun }; 1581*4882a593Smuzhiyun 1582*4882a593Smuzhiyun struct acpi_ibft_initiator { 1583*4882a593Smuzhiyun struct acpi_ibft_header header; 1584*4882a593Smuzhiyun u8 sns_server[16]; 1585*4882a593Smuzhiyun u8 slp_server[16]; 1586*4882a593Smuzhiyun u8 primary_server[16]; 1587*4882a593Smuzhiyun u8 secondary_server[16]; 1588*4882a593Smuzhiyun u16 name_length; 1589*4882a593Smuzhiyun u16 name_offset; 1590*4882a593Smuzhiyun }; 1591*4882a593Smuzhiyun 1592*4882a593Smuzhiyun struct acpi_ibft_nic { 1593*4882a593Smuzhiyun struct acpi_ibft_header header; 1594*4882a593Smuzhiyun u8 ip_address[16]; 1595*4882a593Smuzhiyun u8 subnet_mask_prefix; 1596*4882a593Smuzhiyun u8 origin; 1597*4882a593Smuzhiyun u8 gateway[16]; 1598*4882a593Smuzhiyun u8 primary_dns[16]; 1599*4882a593Smuzhiyun u8 secondary_dns[16]; 1600*4882a593Smuzhiyun u8 dhcp[16]; 1601*4882a593Smuzhiyun u16 vlan; 1602*4882a593Smuzhiyun u8 mac_address[6]; 1603*4882a593Smuzhiyun u16 pci_address; 1604*4882a593Smuzhiyun u16 name_length; 1605*4882a593Smuzhiyun u16 name_offset; 1606*4882a593Smuzhiyun }; 1607*4882a593Smuzhiyun 1608*4882a593Smuzhiyun struct acpi_ibft_target { 1609*4882a593Smuzhiyun struct acpi_ibft_header header; 1610*4882a593Smuzhiyun u8 target_ip_address[16]; 1611*4882a593Smuzhiyun u16 target_ip_socket; 1612*4882a593Smuzhiyun u8 target_boot_lun[8]; 1613*4882a593Smuzhiyun u8 chap_type; 1614*4882a593Smuzhiyun u8 nic_association; 1615*4882a593Smuzhiyun u16 target_name_length; 1616*4882a593Smuzhiyun u16 target_name_offset; 1617*4882a593Smuzhiyun u16 chap_name_length; 1618*4882a593Smuzhiyun u16 chap_name_offset; 1619*4882a593Smuzhiyun u16 chap_secret_length; 1620*4882a593Smuzhiyun u16 chap_secret_offset; 1621*4882a593Smuzhiyun u16 reverse_chap_name_length; 1622*4882a593Smuzhiyun u16 reverse_chap_name_offset; 1623*4882a593Smuzhiyun u16 reverse_chap_secret_length; 1624*4882a593Smuzhiyun u16 reverse_chap_secret_offset; 1625*4882a593Smuzhiyun }; 1626*4882a593Smuzhiyun 1627*4882a593Smuzhiyun /* Reset to default packing */ 1628*4882a593Smuzhiyun 1629*4882a593Smuzhiyun #pragma pack() 1630*4882a593Smuzhiyun 1631*4882a593Smuzhiyun #endif /* __ACTBL1_H__ */ 1632