1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2020 TOSHIBA CORPORATION
4*4882a593Smuzhiyun * Copyright (c) 2020 Toshiba Electronic Devices & Storage Corporation
5*4882a593Smuzhiyun * Copyright (c) 2020 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/clk.h>
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/of.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/watchdog.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define WDT_CNT 0x00
17*4882a593Smuzhiyun #define WDT_MIN 0x04
18*4882a593Smuzhiyun #define WDT_MAX 0x08
19*4882a593Smuzhiyun #define WDT_CTL 0x0c
20*4882a593Smuzhiyun #define WDT_CMD 0x10
21*4882a593Smuzhiyun #define WDT_CMD_CLEAR 0x4352
22*4882a593Smuzhiyun #define WDT_CMD_START_STOP 0x5354
23*4882a593Smuzhiyun #define WDT_DIV 0x30
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define VISCONTI_WDT_FREQ 2000000 /* 2MHz */
26*4882a593Smuzhiyun #define WDT_DEFAULT_TIMEOUT 10U /* in seconds */
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun static bool nowayout = WATCHDOG_NOWAYOUT;
29*4882a593Smuzhiyun module_param(nowayout, bool, 0);
30*4882a593Smuzhiyun MODULE_PARM_DESC(
31*4882a593Smuzhiyun nowayout,
32*4882a593Smuzhiyun "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT)")");
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun struct visconti_wdt_priv {
35*4882a593Smuzhiyun struct watchdog_device wdev;
36*4882a593Smuzhiyun void __iomem *base;
37*4882a593Smuzhiyun u32 div;
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
visconti_wdt_start(struct watchdog_device * wdev)40*4882a593Smuzhiyun static int visconti_wdt_start(struct watchdog_device *wdev)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun struct visconti_wdt_priv *priv = watchdog_get_drvdata(wdev);
43*4882a593Smuzhiyun u32 timeout = wdev->timeout * VISCONTI_WDT_FREQ;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun writel(priv->div, priv->base + WDT_DIV);
46*4882a593Smuzhiyun writel(0, priv->base + WDT_MIN);
47*4882a593Smuzhiyun writel(timeout, priv->base + WDT_MAX);
48*4882a593Smuzhiyun writel(0, priv->base + WDT_CTL);
49*4882a593Smuzhiyun writel(WDT_CMD_START_STOP, priv->base + WDT_CMD);
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun return 0;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
visconti_wdt_stop(struct watchdog_device * wdev)54*4882a593Smuzhiyun static int visconti_wdt_stop(struct watchdog_device *wdev)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun struct visconti_wdt_priv *priv = watchdog_get_drvdata(wdev);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun writel(1, priv->base + WDT_CTL);
59*4882a593Smuzhiyun writel(WDT_CMD_START_STOP, priv->base + WDT_CMD);
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun return 0;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
visconti_wdt_ping(struct watchdog_device * wdd)64*4882a593Smuzhiyun static int visconti_wdt_ping(struct watchdog_device *wdd)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun struct visconti_wdt_priv *priv = watchdog_get_drvdata(wdd);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun writel(WDT_CMD_CLEAR, priv->base + WDT_CMD);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun return 0;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
visconti_wdt_get_timeleft(struct watchdog_device * wdev)73*4882a593Smuzhiyun static unsigned int visconti_wdt_get_timeleft(struct watchdog_device *wdev)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun struct visconti_wdt_priv *priv = watchdog_get_drvdata(wdev);
76*4882a593Smuzhiyun u32 timeout = wdev->timeout * VISCONTI_WDT_FREQ;
77*4882a593Smuzhiyun u32 cnt = readl(priv->base + WDT_CNT);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun if (timeout <= cnt)
80*4882a593Smuzhiyun return 0;
81*4882a593Smuzhiyun timeout -= cnt;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun return timeout / VISCONTI_WDT_FREQ;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
visconti_wdt_set_timeout(struct watchdog_device * wdev,unsigned int timeout)86*4882a593Smuzhiyun static int visconti_wdt_set_timeout(struct watchdog_device *wdev, unsigned int timeout)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun u32 val;
89*4882a593Smuzhiyun struct visconti_wdt_priv *priv = watchdog_get_drvdata(wdev);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun wdev->timeout = timeout;
92*4882a593Smuzhiyun val = wdev->timeout * VISCONTI_WDT_FREQ;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /* Clear counter before setting timeout because WDT expires */
95*4882a593Smuzhiyun writel(WDT_CMD_CLEAR, priv->base + WDT_CMD);
96*4882a593Smuzhiyun writel(val, priv->base + WDT_MAX);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun return 0;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun static const struct watchdog_info visconti_wdt_info = {
102*4882a593Smuzhiyun .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
103*4882a593Smuzhiyun .identity = "Visconti Watchdog",
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun static const struct watchdog_ops visconti_wdt_ops = {
107*4882a593Smuzhiyun .owner = THIS_MODULE,
108*4882a593Smuzhiyun .start = visconti_wdt_start,
109*4882a593Smuzhiyun .stop = visconti_wdt_stop,
110*4882a593Smuzhiyun .ping = visconti_wdt_ping,
111*4882a593Smuzhiyun .get_timeleft = visconti_wdt_get_timeleft,
112*4882a593Smuzhiyun .set_timeout = visconti_wdt_set_timeout,
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
visconti_clk_disable_unprepare(void * data)115*4882a593Smuzhiyun static void visconti_clk_disable_unprepare(void *data)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun clk_disable_unprepare(data);
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
visconti_wdt_probe(struct platform_device * pdev)120*4882a593Smuzhiyun static int visconti_wdt_probe(struct platform_device *pdev)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun struct watchdog_device *wdev;
123*4882a593Smuzhiyun struct visconti_wdt_priv *priv;
124*4882a593Smuzhiyun struct device *dev = &pdev->dev;
125*4882a593Smuzhiyun struct clk *clk;
126*4882a593Smuzhiyun int ret;
127*4882a593Smuzhiyun unsigned long clk_freq;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
130*4882a593Smuzhiyun if (!priv)
131*4882a593Smuzhiyun return -ENOMEM;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun priv->base = devm_platform_ioremap_resource(pdev, 0);
134*4882a593Smuzhiyun if (IS_ERR(priv->base))
135*4882a593Smuzhiyun return PTR_ERR(priv->base);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun clk = devm_clk_get(dev, NULL);
138*4882a593Smuzhiyun if (IS_ERR(clk))
139*4882a593Smuzhiyun return dev_err_probe(dev, PTR_ERR(clk), "Could not get clock\n");
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun ret = clk_prepare_enable(clk);
142*4882a593Smuzhiyun if (ret) {
143*4882a593Smuzhiyun dev_err(dev, "Could not enable clock\n");
144*4882a593Smuzhiyun return ret;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun ret = devm_add_action_or_reset(dev, visconti_clk_disable_unprepare, clk);
148*4882a593Smuzhiyun if (ret)
149*4882a593Smuzhiyun return ret;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun clk_freq = clk_get_rate(clk);
152*4882a593Smuzhiyun if (!clk_freq)
153*4882a593Smuzhiyun return -EINVAL;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun priv->div = clk_freq / VISCONTI_WDT_FREQ;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /* Initialize struct watchdog_device. */
158*4882a593Smuzhiyun wdev = &priv->wdev;
159*4882a593Smuzhiyun wdev->info = &visconti_wdt_info;
160*4882a593Smuzhiyun wdev->ops = &visconti_wdt_ops;
161*4882a593Smuzhiyun wdev->parent = dev;
162*4882a593Smuzhiyun wdev->min_timeout = 1;
163*4882a593Smuzhiyun wdev->max_timeout = 0xffffffff / VISCONTI_WDT_FREQ;
164*4882a593Smuzhiyun wdev->timeout = min(wdev->max_timeout, WDT_DEFAULT_TIMEOUT);
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun watchdog_set_drvdata(wdev, priv);
167*4882a593Smuzhiyun watchdog_set_nowayout(wdev, nowayout);
168*4882a593Smuzhiyun watchdog_stop_on_unregister(wdev);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun /* This overrides the default timeout only if DT configuration was found */
171*4882a593Smuzhiyun ret = watchdog_init_timeout(wdev, 0, dev);
172*4882a593Smuzhiyun if (ret)
173*4882a593Smuzhiyun dev_warn(dev, "Specified timeout value invalid, using default\n");
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun return devm_watchdog_register_device(dev, wdev);
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun static const struct of_device_id visconti_wdt_of_match[] = {
179*4882a593Smuzhiyun { .compatible = "toshiba,visconti-wdt", },
180*4882a593Smuzhiyun {}
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, visconti_wdt_of_match);
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun static struct platform_driver visconti_wdt_driver = {
185*4882a593Smuzhiyun .driver = {
186*4882a593Smuzhiyun .name = "visconti_wdt",
187*4882a593Smuzhiyun .of_match_table = visconti_wdt_of_match,
188*4882a593Smuzhiyun },
189*4882a593Smuzhiyun .probe = visconti_wdt_probe,
190*4882a593Smuzhiyun };
191*4882a593Smuzhiyun module_platform_driver(visconti_wdt_driver);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun MODULE_DESCRIPTION("TOSHIBA Visconti Watchdog Driver");
194*4882a593Smuzhiyun MODULE_AUTHOR("Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp");
195*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
196