1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) ST-Ericsson SA 2011-2013
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: Mathieu Poirier <mathieu.poirier@linaro.org> for ST-Ericsson
6*4882a593Smuzhiyun * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/moduleparam.h>
14*4882a593Smuzhiyun #include <linux/err.h>
15*4882a593Smuzhiyun #include <linux/uaccess.h>
16*4882a593Smuzhiyun #include <linux/watchdog.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun #include <linux/platform_data/ux500_wdt.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <linux/mfd/dbx500-prcmu.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define WATCHDOG_TIMEOUT 600 /* 10 minutes */
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define WATCHDOG_MIN 0
25*4882a593Smuzhiyun #define WATCHDOG_MAX28 268435 /* 28 bit resolution in ms == 268435.455 s */
26*4882a593Smuzhiyun #define WATCHDOG_MAX32 4294967 /* 32 bit resolution in ms == 4294967.295 s */
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun static unsigned int timeout = WATCHDOG_TIMEOUT;
29*4882a593Smuzhiyun module_param(timeout, uint, 0);
30*4882a593Smuzhiyun MODULE_PARM_DESC(timeout,
31*4882a593Smuzhiyun "Watchdog timeout in seconds. default="
32*4882a593Smuzhiyun __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun static bool nowayout = WATCHDOG_NOWAYOUT;
35*4882a593Smuzhiyun module_param(nowayout, bool, 0);
36*4882a593Smuzhiyun MODULE_PARM_DESC(nowayout,
37*4882a593Smuzhiyun "Watchdog cannot be stopped once started (default="
38*4882a593Smuzhiyun __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
39*4882a593Smuzhiyun
ux500_wdt_start(struct watchdog_device * wdd)40*4882a593Smuzhiyun static int ux500_wdt_start(struct watchdog_device *wdd)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun return prcmu_enable_a9wdog(PRCMU_WDOG_ALL);
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
ux500_wdt_stop(struct watchdog_device * wdd)45*4882a593Smuzhiyun static int ux500_wdt_stop(struct watchdog_device *wdd)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun return prcmu_disable_a9wdog(PRCMU_WDOG_ALL);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
ux500_wdt_keepalive(struct watchdog_device * wdd)50*4882a593Smuzhiyun static int ux500_wdt_keepalive(struct watchdog_device *wdd)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun return prcmu_kick_a9wdog(PRCMU_WDOG_ALL);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
ux500_wdt_set_timeout(struct watchdog_device * wdd,unsigned int timeout)55*4882a593Smuzhiyun static int ux500_wdt_set_timeout(struct watchdog_device *wdd,
56*4882a593Smuzhiyun unsigned int timeout)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun ux500_wdt_stop(wdd);
59*4882a593Smuzhiyun prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
60*4882a593Smuzhiyun ux500_wdt_start(wdd);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun return 0;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static const struct watchdog_info ux500_wdt_info = {
66*4882a593Smuzhiyun .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
67*4882a593Smuzhiyun .identity = "Ux500 WDT",
68*4882a593Smuzhiyun .firmware_version = 1,
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun static const struct watchdog_ops ux500_wdt_ops = {
72*4882a593Smuzhiyun .owner = THIS_MODULE,
73*4882a593Smuzhiyun .start = ux500_wdt_start,
74*4882a593Smuzhiyun .stop = ux500_wdt_stop,
75*4882a593Smuzhiyun .ping = ux500_wdt_keepalive,
76*4882a593Smuzhiyun .set_timeout = ux500_wdt_set_timeout,
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun static struct watchdog_device ux500_wdt = {
80*4882a593Smuzhiyun .info = &ux500_wdt_info,
81*4882a593Smuzhiyun .ops = &ux500_wdt_ops,
82*4882a593Smuzhiyun .min_timeout = WATCHDOG_MIN,
83*4882a593Smuzhiyun .max_timeout = WATCHDOG_MAX32,
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun
ux500_wdt_probe(struct platform_device * pdev)86*4882a593Smuzhiyun static int ux500_wdt_probe(struct platform_device *pdev)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun struct device *dev = &pdev->dev;
89*4882a593Smuzhiyun int ret;
90*4882a593Smuzhiyun struct ux500_wdt_data *pdata = dev_get_platdata(dev);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun if (pdata) {
93*4882a593Smuzhiyun if (pdata->timeout > 0)
94*4882a593Smuzhiyun timeout = pdata->timeout;
95*4882a593Smuzhiyun if (pdata->has_28_bits_resolution)
96*4882a593Smuzhiyun ux500_wdt.max_timeout = WATCHDOG_MAX28;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun ux500_wdt.parent = dev;
100*4882a593Smuzhiyun watchdog_set_nowayout(&ux500_wdt, nowayout);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun /* disable auto off on sleep */
103*4882a593Smuzhiyun prcmu_config_a9wdog(PRCMU_WDOG_CPU1, false);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /* set HW initial value */
106*4882a593Smuzhiyun prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun ret = devm_watchdog_register_device(dev, &ux500_wdt);
109*4882a593Smuzhiyun if (ret)
110*4882a593Smuzhiyun return ret;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun dev_info(dev, "initialized\n");
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun #ifdef CONFIG_PM
ux500_wdt_suspend(struct platform_device * pdev,pm_message_t state)118*4882a593Smuzhiyun static int ux500_wdt_suspend(struct platform_device *pdev,
119*4882a593Smuzhiyun pm_message_t state)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun if (watchdog_active(&ux500_wdt)) {
122*4882a593Smuzhiyun ux500_wdt_stop(&ux500_wdt);
123*4882a593Smuzhiyun prcmu_config_a9wdog(PRCMU_WDOG_CPU1, true);
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
126*4882a593Smuzhiyun ux500_wdt_start(&ux500_wdt);
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun return 0;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
ux500_wdt_resume(struct platform_device * pdev)131*4882a593Smuzhiyun static int ux500_wdt_resume(struct platform_device *pdev)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun if (watchdog_active(&ux500_wdt)) {
134*4882a593Smuzhiyun ux500_wdt_stop(&ux500_wdt);
135*4882a593Smuzhiyun prcmu_config_a9wdog(PRCMU_WDOG_CPU1, false);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
138*4882a593Smuzhiyun ux500_wdt_start(&ux500_wdt);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun return 0;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun #else
143*4882a593Smuzhiyun #define ux500_wdt_suspend NULL
144*4882a593Smuzhiyun #define ux500_wdt_resume NULL
145*4882a593Smuzhiyun #endif
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun static struct platform_driver ux500_wdt_driver = {
148*4882a593Smuzhiyun .probe = ux500_wdt_probe,
149*4882a593Smuzhiyun .suspend = ux500_wdt_suspend,
150*4882a593Smuzhiyun .resume = ux500_wdt_resume,
151*4882a593Smuzhiyun .driver = {
152*4882a593Smuzhiyun .name = "ux500_wdt",
153*4882a593Smuzhiyun },
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun module_platform_driver(ux500_wdt_driver);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun MODULE_AUTHOR("Jonas Aaberg <jonas.aberg@stericsson.com>");
159*4882a593Smuzhiyun MODULE_DESCRIPTION("Ux500 Watchdog Driver");
160*4882a593Smuzhiyun MODULE_LICENSE("GPL");
161*4882a593Smuzhiyun MODULE_ALIAS("platform:ux500_wdt");
162