1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * txx9wdt: A Hardware Watchdog Driver for TXx9 SoCs
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2007 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/moduleparam.h>
12*4882a593Smuzhiyun #include <linux/types.h>
13*4882a593Smuzhiyun #include <linux/watchdog.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/clk.h>
17*4882a593Smuzhiyun #include <linux/err.h>
18*4882a593Smuzhiyun #include <linux/io.h>
19*4882a593Smuzhiyun #include <asm/txx9tmr.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define WD_TIMER_CCD 7 /* 1/256 */
22*4882a593Smuzhiyun #define WD_TIMER_CLK (clk_get_rate(txx9_imclk) / (2 << WD_TIMER_CCD))
23*4882a593Smuzhiyun #define WD_MAX_TIMEOUT ((0xffffffff >> (32 - TXX9_TIMER_BITS)) / WD_TIMER_CLK)
24*4882a593Smuzhiyun #define TIMER_MARGIN 60 /* Default is 60 seconds */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun static unsigned int timeout = TIMER_MARGIN; /* in seconds */
27*4882a593Smuzhiyun module_param(timeout, uint, 0);
28*4882a593Smuzhiyun MODULE_PARM_DESC(timeout,
29*4882a593Smuzhiyun "Watchdog timeout in seconds. "
30*4882a593Smuzhiyun "(0<timeout<((2^" __MODULE_STRING(TXX9_TIMER_BITS) ")/(IMCLK/256)), "
31*4882a593Smuzhiyun "default=" __MODULE_STRING(TIMER_MARGIN) ")");
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static bool nowayout = WATCHDOG_NOWAYOUT;
34*4882a593Smuzhiyun module_param(nowayout, bool, 0);
35*4882a593Smuzhiyun MODULE_PARM_DESC(nowayout,
36*4882a593Smuzhiyun "Watchdog cannot be stopped once started "
37*4882a593Smuzhiyun "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static struct txx9_tmr_reg __iomem *txx9wdt_reg;
40*4882a593Smuzhiyun static struct clk *txx9_imclk;
41*4882a593Smuzhiyun static DEFINE_SPINLOCK(txx9_lock);
42*4882a593Smuzhiyun
txx9wdt_ping(struct watchdog_device * wdt_dev)43*4882a593Smuzhiyun static int txx9wdt_ping(struct watchdog_device *wdt_dev)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun spin_lock(&txx9_lock);
46*4882a593Smuzhiyun __raw_writel(TXx9_TMWTMR_TWIE | TXx9_TMWTMR_TWC, &txx9wdt_reg->wtmr);
47*4882a593Smuzhiyun spin_unlock(&txx9_lock);
48*4882a593Smuzhiyun return 0;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
txx9wdt_start(struct watchdog_device * wdt_dev)51*4882a593Smuzhiyun static int txx9wdt_start(struct watchdog_device *wdt_dev)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun spin_lock(&txx9_lock);
54*4882a593Smuzhiyun __raw_writel(WD_TIMER_CLK * wdt_dev->timeout, &txx9wdt_reg->cpra);
55*4882a593Smuzhiyun __raw_writel(WD_TIMER_CCD, &txx9wdt_reg->ccdr);
56*4882a593Smuzhiyun __raw_writel(0, &txx9wdt_reg->tisr); /* clear pending interrupt */
57*4882a593Smuzhiyun __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
58*4882a593Smuzhiyun &txx9wdt_reg->tcr);
59*4882a593Smuzhiyun __raw_writel(TXx9_TMWTMR_TWIE | TXx9_TMWTMR_TWC, &txx9wdt_reg->wtmr);
60*4882a593Smuzhiyun spin_unlock(&txx9_lock);
61*4882a593Smuzhiyun return 0;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
txx9wdt_stop(struct watchdog_device * wdt_dev)64*4882a593Smuzhiyun static int txx9wdt_stop(struct watchdog_device *wdt_dev)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun spin_lock(&txx9_lock);
67*4882a593Smuzhiyun __raw_writel(TXx9_TMWTMR_WDIS, &txx9wdt_reg->wtmr);
68*4882a593Smuzhiyun __raw_writel(__raw_readl(&txx9wdt_reg->tcr) & ~TXx9_TMTCR_TCE,
69*4882a593Smuzhiyun &txx9wdt_reg->tcr);
70*4882a593Smuzhiyun spin_unlock(&txx9_lock);
71*4882a593Smuzhiyun return 0;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
txx9wdt_set_timeout(struct watchdog_device * wdt_dev,unsigned int new_timeout)74*4882a593Smuzhiyun static int txx9wdt_set_timeout(struct watchdog_device *wdt_dev,
75*4882a593Smuzhiyun unsigned int new_timeout)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun wdt_dev->timeout = new_timeout;
78*4882a593Smuzhiyun txx9wdt_stop(wdt_dev);
79*4882a593Smuzhiyun txx9wdt_start(wdt_dev);
80*4882a593Smuzhiyun return 0;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun static const struct watchdog_info txx9wdt_info = {
84*4882a593Smuzhiyun .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
85*4882a593Smuzhiyun .identity = "Hardware Watchdog for TXx9",
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun static const struct watchdog_ops txx9wdt_ops = {
89*4882a593Smuzhiyun .owner = THIS_MODULE,
90*4882a593Smuzhiyun .start = txx9wdt_start,
91*4882a593Smuzhiyun .stop = txx9wdt_stop,
92*4882a593Smuzhiyun .ping = txx9wdt_ping,
93*4882a593Smuzhiyun .set_timeout = txx9wdt_set_timeout,
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun static struct watchdog_device txx9wdt = {
97*4882a593Smuzhiyun .info = &txx9wdt_info,
98*4882a593Smuzhiyun .ops = &txx9wdt_ops,
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun
txx9wdt_probe(struct platform_device * dev)101*4882a593Smuzhiyun static int __init txx9wdt_probe(struct platform_device *dev)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun int ret;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun txx9_imclk = clk_get(NULL, "imbus_clk");
106*4882a593Smuzhiyun if (IS_ERR(txx9_imclk)) {
107*4882a593Smuzhiyun ret = PTR_ERR(txx9_imclk);
108*4882a593Smuzhiyun txx9_imclk = NULL;
109*4882a593Smuzhiyun goto exit;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun ret = clk_prepare_enable(txx9_imclk);
112*4882a593Smuzhiyun if (ret) {
113*4882a593Smuzhiyun clk_put(txx9_imclk);
114*4882a593Smuzhiyun txx9_imclk = NULL;
115*4882a593Smuzhiyun goto exit;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun txx9wdt_reg = devm_platform_ioremap_resource(dev, 0);
119*4882a593Smuzhiyun if (IS_ERR(txx9wdt_reg)) {
120*4882a593Smuzhiyun ret = PTR_ERR(txx9wdt_reg);
121*4882a593Smuzhiyun goto exit;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun if (timeout < 1 || timeout > WD_MAX_TIMEOUT)
125*4882a593Smuzhiyun timeout = TIMER_MARGIN;
126*4882a593Smuzhiyun txx9wdt.timeout = timeout;
127*4882a593Smuzhiyun txx9wdt.min_timeout = 1;
128*4882a593Smuzhiyun txx9wdt.max_timeout = WD_MAX_TIMEOUT;
129*4882a593Smuzhiyun txx9wdt.parent = &dev->dev;
130*4882a593Smuzhiyun watchdog_set_nowayout(&txx9wdt, nowayout);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun ret = watchdog_register_device(&txx9wdt);
133*4882a593Smuzhiyun if (ret)
134*4882a593Smuzhiyun goto exit;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun pr_info("Hardware Watchdog Timer: timeout=%d sec (max %ld) (nowayout= %d)\n",
137*4882a593Smuzhiyun timeout, WD_MAX_TIMEOUT, nowayout);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return 0;
140*4882a593Smuzhiyun exit:
141*4882a593Smuzhiyun if (txx9_imclk) {
142*4882a593Smuzhiyun clk_disable_unprepare(txx9_imclk);
143*4882a593Smuzhiyun clk_put(txx9_imclk);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun return ret;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
txx9wdt_remove(struct platform_device * dev)148*4882a593Smuzhiyun static int __exit txx9wdt_remove(struct platform_device *dev)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun watchdog_unregister_device(&txx9wdt);
151*4882a593Smuzhiyun clk_disable_unprepare(txx9_imclk);
152*4882a593Smuzhiyun clk_put(txx9_imclk);
153*4882a593Smuzhiyun return 0;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
txx9wdt_shutdown(struct platform_device * dev)156*4882a593Smuzhiyun static void txx9wdt_shutdown(struct platform_device *dev)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun txx9wdt_stop(&txx9wdt);
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun static struct platform_driver txx9wdt_driver = {
162*4882a593Smuzhiyun .remove = __exit_p(txx9wdt_remove),
163*4882a593Smuzhiyun .shutdown = txx9wdt_shutdown,
164*4882a593Smuzhiyun .driver = {
165*4882a593Smuzhiyun .name = "txx9wdt",
166*4882a593Smuzhiyun },
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun module_platform_driver_probe(txx9wdt_driver, txx9wdt_probe);
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun MODULE_DESCRIPTION("TXx9 Watchdog Driver");
172*4882a593Smuzhiyun MODULE_LICENSE("GPL");
173*4882a593Smuzhiyun MODULE_ALIAS("platform:txx9wdt");
174