xref: /OK3568_Linux_fs/kernel/drivers/watchdog/stpmic1_wdt.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun // Copyright (C) STMicroelectronics 2018
3*4882a593Smuzhiyun // Author: Pascal Paillet <p.paillet@st.com> for STMicroelectronics.
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun #include <linux/kernel.h>
6*4882a593Smuzhiyun #include <linux/mfd/stpmic1.h>
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/regmap.h>
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/watchdog.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /* WATCHDOG CONTROL REGISTER bit */
15*4882a593Smuzhiyun #define WDT_START		BIT(0)
16*4882a593Smuzhiyun #define WDT_PING		BIT(1)
17*4882a593Smuzhiyun #define WDT_START_MASK		BIT(0)
18*4882a593Smuzhiyun #define WDT_PING_MASK		BIT(1)
19*4882a593Smuzhiyun #define WDT_STOP		0
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define PMIC_WDT_MIN_TIMEOUT 1
22*4882a593Smuzhiyun #define PMIC_WDT_MAX_TIMEOUT 256
23*4882a593Smuzhiyun #define PMIC_WDT_DEFAULT_TIMEOUT 30
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun static bool nowayout = WATCHDOG_NOWAYOUT;
26*4882a593Smuzhiyun module_param(nowayout, bool, 0);
27*4882a593Smuzhiyun MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
28*4882a593Smuzhiyun 		 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun struct stpmic1_wdt {
31*4882a593Smuzhiyun 	struct stpmic1 *pmic;
32*4882a593Smuzhiyun 	struct watchdog_device wdtdev;
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun 
pmic_wdt_start(struct watchdog_device * wdd)35*4882a593Smuzhiyun static int pmic_wdt_start(struct watchdog_device *wdd)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	struct stpmic1_wdt *wdt = watchdog_get_drvdata(wdd);
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	return regmap_update_bits(wdt->pmic->regmap,
40*4882a593Smuzhiyun 				  WCHDG_CR, WDT_START_MASK, WDT_START);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun 
pmic_wdt_stop(struct watchdog_device * wdd)43*4882a593Smuzhiyun static int pmic_wdt_stop(struct watchdog_device *wdd)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	struct stpmic1_wdt *wdt = watchdog_get_drvdata(wdd);
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	return regmap_update_bits(wdt->pmic->regmap,
48*4882a593Smuzhiyun 				  WCHDG_CR, WDT_START_MASK, WDT_STOP);
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun 
pmic_wdt_ping(struct watchdog_device * wdd)51*4882a593Smuzhiyun static int pmic_wdt_ping(struct watchdog_device *wdd)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	struct stpmic1_wdt *wdt = watchdog_get_drvdata(wdd);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	return regmap_update_bits(wdt->pmic->regmap,
56*4882a593Smuzhiyun 				  WCHDG_CR, WDT_PING_MASK, WDT_PING);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
pmic_wdt_set_timeout(struct watchdog_device * wdd,unsigned int timeout)59*4882a593Smuzhiyun static int pmic_wdt_set_timeout(struct watchdog_device *wdd,
60*4882a593Smuzhiyun 				unsigned int timeout)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	struct stpmic1_wdt *wdt = watchdog_get_drvdata(wdd);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	wdd->timeout = timeout;
65*4882a593Smuzhiyun 	/* timeout is equal to register value + 1 */
66*4882a593Smuzhiyun 	return regmap_write(wdt->pmic->regmap, WCHDG_TIMER_CR, timeout - 1);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun static const struct watchdog_info pmic_watchdog_info = {
70*4882a593Smuzhiyun 	.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
71*4882a593Smuzhiyun 	.identity = "STPMIC1 PMIC Watchdog",
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun static const struct watchdog_ops pmic_watchdog_ops = {
75*4882a593Smuzhiyun 	.owner = THIS_MODULE,
76*4882a593Smuzhiyun 	.start = pmic_wdt_start,
77*4882a593Smuzhiyun 	.stop = pmic_wdt_stop,
78*4882a593Smuzhiyun 	.ping = pmic_wdt_ping,
79*4882a593Smuzhiyun 	.set_timeout = pmic_wdt_set_timeout,
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun 
pmic_wdt_probe(struct platform_device * pdev)82*4882a593Smuzhiyun static int pmic_wdt_probe(struct platform_device *pdev)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
85*4882a593Smuzhiyun 	int ret;
86*4882a593Smuzhiyun 	struct stpmic1 *pmic;
87*4882a593Smuzhiyun 	struct stpmic1_wdt *wdt;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	if (!dev->parent)
90*4882a593Smuzhiyun 		return -EINVAL;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	pmic = dev_get_drvdata(dev->parent);
93*4882a593Smuzhiyun 	if (!pmic)
94*4882a593Smuzhiyun 		return -EINVAL;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	wdt = devm_kzalloc(dev, sizeof(struct stpmic1_wdt), GFP_KERNEL);
97*4882a593Smuzhiyun 	if (!wdt)
98*4882a593Smuzhiyun 		return -ENOMEM;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	wdt->pmic = pmic;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	wdt->wdtdev.info = &pmic_watchdog_info;
103*4882a593Smuzhiyun 	wdt->wdtdev.ops = &pmic_watchdog_ops;
104*4882a593Smuzhiyun 	wdt->wdtdev.min_timeout = PMIC_WDT_MIN_TIMEOUT;
105*4882a593Smuzhiyun 	wdt->wdtdev.max_timeout = PMIC_WDT_MAX_TIMEOUT;
106*4882a593Smuzhiyun 	wdt->wdtdev.parent = dev;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	wdt->wdtdev.timeout = PMIC_WDT_DEFAULT_TIMEOUT;
109*4882a593Smuzhiyun 	watchdog_init_timeout(&wdt->wdtdev, 0, dev);
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	watchdog_set_nowayout(&wdt->wdtdev, nowayout);
112*4882a593Smuzhiyun 	watchdog_set_drvdata(&wdt->wdtdev, wdt);
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	ret = devm_watchdog_register_device(dev, &wdt->wdtdev);
115*4882a593Smuzhiyun 	if (ret)
116*4882a593Smuzhiyun 		return ret;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	dev_dbg(wdt->pmic->dev, "PMIC Watchdog driver probed\n");
119*4882a593Smuzhiyun 	return 0;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun static const struct of_device_id of_pmic_wdt_match[] = {
123*4882a593Smuzhiyun 	{ .compatible = "st,stpmic1-wdt" },
124*4882a593Smuzhiyun 	{ },
125*4882a593Smuzhiyun };
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, of_pmic_wdt_match);
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun static struct platform_driver stpmic1_wdt_driver = {
130*4882a593Smuzhiyun 	.probe = pmic_wdt_probe,
131*4882a593Smuzhiyun 	.driver = {
132*4882a593Smuzhiyun 		.name = "stpmic1-wdt",
133*4882a593Smuzhiyun 		.of_match_table = of_pmic_wdt_match,
134*4882a593Smuzhiyun 	},
135*4882a593Smuzhiyun };
136*4882a593Smuzhiyun module_platform_driver(stpmic1_wdt_driver);
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun MODULE_DESCRIPTION("Watchdog driver for STPMIC1 device");
139*4882a593Smuzhiyun MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>");
140*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
141