xref: /OK3568_Linux_fs/kernel/drivers/watchdog/st_lpc_wdt.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * ST's LPC Watchdog
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2014 STMicroelectronics -- All Rights Reserved
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: David Paris <david.paris@st.com> for STMicroelectronics
8*4882a593Smuzhiyun  *         Lee Jones <lee.jones@linaro.org> for STMicroelectronics
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/clk.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/of.h>
18*4882a593Smuzhiyun #include <linux/of_platform.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/regmap.h>
21*4882a593Smuzhiyun #include <linux/watchdog.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include <dt-bindings/mfd/st-lpc.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /* Low Power Alarm */
26*4882a593Smuzhiyun #define LPC_LPA_LSB_OFF			0x410
27*4882a593Smuzhiyun #define LPC_LPA_START_OFF		0x418
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /* LPC as WDT */
30*4882a593Smuzhiyun #define LPC_WDT_OFF			0x510
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun static struct watchdog_device st_wdog_dev;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun struct st_wdog_syscfg {
35*4882a593Smuzhiyun 	unsigned int reset_type_reg;
36*4882a593Smuzhiyun 	unsigned int reset_type_mask;
37*4882a593Smuzhiyun 	unsigned int enable_reg;
38*4882a593Smuzhiyun 	unsigned int enable_mask;
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun struct st_wdog {
42*4882a593Smuzhiyun 	void __iomem *base;
43*4882a593Smuzhiyun 	struct device *dev;
44*4882a593Smuzhiyun 	struct regmap *regmap;
45*4882a593Smuzhiyun 	struct st_wdog_syscfg *syscfg;
46*4882a593Smuzhiyun 	struct clk *clk;
47*4882a593Smuzhiyun 	unsigned long clkrate;
48*4882a593Smuzhiyun 	bool warm_reset;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun static struct st_wdog_syscfg stih407_syscfg = {
52*4882a593Smuzhiyun 	.enable_reg		= 0x204,
53*4882a593Smuzhiyun 	.enable_mask		= BIT(19),
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun static const struct of_device_id st_wdog_match[] = {
57*4882a593Smuzhiyun 	{
58*4882a593Smuzhiyun 		.compatible = "st,stih407-lpc",
59*4882a593Smuzhiyun 		.data = &stih407_syscfg,
60*4882a593Smuzhiyun 	},
61*4882a593Smuzhiyun 	{},
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, st_wdog_match);
64*4882a593Smuzhiyun 
st_wdog_setup(struct st_wdog * st_wdog,bool enable)65*4882a593Smuzhiyun static void st_wdog_setup(struct st_wdog *st_wdog, bool enable)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	/* Type of watchdog reset - 0: Cold 1: Warm */
68*4882a593Smuzhiyun 	if (st_wdog->syscfg->reset_type_reg)
69*4882a593Smuzhiyun 		regmap_update_bits(st_wdog->regmap,
70*4882a593Smuzhiyun 				   st_wdog->syscfg->reset_type_reg,
71*4882a593Smuzhiyun 				   st_wdog->syscfg->reset_type_mask,
72*4882a593Smuzhiyun 				   st_wdog->warm_reset);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	/* Mask/unmask watchdog reset */
75*4882a593Smuzhiyun 	regmap_update_bits(st_wdog->regmap,
76*4882a593Smuzhiyun 			   st_wdog->syscfg->enable_reg,
77*4882a593Smuzhiyun 			   st_wdog->syscfg->enable_mask,
78*4882a593Smuzhiyun 			   enable ? 0 : st_wdog->syscfg->enable_mask);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
st_wdog_load_timer(struct st_wdog * st_wdog,unsigned int timeout)81*4882a593Smuzhiyun static void st_wdog_load_timer(struct st_wdog *st_wdog, unsigned int timeout)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	unsigned long clkrate = st_wdog->clkrate;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	writel_relaxed(timeout * clkrate, st_wdog->base + LPC_LPA_LSB_OFF);
86*4882a593Smuzhiyun 	writel_relaxed(1, st_wdog->base + LPC_LPA_START_OFF);
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
st_wdog_start(struct watchdog_device * wdd)89*4882a593Smuzhiyun static int st_wdog_start(struct watchdog_device *wdd)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	writel_relaxed(1, st_wdog->base + LPC_WDT_OFF);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
st_wdog_stop(struct watchdog_device * wdd)98*4882a593Smuzhiyun static int st_wdog_stop(struct watchdog_device *wdd)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	writel_relaxed(0, st_wdog->base + LPC_WDT_OFF);
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	return 0;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun 
st_wdog_set_timeout(struct watchdog_device * wdd,unsigned int timeout)107*4882a593Smuzhiyun static int st_wdog_set_timeout(struct watchdog_device *wdd,
108*4882a593Smuzhiyun 			       unsigned int timeout)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun 	struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	wdd->timeout = timeout;
113*4882a593Smuzhiyun 	st_wdog_load_timer(st_wdog, timeout);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	return 0;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
st_wdog_keepalive(struct watchdog_device * wdd)118*4882a593Smuzhiyun static int st_wdog_keepalive(struct watchdog_device *wdd)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun 	struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	st_wdog_load_timer(st_wdog, wdd->timeout);
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	return 0;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun static const struct watchdog_info st_wdog_info = {
128*4882a593Smuzhiyun 	.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
129*4882a593Smuzhiyun 	.identity = "ST LPC WDT",
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun static const struct watchdog_ops st_wdog_ops = {
133*4882a593Smuzhiyun 	.owner		= THIS_MODULE,
134*4882a593Smuzhiyun 	.start		= st_wdog_start,
135*4882a593Smuzhiyun 	.stop		= st_wdog_stop,
136*4882a593Smuzhiyun 	.ping		= st_wdog_keepalive,
137*4882a593Smuzhiyun 	.set_timeout	= st_wdog_set_timeout,
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun static struct watchdog_device st_wdog_dev = {
141*4882a593Smuzhiyun 	.info		= &st_wdog_info,
142*4882a593Smuzhiyun 	.ops		= &st_wdog_ops,
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun 
st_clk_disable_unprepare(void * data)145*4882a593Smuzhiyun static void st_clk_disable_unprepare(void *data)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	clk_disable_unprepare(data);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun 
st_wdog_probe(struct platform_device * pdev)150*4882a593Smuzhiyun static int st_wdog_probe(struct platform_device *pdev)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
153*4882a593Smuzhiyun 	const struct of_device_id *match;
154*4882a593Smuzhiyun 	struct device_node *np = dev->of_node;
155*4882a593Smuzhiyun 	struct st_wdog *st_wdog;
156*4882a593Smuzhiyun 	struct regmap *regmap;
157*4882a593Smuzhiyun 	struct clk *clk;
158*4882a593Smuzhiyun 	void __iomem *base;
159*4882a593Smuzhiyun 	uint32_t mode;
160*4882a593Smuzhiyun 	int ret;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	ret = of_property_read_u32(np, "st,lpc-mode", &mode);
163*4882a593Smuzhiyun 	if (ret) {
164*4882a593Smuzhiyun 		dev_err(dev, "An LPC mode must be provided\n");
165*4882a593Smuzhiyun 		return -EINVAL;
166*4882a593Smuzhiyun 	}
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	/* LPC can either run as a Clocksource or in RTC or WDT mode */
169*4882a593Smuzhiyun 	if (mode != ST_LPC_MODE_WDT)
170*4882a593Smuzhiyun 		return -ENODEV;
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	st_wdog = devm_kzalloc(dev, sizeof(*st_wdog), GFP_KERNEL);
173*4882a593Smuzhiyun 	if (!st_wdog)
174*4882a593Smuzhiyun 		return -ENOMEM;
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	match = of_match_device(st_wdog_match, dev);
177*4882a593Smuzhiyun 	if (!match) {
178*4882a593Smuzhiyun 		dev_err(dev, "Couldn't match device\n");
179*4882a593Smuzhiyun 		return -ENODEV;
180*4882a593Smuzhiyun 	}
181*4882a593Smuzhiyun 	st_wdog->syscfg	= (struct st_wdog_syscfg *)match->data;
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	base = devm_platform_ioremap_resource(pdev, 0);
184*4882a593Smuzhiyun 	if (IS_ERR(base))
185*4882a593Smuzhiyun 		return PTR_ERR(base);
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
188*4882a593Smuzhiyun 	if (IS_ERR(regmap)) {
189*4882a593Smuzhiyun 		dev_err(dev, "No syscfg phandle specified\n");
190*4882a593Smuzhiyun 		return PTR_ERR(regmap);
191*4882a593Smuzhiyun 	}
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	clk = devm_clk_get(dev, NULL);
194*4882a593Smuzhiyun 	if (IS_ERR(clk)) {
195*4882a593Smuzhiyun 		dev_err(dev, "Unable to request clock\n");
196*4882a593Smuzhiyun 		return PTR_ERR(clk);
197*4882a593Smuzhiyun 	}
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	st_wdog->dev		= dev;
200*4882a593Smuzhiyun 	st_wdog->base		= base;
201*4882a593Smuzhiyun 	st_wdog->clk		= clk;
202*4882a593Smuzhiyun 	st_wdog->regmap		= regmap;
203*4882a593Smuzhiyun 	st_wdog->warm_reset	= of_property_read_bool(np, "st,warm_reset");
204*4882a593Smuzhiyun 	st_wdog->clkrate	= clk_get_rate(st_wdog->clk);
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	if (!st_wdog->clkrate) {
207*4882a593Smuzhiyun 		dev_err(dev, "Unable to fetch clock rate\n");
208*4882a593Smuzhiyun 		return -EINVAL;
209*4882a593Smuzhiyun 	}
210*4882a593Smuzhiyun 	st_wdog_dev.max_timeout = 0xFFFFFFFF / st_wdog->clkrate;
211*4882a593Smuzhiyun 	st_wdog_dev.parent = dev;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	ret = clk_prepare_enable(clk);
214*4882a593Smuzhiyun 	if (ret) {
215*4882a593Smuzhiyun 		dev_err(dev, "Unable to enable clock\n");
216*4882a593Smuzhiyun 		return ret;
217*4882a593Smuzhiyun 	}
218*4882a593Smuzhiyun 	ret = devm_add_action_or_reset(dev, st_clk_disable_unprepare, clk);
219*4882a593Smuzhiyun 	if (ret)
220*4882a593Smuzhiyun 		return ret;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	watchdog_set_drvdata(&st_wdog_dev, st_wdog);
223*4882a593Smuzhiyun 	watchdog_set_nowayout(&st_wdog_dev, WATCHDOG_NOWAYOUT);
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	/* Init Watchdog timeout with value in DT */
226*4882a593Smuzhiyun 	ret = watchdog_init_timeout(&st_wdog_dev, 0, dev);
227*4882a593Smuzhiyun 	if (ret)
228*4882a593Smuzhiyun 		return ret;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	ret = devm_watchdog_register_device(dev, &st_wdog_dev);
231*4882a593Smuzhiyun 	if (ret)
232*4882a593Smuzhiyun 		return ret;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	st_wdog_setup(st_wdog, true);
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	dev_info(dev, "LPC Watchdog driver registered, reset type is %s",
237*4882a593Smuzhiyun 		 st_wdog->warm_reset ? "warm" : "cold");
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	return ret;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
st_wdog_remove(struct platform_device * pdev)242*4882a593Smuzhiyun static int st_wdog_remove(struct platform_device *pdev)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun 	struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev);
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	st_wdog_setup(st_wdog, false);
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	return 0;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
st_wdog_suspend(struct device * dev)252*4882a593Smuzhiyun static int st_wdog_suspend(struct device *dev)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun 	struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev);
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	if (watchdog_active(&st_wdog_dev))
257*4882a593Smuzhiyun 		st_wdog_stop(&st_wdog_dev);
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	st_wdog_setup(st_wdog, false);
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	clk_disable(st_wdog->clk);
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	return 0;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun 
st_wdog_resume(struct device * dev)266*4882a593Smuzhiyun static int st_wdog_resume(struct device *dev)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun 	struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev);
269*4882a593Smuzhiyun 	int ret;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	ret = clk_enable(st_wdog->clk);
272*4882a593Smuzhiyun 	if (ret) {
273*4882a593Smuzhiyun 		dev_err(dev, "Unable to re-enable clock\n");
274*4882a593Smuzhiyun 		watchdog_unregister_device(&st_wdog_dev);
275*4882a593Smuzhiyun 		clk_unprepare(st_wdog->clk);
276*4882a593Smuzhiyun 		return ret;
277*4882a593Smuzhiyun 	}
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	st_wdog_setup(st_wdog, true);
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	if (watchdog_active(&st_wdog_dev)) {
282*4882a593Smuzhiyun 		st_wdog_load_timer(st_wdog, st_wdog_dev.timeout);
283*4882a593Smuzhiyun 		st_wdog_start(&st_wdog_dev);
284*4882a593Smuzhiyun 	}
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	return 0;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun #endif
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(st_wdog_pm_ops,
291*4882a593Smuzhiyun 			 st_wdog_suspend,
292*4882a593Smuzhiyun 			 st_wdog_resume);
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun static struct platform_driver st_wdog_driver = {
295*4882a593Smuzhiyun 	.driver	= {
296*4882a593Smuzhiyun 		.name = "st-lpc-wdt",
297*4882a593Smuzhiyun 		.pm = &st_wdog_pm_ops,
298*4882a593Smuzhiyun 		.of_match_table = st_wdog_match,
299*4882a593Smuzhiyun 	},
300*4882a593Smuzhiyun 	.probe = st_wdog_probe,
301*4882a593Smuzhiyun 	.remove = st_wdog_remove,
302*4882a593Smuzhiyun };
303*4882a593Smuzhiyun module_platform_driver(st_wdog_driver);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun MODULE_AUTHOR("David Paris <david.paris@st.com>");
306*4882a593Smuzhiyun MODULE_DESCRIPTION("ST LPC Watchdog Driver");
307*4882a593Smuzhiyun MODULE_LICENSE("GPL");
308