1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * sl28cpld watchdog driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2020 Kontron Europe GmbH
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/property.h>
13*4882a593Smuzhiyun #include <linux/regmap.h>
14*4882a593Smuzhiyun #include <linux/watchdog.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun * Watchdog timer block registers.
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun #define WDT_CTRL 0x00
20*4882a593Smuzhiyun #define WDT_CTRL_EN BIT(0)
21*4882a593Smuzhiyun #define WDT_CTRL_LOCK BIT(2)
22*4882a593Smuzhiyun #define WDT_CTRL_ASSERT_SYS_RESET BIT(6)
23*4882a593Smuzhiyun #define WDT_CTRL_ASSERT_WDT_TIMEOUT BIT(7)
24*4882a593Smuzhiyun #define WDT_TIMEOUT 0x01
25*4882a593Smuzhiyun #define WDT_KICK 0x02
26*4882a593Smuzhiyun #define WDT_KICK_VALUE 0x6b
27*4882a593Smuzhiyun #define WDT_COUNT 0x03
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define WDT_DEFAULT_TIMEOUT 10
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun static bool nowayout = WATCHDOG_NOWAYOUT;
32*4882a593Smuzhiyun module_param(nowayout, bool, 0);
33*4882a593Smuzhiyun MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
34*4882a593Smuzhiyun __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static int timeout;
37*4882a593Smuzhiyun module_param(timeout, int, 0);
38*4882a593Smuzhiyun MODULE_PARM_DESC(timeout, "Initial watchdog timeout in seconds");
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun struct sl28cpld_wdt {
41*4882a593Smuzhiyun struct watchdog_device wdd;
42*4882a593Smuzhiyun struct regmap *regmap;
43*4882a593Smuzhiyun u32 offset;
44*4882a593Smuzhiyun bool assert_wdt_timeout;
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun
sl28cpld_wdt_ping(struct watchdog_device * wdd)47*4882a593Smuzhiyun static int sl28cpld_wdt_ping(struct watchdog_device *wdd)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun return regmap_write(wdt->regmap, wdt->offset + WDT_KICK,
52*4882a593Smuzhiyun WDT_KICK_VALUE);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
sl28cpld_wdt_start(struct watchdog_device * wdd)55*4882a593Smuzhiyun static int sl28cpld_wdt_start(struct watchdog_device *wdd)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
58*4882a593Smuzhiyun unsigned int val;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun val = WDT_CTRL_EN | WDT_CTRL_ASSERT_SYS_RESET;
61*4882a593Smuzhiyun if (wdt->assert_wdt_timeout)
62*4882a593Smuzhiyun val |= WDT_CTRL_ASSERT_WDT_TIMEOUT;
63*4882a593Smuzhiyun if (nowayout)
64*4882a593Smuzhiyun val |= WDT_CTRL_LOCK;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun return regmap_update_bits(wdt->regmap, wdt->offset + WDT_CTRL,
67*4882a593Smuzhiyun val, val);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
sl28cpld_wdt_stop(struct watchdog_device * wdd)70*4882a593Smuzhiyun static int sl28cpld_wdt_stop(struct watchdog_device *wdd)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun return regmap_update_bits(wdt->regmap, wdt->offset + WDT_CTRL,
75*4882a593Smuzhiyun WDT_CTRL_EN, 0);
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
sl28cpld_wdt_get_timeleft(struct watchdog_device * wdd)78*4882a593Smuzhiyun static unsigned int sl28cpld_wdt_get_timeleft(struct watchdog_device *wdd)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
81*4882a593Smuzhiyun unsigned int val;
82*4882a593Smuzhiyun int ret;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun ret = regmap_read(wdt->regmap, wdt->offset + WDT_COUNT, &val);
85*4882a593Smuzhiyun if (ret)
86*4882a593Smuzhiyun return 0;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return val;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
sl28cpld_wdt_set_timeout(struct watchdog_device * wdd,unsigned int timeout)91*4882a593Smuzhiyun static int sl28cpld_wdt_set_timeout(struct watchdog_device *wdd,
92*4882a593Smuzhiyun unsigned int timeout)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
95*4882a593Smuzhiyun int ret;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun ret = regmap_write(wdt->regmap, wdt->offset + WDT_TIMEOUT, timeout);
98*4882a593Smuzhiyun if (ret)
99*4882a593Smuzhiyun return ret;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun wdd->timeout = timeout;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun return 0;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun static const struct watchdog_info sl28cpld_wdt_info = {
107*4882a593Smuzhiyun .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
108*4882a593Smuzhiyun .identity = "sl28cpld watchdog",
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun static struct watchdog_ops sl28cpld_wdt_ops = {
112*4882a593Smuzhiyun .owner = THIS_MODULE,
113*4882a593Smuzhiyun .start = sl28cpld_wdt_start,
114*4882a593Smuzhiyun .stop = sl28cpld_wdt_stop,
115*4882a593Smuzhiyun .ping = sl28cpld_wdt_ping,
116*4882a593Smuzhiyun .set_timeout = sl28cpld_wdt_set_timeout,
117*4882a593Smuzhiyun .get_timeleft = sl28cpld_wdt_get_timeleft,
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun
sl28cpld_wdt_probe(struct platform_device * pdev)120*4882a593Smuzhiyun static int sl28cpld_wdt_probe(struct platform_device *pdev)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun struct watchdog_device *wdd;
123*4882a593Smuzhiyun struct sl28cpld_wdt *wdt;
124*4882a593Smuzhiyun unsigned int status;
125*4882a593Smuzhiyun unsigned int val;
126*4882a593Smuzhiyun int ret;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun if (!pdev->dev.parent)
129*4882a593Smuzhiyun return -ENODEV;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
132*4882a593Smuzhiyun if (!wdt)
133*4882a593Smuzhiyun return -ENOMEM;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun wdt->regmap = dev_get_regmap(pdev->dev.parent, NULL);
136*4882a593Smuzhiyun if (!wdt->regmap)
137*4882a593Smuzhiyun return -ENODEV;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun ret = device_property_read_u32(&pdev->dev, "reg", &wdt->offset);
140*4882a593Smuzhiyun if (ret)
141*4882a593Smuzhiyun return -EINVAL;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun wdt->assert_wdt_timeout = device_property_read_bool(&pdev->dev,
144*4882a593Smuzhiyun "kontron,assert-wdt-timeout-pin");
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun /* initialize struct watchdog_device */
147*4882a593Smuzhiyun wdd = &wdt->wdd;
148*4882a593Smuzhiyun wdd->parent = &pdev->dev;
149*4882a593Smuzhiyun wdd->info = &sl28cpld_wdt_info;
150*4882a593Smuzhiyun wdd->ops = &sl28cpld_wdt_ops;
151*4882a593Smuzhiyun wdd->min_timeout = 1;
152*4882a593Smuzhiyun wdd->max_timeout = 255;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun watchdog_set_drvdata(wdd, wdt);
155*4882a593Smuzhiyun watchdog_stop_on_reboot(wdd);
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /*
158*4882a593Smuzhiyun * Read the status early, in case of an error, we haven't modified the
159*4882a593Smuzhiyun * hardware.
160*4882a593Smuzhiyun */
161*4882a593Smuzhiyun ret = regmap_read(wdt->regmap, wdt->offset + WDT_CTRL, &status);
162*4882a593Smuzhiyun if (ret)
163*4882a593Smuzhiyun return ret;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /*
166*4882a593Smuzhiyun * Initial timeout value, may be overwritten by device tree or module
167*4882a593Smuzhiyun * parmeter in watchdog_init_timeout().
168*4882a593Smuzhiyun *
169*4882a593Smuzhiyun * Reading a zero here means that either the hardware has a default
170*4882a593Smuzhiyun * value of zero (which is very unlikely and definitely a hardware
171*4882a593Smuzhiyun * bug) or the bootloader set it to zero. In any case, we handle
172*4882a593Smuzhiyun * this case gracefully and set out own timeout.
173*4882a593Smuzhiyun */
174*4882a593Smuzhiyun ret = regmap_read(wdt->regmap, wdt->offset + WDT_TIMEOUT, &val);
175*4882a593Smuzhiyun if (ret)
176*4882a593Smuzhiyun return ret;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun if (val)
179*4882a593Smuzhiyun wdd->timeout = val;
180*4882a593Smuzhiyun else
181*4882a593Smuzhiyun wdd->timeout = WDT_DEFAULT_TIMEOUT;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun watchdog_init_timeout(wdd, timeout, &pdev->dev);
184*4882a593Smuzhiyun sl28cpld_wdt_set_timeout(wdd, wdd->timeout);
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /* if the watchdog is locked, we set nowayout */
187*4882a593Smuzhiyun if (status & WDT_CTRL_LOCK)
188*4882a593Smuzhiyun nowayout = true;
189*4882a593Smuzhiyun watchdog_set_nowayout(wdd, nowayout);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /*
192*4882a593Smuzhiyun * If watchdog is already running, keep it enabled, but make
193*4882a593Smuzhiyun * sure its mode is set correctly.
194*4882a593Smuzhiyun */
195*4882a593Smuzhiyun if (status & WDT_CTRL_EN) {
196*4882a593Smuzhiyun sl28cpld_wdt_start(wdd);
197*4882a593Smuzhiyun set_bit(WDOG_HW_RUNNING, &wdd->status);
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun ret = devm_watchdog_register_device(&pdev->dev, wdd);
201*4882a593Smuzhiyun if (ret < 0) {
202*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to register watchdog device\n");
203*4882a593Smuzhiyun return ret;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun dev_info(&pdev->dev, "initial timeout %d sec%s\n",
207*4882a593Smuzhiyun wdd->timeout, nowayout ? ", nowayout" : "");
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun return 0;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun static const struct of_device_id sl28cpld_wdt_of_match[] = {
213*4882a593Smuzhiyun { .compatible = "kontron,sl28cpld-wdt" },
214*4882a593Smuzhiyun {}
215*4882a593Smuzhiyun };
216*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, sl28cpld_wdt_of_match);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun static struct platform_driver sl28cpld_wdt_driver = {
219*4882a593Smuzhiyun .probe = sl28cpld_wdt_probe,
220*4882a593Smuzhiyun .driver = {
221*4882a593Smuzhiyun .name = "sl28cpld-wdt",
222*4882a593Smuzhiyun .of_match_table = sl28cpld_wdt_of_match,
223*4882a593Smuzhiyun },
224*4882a593Smuzhiyun };
225*4882a593Smuzhiyun module_platform_driver(sl28cpld_wdt_driver);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun MODULE_DESCRIPTION("sl28cpld Watchdog Driver");
228*4882a593Smuzhiyun MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
229*4882a593Smuzhiyun MODULE_LICENSE("GPL");
230