xref: /OK3568_Linux_fs/kernel/drivers/watchdog/sa1100_wdt.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *	Watchdog driver for the SA11x0/PXA2xx
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *	(c) Copyright 2000 Oleg Drokin <green@crimea.edu>
6*4882a593Smuzhiyun  *	    Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  *	Neither Oleg Drokin nor iXcelerator.com admit liability nor provide
9*4882a593Smuzhiyun  *	warranty for any of this software. This material is provided
10*4882a593Smuzhiyun  *	"AS-IS" and at no charge.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  *	(c) Copyright 2000           Oleg Drokin <green@crimea.edu>
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *	27/11/2000 Initial release
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <linux/module.h>
20*4882a593Smuzhiyun #include <linux/moduleparam.h>
21*4882a593Smuzhiyun #include <linux/clk.h>
22*4882a593Smuzhiyun #include <linux/types.h>
23*4882a593Smuzhiyun #include <linux/kernel.h>
24*4882a593Smuzhiyun #include <linux/fs.h>
25*4882a593Smuzhiyun #include <linux/miscdevice.h>
26*4882a593Smuzhiyun #include <linux/watchdog.h>
27*4882a593Smuzhiyun #include <linux/init.h>
28*4882a593Smuzhiyun #include <linux/io.h>
29*4882a593Smuzhiyun #include <linux/bitops.h>
30*4882a593Smuzhiyun #include <linux/uaccess.h>
31*4882a593Smuzhiyun #include <linux/timex.h>
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #ifdef CONFIG_ARCH_PXA
34*4882a593Smuzhiyun #include <mach/regs-ost.h>
35*4882a593Smuzhiyun #endif
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #include <mach/reset.h>
38*4882a593Smuzhiyun #include <mach/hardware.h>
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun static unsigned long oscr_freq;
41*4882a593Smuzhiyun static unsigned long sa1100wdt_users;
42*4882a593Smuzhiyun static unsigned int pre_margin;
43*4882a593Smuzhiyun static int boot_status;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /*
46*4882a593Smuzhiyun  *	Allow only one person to hold it open
47*4882a593Smuzhiyun  */
sa1100dog_open(struct inode * inode,struct file * file)48*4882a593Smuzhiyun static int sa1100dog_open(struct inode *inode, struct file *file)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun 	if (test_and_set_bit(1, &sa1100wdt_users))
51*4882a593Smuzhiyun 		return -EBUSY;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	/* Activate SA1100 Watchdog timer */
54*4882a593Smuzhiyun 	writel_relaxed(readl_relaxed(OSCR) + pre_margin, OSMR3);
55*4882a593Smuzhiyun 	writel_relaxed(OSSR_M3, OSSR);
56*4882a593Smuzhiyun 	writel_relaxed(OWER_WME, OWER);
57*4882a593Smuzhiyun 	writel_relaxed(readl_relaxed(OIER) | OIER_E3, OIER);
58*4882a593Smuzhiyun 	return stream_open(inode, file);
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun /*
62*4882a593Smuzhiyun  * The watchdog cannot be disabled.
63*4882a593Smuzhiyun  *
64*4882a593Smuzhiyun  * Previous comments suggested that turning off the interrupt by
65*4882a593Smuzhiyun  * clearing OIER[E3] would prevent the watchdog timing out but this
66*4882a593Smuzhiyun  * does not appear to be true (at least on the PXA255).
67*4882a593Smuzhiyun  */
sa1100dog_release(struct inode * inode,struct file * file)68*4882a593Smuzhiyun static int sa1100dog_release(struct inode *inode, struct file *file)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	pr_crit("Device closed - timer will not stop\n");
71*4882a593Smuzhiyun 	clear_bit(1, &sa1100wdt_users);
72*4882a593Smuzhiyun 	return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
sa1100dog_write(struct file * file,const char __user * data,size_t len,loff_t * ppos)75*4882a593Smuzhiyun static ssize_t sa1100dog_write(struct file *file, const char __user *data,
76*4882a593Smuzhiyun 						size_t len, loff_t *ppos)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun 	if (len)
79*4882a593Smuzhiyun 		/* Refresh OSMR3 timer. */
80*4882a593Smuzhiyun 		writel_relaxed(readl_relaxed(OSCR) + pre_margin, OSMR3);
81*4882a593Smuzhiyun 	return len;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun static const struct watchdog_info ident = {
85*4882a593Smuzhiyun 	.options	= WDIOF_CARDRESET | WDIOF_SETTIMEOUT
86*4882a593Smuzhiyun 				| WDIOF_KEEPALIVEPING,
87*4882a593Smuzhiyun 	.identity	= "SA1100/PXA255 Watchdog",
88*4882a593Smuzhiyun 	.firmware_version	= 1,
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun 
sa1100dog_ioctl(struct file * file,unsigned int cmd,unsigned long arg)91*4882a593Smuzhiyun static long sa1100dog_ioctl(struct file *file, unsigned int cmd,
92*4882a593Smuzhiyun 							unsigned long arg)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	int ret = -ENOTTY;
95*4882a593Smuzhiyun 	int time;
96*4882a593Smuzhiyun 	void __user *argp = (void __user *)arg;
97*4882a593Smuzhiyun 	int __user *p = argp;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	switch (cmd) {
100*4882a593Smuzhiyun 	case WDIOC_GETSUPPORT:
101*4882a593Smuzhiyun 		ret = copy_to_user(argp, &ident,
102*4882a593Smuzhiyun 				   sizeof(ident)) ? -EFAULT : 0;
103*4882a593Smuzhiyun 		break;
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	case WDIOC_GETSTATUS:
106*4882a593Smuzhiyun 		ret = put_user(0, p);
107*4882a593Smuzhiyun 		break;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	case WDIOC_GETBOOTSTATUS:
110*4882a593Smuzhiyun 		ret = put_user(boot_status, p);
111*4882a593Smuzhiyun 		break;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	case WDIOC_KEEPALIVE:
114*4882a593Smuzhiyun 		writel_relaxed(readl_relaxed(OSCR) + pre_margin, OSMR3);
115*4882a593Smuzhiyun 		ret = 0;
116*4882a593Smuzhiyun 		break;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	case WDIOC_SETTIMEOUT:
119*4882a593Smuzhiyun 		ret = get_user(time, p);
120*4882a593Smuzhiyun 		if (ret)
121*4882a593Smuzhiyun 			break;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 		if (time <= 0 || (oscr_freq * (long long)time >= 0xffffffff)) {
124*4882a593Smuzhiyun 			ret = -EINVAL;
125*4882a593Smuzhiyun 			break;
126*4882a593Smuzhiyun 		}
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 		pre_margin = oscr_freq * time;
129*4882a593Smuzhiyun 		writel_relaxed(readl_relaxed(OSCR) + pre_margin, OSMR3);
130*4882a593Smuzhiyun 		fallthrough;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	case WDIOC_GETTIMEOUT:
133*4882a593Smuzhiyun 		ret = put_user(pre_margin / oscr_freq, p);
134*4882a593Smuzhiyun 		break;
135*4882a593Smuzhiyun 	}
136*4882a593Smuzhiyun 	return ret;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun static const struct file_operations sa1100dog_fops = {
140*4882a593Smuzhiyun 	.owner		= THIS_MODULE,
141*4882a593Smuzhiyun 	.llseek		= no_llseek,
142*4882a593Smuzhiyun 	.write		= sa1100dog_write,
143*4882a593Smuzhiyun 	.unlocked_ioctl	= sa1100dog_ioctl,
144*4882a593Smuzhiyun 	.compat_ioctl	= compat_ptr_ioctl,
145*4882a593Smuzhiyun 	.open		= sa1100dog_open,
146*4882a593Smuzhiyun 	.release	= sa1100dog_release,
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun static struct miscdevice sa1100dog_miscdev = {
150*4882a593Smuzhiyun 	.minor		= WATCHDOG_MINOR,
151*4882a593Smuzhiyun 	.name		= "watchdog",
152*4882a593Smuzhiyun 	.fops		= &sa1100dog_fops,
153*4882a593Smuzhiyun };
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun static int margin __initdata = 60;		/* (secs) Default is 1 minute */
156*4882a593Smuzhiyun static struct clk *clk;
157*4882a593Smuzhiyun 
sa1100dog_init(void)158*4882a593Smuzhiyun static int __init sa1100dog_init(void)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun 	int ret;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	clk = clk_get(NULL, "OSTIMER0");
163*4882a593Smuzhiyun 	if (IS_ERR(clk)) {
164*4882a593Smuzhiyun 		pr_err("SA1100/PXA2xx Watchdog Timer: clock not found: %d\n",
165*4882a593Smuzhiyun 		       (int) PTR_ERR(clk));
166*4882a593Smuzhiyun 		return PTR_ERR(clk);
167*4882a593Smuzhiyun 	}
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	ret = clk_prepare_enable(clk);
170*4882a593Smuzhiyun 	if (ret) {
171*4882a593Smuzhiyun 		pr_err("SA1100/PXA2xx Watchdog Timer: clock failed to prepare+enable: %d\n",
172*4882a593Smuzhiyun 		       ret);
173*4882a593Smuzhiyun 		goto err;
174*4882a593Smuzhiyun 	}
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	oscr_freq = clk_get_rate(clk);
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	/*
179*4882a593Smuzhiyun 	 * Read the reset status, and save it for later.  If
180*4882a593Smuzhiyun 	 * we suspend, RCSR will be cleared, and the watchdog
181*4882a593Smuzhiyun 	 * reset reason will be lost.
182*4882a593Smuzhiyun 	 */
183*4882a593Smuzhiyun 	boot_status = (reset_status & RESET_STATUS_WATCHDOG) ?
184*4882a593Smuzhiyun 				WDIOF_CARDRESET : 0;
185*4882a593Smuzhiyun 	pre_margin = oscr_freq * margin;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	ret = misc_register(&sa1100dog_miscdev);
188*4882a593Smuzhiyun 	if (ret == 0) {
189*4882a593Smuzhiyun 		pr_info("SA1100/PXA2xx Watchdog Timer: timer margin %d sec\n",
190*4882a593Smuzhiyun 			margin);
191*4882a593Smuzhiyun 		return 0;
192*4882a593Smuzhiyun 	}
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	clk_disable_unprepare(clk);
195*4882a593Smuzhiyun err:
196*4882a593Smuzhiyun 	clk_put(clk);
197*4882a593Smuzhiyun 	return ret;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun 
sa1100dog_exit(void)200*4882a593Smuzhiyun static void __exit sa1100dog_exit(void)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun 	misc_deregister(&sa1100dog_miscdev);
203*4882a593Smuzhiyun 	clk_disable_unprepare(clk);
204*4882a593Smuzhiyun 	clk_put(clk);
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun module_init(sa1100dog_init);
208*4882a593Smuzhiyun module_exit(sa1100dog_exit);
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun MODULE_AUTHOR("Oleg Drokin <green@crimea.edu>");
211*4882a593Smuzhiyun MODULE_DESCRIPTION("SA1100/PXA2xx Watchdog");
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun module_param(margin, int, 0);
214*4882a593Smuzhiyun MODULE_PARM_DESC(margin, "Watchdog margin in seconds (default 60s)");
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun MODULE_LICENSE("GPL");
217