xref: /OK3568_Linux_fs/kernel/drivers/watchdog/rtd119x_wdt.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Realtek RTD129x watchdog
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (c) 2017 Andreas Färber
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/bitops.h>
10*4882a593Smuzhiyun #include <linux/clk.h>
11*4882a593Smuzhiyun #include <linux/io.h>
12*4882a593Smuzhiyun #include <linux/of.h>
13*4882a593Smuzhiyun #include <linux/of_address.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/watchdog.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define RTD119X_TCWCR		0x0
18*4882a593Smuzhiyun #define RTD119X_TCWTR		0x4
19*4882a593Smuzhiyun #define RTD119X_TCWOV		0xc
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define RTD119X_TCWCR_WDEN_DISABLED		0xa5
22*4882a593Smuzhiyun #define RTD119X_TCWCR_WDEN_ENABLED		0xff
23*4882a593Smuzhiyun #define RTD119X_TCWCR_WDEN_MASK			0xff
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define RTD119X_TCWTR_WDCLR			BIT(0)
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun struct rtd119x_watchdog_device {
28*4882a593Smuzhiyun 	struct watchdog_device wdt_dev;
29*4882a593Smuzhiyun 	void __iomem *base;
30*4882a593Smuzhiyun 	struct clk *clk;
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
rtd119x_wdt_start(struct watchdog_device * wdev)33*4882a593Smuzhiyun static int rtd119x_wdt_start(struct watchdog_device *wdev)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	struct rtd119x_watchdog_device *data = watchdog_get_drvdata(wdev);
36*4882a593Smuzhiyun 	u32 val;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	val = readl_relaxed(data->base + RTD119X_TCWCR);
39*4882a593Smuzhiyun 	val &= ~RTD119X_TCWCR_WDEN_MASK;
40*4882a593Smuzhiyun 	val |= RTD119X_TCWCR_WDEN_ENABLED;
41*4882a593Smuzhiyun 	writel(val, data->base + RTD119X_TCWCR);
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	return 0;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun 
rtd119x_wdt_stop(struct watchdog_device * wdev)46*4882a593Smuzhiyun static int rtd119x_wdt_stop(struct watchdog_device *wdev)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	struct rtd119x_watchdog_device *data = watchdog_get_drvdata(wdev);
49*4882a593Smuzhiyun 	u32 val;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	val = readl_relaxed(data->base + RTD119X_TCWCR);
52*4882a593Smuzhiyun 	val &= ~RTD119X_TCWCR_WDEN_MASK;
53*4882a593Smuzhiyun 	val |= RTD119X_TCWCR_WDEN_DISABLED;
54*4882a593Smuzhiyun 	writel(val, data->base + RTD119X_TCWCR);
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	return 0;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
rtd119x_wdt_ping(struct watchdog_device * wdev)59*4882a593Smuzhiyun static int rtd119x_wdt_ping(struct watchdog_device *wdev)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	struct rtd119x_watchdog_device *data = watchdog_get_drvdata(wdev);
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	writel_relaxed(RTD119X_TCWTR_WDCLR, data->base + RTD119X_TCWTR);
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	return rtd119x_wdt_start(wdev);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
rtd119x_wdt_set_timeout(struct watchdog_device * wdev,unsigned int val)68*4882a593Smuzhiyun static int rtd119x_wdt_set_timeout(struct watchdog_device *wdev, unsigned int val)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	struct rtd119x_watchdog_device *data = watchdog_get_drvdata(wdev);
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	writel(val * clk_get_rate(data->clk), data->base + RTD119X_TCWOV);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	data->wdt_dev.timeout = val;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	return 0;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun static const struct watchdog_ops rtd119x_wdt_ops = {
80*4882a593Smuzhiyun 	.owner = THIS_MODULE,
81*4882a593Smuzhiyun 	.start		= rtd119x_wdt_start,
82*4882a593Smuzhiyun 	.stop		= rtd119x_wdt_stop,
83*4882a593Smuzhiyun 	.ping		= rtd119x_wdt_ping,
84*4882a593Smuzhiyun 	.set_timeout	= rtd119x_wdt_set_timeout,
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun static const struct watchdog_info rtd119x_wdt_info = {
88*4882a593Smuzhiyun 	.identity = "rtd119x-wdt",
89*4882a593Smuzhiyun 	.options = 0,
90*4882a593Smuzhiyun };
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun static const struct of_device_id rtd119x_wdt_dt_ids[] = {
93*4882a593Smuzhiyun 	 { .compatible = "realtek,rtd1295-watchdog" },
94*4882a593Smuzhiyun 	 { }
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun 
rtd119x_clk_disable_unprepare(void * data)97*4882a593Smuzhiyun static void rtd119x_clk_disable_unprepare(void *data)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	clk_disable_unprepare(data);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
rtd119x_wdt_probe(struct platform_device * pdev)102*4882a593Smuzhiyun static int rtd119x_wdt_probe(struct platform_device *pdev)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
105*4882a593Smuzhiyun 	struct rtd119x_watchdog_device *data;
106*4882a593Smuzhiyun 	int ret;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
109*4882a593Smuzhiyun 	if (!data)
110*4882a593Smuzhiyun 		return -ENOMEM;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	data->base = devm_platform_ioremap_resource(pdev, 0);
113*4882a593Smuzhiyun 	if (IS_ERR(data->base))
114*4882a593Smuzhiyun 		return PTR_ERR(data->base);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	data->clk = devm_clk_get(dev, NULL);
117*4882a593Smuzhiyun 	if (IS_ERR(data->clk))
118*4882a593Smuzhiyun 		return PTR_ERR(data->clk);
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	ret = clk_prepare_enable(data->clk);
121*4882a593Smuzhiyun 	if (ret)
122*4882a593Smuzhiyun 		return ret;
123*4882a593Smuzhiyun 	ret = devm_add_action_or_reset(dev, rtd119x_clk_disable_unprepare,
124*4882a593Smuzhiyun 				       data->clk);
125*4882a593Smuzhiyun 	if (ret)
126*4882a593Smuzhiyun 		return ret;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	data->wdt_dev.info = &rtd119x_wdt_info;
129*4882a593Smuzhiyun 	data->wdt_dev.ops = &rtd119x_wdt_ops;
130*4882a593Smuzhiyun 	data->wdt_dev.timeout = 120;
131*4882a593Smuzhiyun 	data->wdt_dev.max_timeout = 0xffffffff / clk_get_rate(data->clk);
132*4882a593Smuzhiyun 	data->wdt_dev.min_timeout = 1;
133*4882a593Smuzhiyun 	data->wdt_dev.parent = dev;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	watchdog_stop_on_reboot(&data->wdt_dev);
136*4882a593Smuzhiyun 	watchdog_set_drvdata(&data->wdt_dev, data);
137*4882a593Smuzhiyun 	platform_set_drvdata(pdev, data);
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	writel_relaxed(RTD119X_TCWTR_WDCLR, data->base + RTD119X_TCWTR);
140*4882a593Smuzhiyun 	rtd119x_wdt_set_timeout(&data->wdt_dev, data->wdt_dev.timeout);
141*4882a593Smuzhiyun 	rtd119x_wdt_stop(&data->wdt_dev);
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	return devm_watchdog_register_device(dev, &data->wdt_dev);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun static struct platform_driver rtd119x_wdt_driver = {
147*4882a593Smuzhiyun 	.probe = rtd119x_wdt_probe,
148*4882a593Smuzhiyun 	.driver = {
149*4882a593Smuzhiyun 		.name = "rtd1295-watchdog",
150*4882a593Smuzhiyun 		.of_match_table	= rtd119x_wdt_dt_ids,
151*4882a593Smuzhiyun 	},
152*4882a593Smuzhiyun };
153*4882a593Smuzhiyun builtin_platform_driver(rtd119x_wdt_driver);
154