xref: /OK3568_Linux_fs/kernel/drivers/watchdog/rdc321x_wdt.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * RDC321x watchdog driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2007-2010 Florian Fainelli <florian@openwrt.org>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * This driver is highly inspired from the cpu5_wdt driver
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/moduleparam.h>
12*4882a593Smuzhiyun #include <linux/types.h>
13*4882a593Smuzhiyun #include <linux/errno.h>
14*4882a593Smuzhiyun #include <linux/miscdevice.h>
15*4882a593Smuzhiyun #include <linux/fs.h>
16*4882a593Smuzhiyun #include <linux/ioport.h>
17*4882a593Smuzhiyun #include <linux/timer.h>
18*4882a593Smuzhiyun #include <linux/completion.h>
19*4882a593Smuzhiyun #include <linux/jiffies.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun #include <linux/watchdog.h>
22*4882a593Smuzhiyun #include <linux/io.h>
23*4882a593Smuzhiyun #include <linux/uaccess.h>
24*4882a593Smuzhiyun #include <linux/mfd/rdc321x.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define RDC_WDT_MASK	0x80000000 /* Mask */
27*4882a593Smuzhiyun #define RDC_WDT_EN	0x00800000 /* Enable bit */
28*4882a593Smuzhiyun #define RDC_WDT_WTI	0x00200000 /* Generate CPU reset/NMI/WDT on timeout */
29*4882a593Smuzhiyun #define RDC_WDT_RST	0x00100000 /* Reset bit */
30*4882a593Smuzhiyun #define RDC_WDT_WIF	0x00040000 /* WDT IRQ Flag */
31*4882a593Smuzhiyun #define RDC_WDT_IRT	0x00000100 /* IRQ Routing table */
32*4882a593Smuzhiyun #define RDC_WDT_CNT	0x00000001 /* WDT count */
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define RDC_CLS_TMR	0x80003844 /* Clear timer */
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define RDC_WDT_INTERVAL	(HZ/10+1)
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun static int ticks = 1000;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun /* some device data */
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun static struct {
43*4882a593Smuzhiyun 	struct completion stop;
44*4882a593Smuzhiyun 	int running;
45*4882a593Smuzhiyun 	struct timer_list timer;
46*4882a593Smuzhiyun 	int queue;
47*4882a593Smuzhiyun 	int default_ticks;
48*4882a593Smuzhiyun 	unsigned long inuse;
49*4882a593Smuzhiyun 	spinlock_t lock;
50*4882a593Smuzhiyun 	struct pci_dev *sb_pdev;
51*4882a593Smuzhiyun 	int base_reg;
52*4882a593Smuzhiyun } rdc321x_wdt_device;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun /* generic helper functions */
55*4882a593Smuzhiyun 
rdc321x_wdt_trigger(struct timer_list * unused)56*4882a593Smuzhiyun static void rdc321x_wdt_trigger(struct timer_list *unused)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun 	unsigned long flags;
59*4882a593Smuzhiyun 	u32 val;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	if (rdc321x_wdt_device.running)
62*4882a593Smuzhiyun 		ticks--;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	/* keep watchdog alive */
65*4882a593Smuzhiyun 	spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
66*4882a593Smuzhiyun 	pci_read_config_dword(rdc321x_wdt_device.sb_pdev,
67*4882a593Smuzhiyun 					rdc321x_wdt_device.base_reg, &val);
68*4882a593Smuzhiyun 	val |= RDC_WDT_EN;
69*4882a593Smuzhiyun 	pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
70*4882a593Smuzhiyun 					rdc321x_wdt_device.base_reg, val);
71*4882a593Smuzhiyun 	spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	/* requeue?? */
74*4882a593Smuzhiyun 	if (rdc321x_wdt_device.queue && ticks)
75*4882a593Smuzhiyun 		mod_timer(&rdc321x_wdt_device.timer,
76*4882a593Smuzhiyun 				jiffies + RDC_WDT_INTERVAL);
77*4882a593Smuzhiyun 	else {
78*4882a593Smuzhiyun 		/* ticks doesn't matter anyway */
79*4882a593Smuzhiyun 		complete(&rdc321x_wdt_device.stop);
80*4882a593Smuzhiyun 	}
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun 
rdc321x_wdt_reset(void)84*4882a593Smuzhiyun static void rdc321x_wdt_reset(void)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	ticks = rdc321x_wdt_device.default_ticks;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
rdc321x_wdt_start(void)89*4882a593Smuzhiyun static void rdc321x_wdt_start(void)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	unsigned long flags;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	if (!rdc321x_wdt_device.queue) {
94*4882a593Smuzhiyun 		rdc321x_wdt_device.queue = 1;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 		/* Clear the timer */
97*4882a593Smuzhiyun 		spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
98*4882a593Smuzhiyun 		pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
99*4882a593Smuzhiyun 				rdc321x_wdt_device.base_reg, RDC_CLS_TMR);
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 		/* Enable watchdog and set the timeout to 81.92 us */
102*4882a593Smuzhiyun 		pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
103*4882a593Smuzhiyun 					rdc321x_wdt_device.base_reg,
104*4882a593Smuzhiyun 					RDC_WDT_EN | RDC_WDT_CNT);
105*4882a593Smuzhiyun 		spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 		mod_timer(&rdc321x_wdt_device.timer,
108*4882a593Smuzhiyun 				jiffies + RDC_WDT_INTERVAL);
109*4882a593Smuzhiyun 	}
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	/* if process dies, counter is not decremented */
112*4882a593Smuzhiyun 	rdc321x_wdt_device.running++;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun 
rdc321x_wdt_stop(void)115*4882a593Smuzhiyun static int rdc321x_wdt_stop(void)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	if (rdc321x_wdt_device.running)
118*4882a593Smuzhiyun 		rdc321x_wdt_device.running = 0;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	ticks = rdc321x_wdt_device.default_ticks;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	return -EIO;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun /* filesystem operations */
rdc321x_wdt_open(struct inode * inode,struct file * file)126*4882a593Smuzhiyun static int rdc321x_wdt_open(struct inode *inode, struct file *file)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	if (test_and_set_bit(0, &rdc321x_wdt_device.inuse))
129*4882a593Smuzhiyun 		return -EBUSY;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	return stream_open(inode, file);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
rdc321x_wdt_release(struct inode * inode,struct file * file)134*4882a593Smuzhiyun static int rdc321x_wdt_release(struct inode *inode, struct file *file)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	clear_bit(0, &rdc321x_wdt_device.inuse);
137*4882a593Smuzhiyun 	return 0;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun 
rdc321x_wdt_ioctl(struct file * file,unsigned int cmd,unsigned long arg)140*4882a593Smuzhiyun static long rdc321x_wdt_ioctl(struct file *file, unsigned int cmd,
141*4882a593Smuzhiyun 				unsigned long arg)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun 	void __user *argp = (void __user *)arg;
144*4882a593Smuzhiyun 	u32 value;
145*4882a593Smuzhiyun 	static const struct watchdog_info ident = {
146*4882a593Smuzhiyun 		.options = WDIOF_CARDRESET,
147*4882a593Smuzhiyun 		.identity = "RDC321x WDT",
148*4882a593Smuzhiyun 	};
149*4882a593Smuzhiyun 	unsigned long flags;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	switch (cmd) {
152*4882a593Smuzhiyun 	case WDIOC_KEEPALIVE:
153*4882a593Smuzhiyun 		rdc321x_wdt_reset();
154*4882a593Smuzhiyun 		break;
155*4882a593Smuzhiyun 	case WDIOC_GETSTATUS:
156*4882a593Smuzhiyun 		/* Read the value from the DATA register */
157*4882a593Smuzhiyun 		spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
158*4882a593Smuzhiyun 		pci_read_config_dword(rdc321x_wdt_device.sb_pdev,
159*4882a593Smuzhiyun 					rdc321x_wdt_device.base_reg, &value);
160*4882a593Smuzhiyun 		spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
161*4882a593Smuzhiyun 		if (copy_to_user(argp, &value, sizeof(u32)))
162*4882a593Smuzhiyun 			return -EFAULT;
163*4882a593Smuzhiyun 		break;
164*4882a593Smuzhiyun 	case WDIOC_GETSUPPORT:
165*4882a593Smuzhiyun 		if (copy_to_user(argp, &ident, sizeof(ident)))
166*4882a593Smuzhiyun 			return -EFAULT;
167*4882a593Smuzhiyun 		break;
168*4882a593Smuzhiyun 	case WDIOC_SETOPTIONS:
169*4882a593Smuzhiyun 		if (copy_from_user(&value, argp, sizeof(int)))
170*4882a593Smuzhiyun 			return -EFAULT;
171*4882a593Smuzhiyun 		switch (value) {
172*4882a593Smuzhiyun 		case WDIOS_ENABLECARD:
173*4882a593Smuzhiyun 			rdc321x_wdt_start();
174*4882a593Smuzhiyun 			break;
175*4882a593Smuzhiyun 		case WDIOS_DISABLECARD:
176*4882a593Smuzhiyun 			return rdc321x_wdt_stop();
177*4882a593Smuzhiyun 		default:
178*4882a593Smuzhiyun 			return -EINVAL;
179*4882a593Smuzhiyun 		}
180*4882a593Smuzhiyun 		break;
181*4882a593Smuzhiyun 	default:
182*4882a593Smuzhiyun 		return -ENOTTY;
183*4882a593Smuzhiyun 	}
184*4882a593Smuzhiyun 	return 0;
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun 
rdc321x_wdt_write(struct file * file,const char __user * buf,size_t count,loff_t * ppos)187*4882a593Smuzhiyun static ssize_t rdc321x_wdt_write(struct file *file, const char __user *buf,
188*4882a593Smuzhiyun 				size_t count, loff_t *ppos)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun 	if (!count)
191*4882a593Smuzhiyun 		return -EIO;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	rdc321x_wdt_reset();
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	return count;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun static const struct file_operations rdc321x_wdt_fops = {
199*4882a593Smuzhiyun 	.owner		= THIS_MODULE,
200*4882a593Smuzhiyun 	.llseek		= no_llseek,
201*4882a593Smuzhiyun 	.unlocked_ioctl	= rdc321x_wdt_ioctl,
202*4882a593Smuzhiyun 	.compat_ioctl	= compat_ptr_ioctl,
203*4882a593Smuzhiyun 	.open		= rdc321x_wdt_open,
204*4882a593Smuzhiyun 	.write		= rdc321x_wdt_write,
205*4882a593Smuzhiyun 	.release	= rdc321x_wdt_release,
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun static struct miscdevice rdc321x_wdt_misc = {
209*4882a593Smuzhiyun 	.minor	= WATCHDOG_MINOR,
210*4882a593Smuzhiyun 	.name	= "watchdog",
211*4882a593Smuzhiyun 	.fops	= &rdc321x_wdt_fops,
212*4882a593Smuzhiyun };
213*4882a593Smuzhiyun 
rdc321x_wdt_probe(struct platform_device * pdev)214*4882a593Smuzhiyun static int rdc321x_wdt_probe(struct platform_device *pdev)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun 	int err;
217*4882a593Smuzhiyun 	struct resource *r;
218*4882a593Smuzhiyun 	struct rdc321x_wdt_pdata *pdata;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	pdata = dev_get_platdata(&pdev->dev);
221*4882a593Smuzhiyun 	if (!pdata) {
222*4882a593Smuzhiyun 		dev_err(&pdev->dev, "no platform data supplied\n");
223*4882a593Smuzhiyun 		return -ENODEV;
224*4882a593Smuzhiyun 	}
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	r = platform_get_resource_byname(pdev, IORESOURCE_IO, "wdt-reg");
227*4882a593Smuzhiyun 	if (!r) {
228*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to get wdt-reg resource\n");
229*4882a593Smuzhiyun 		return -ENODEV;
230*4882a593Smuzhiyun 	}
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	rdc321x_wdt_device.sb_pdev = pdata->sb_pdev;
233*4882a593Smuzhiyun 	rdc321x_wdt_device.base_reg = r->start;
234*4882a593Smuzhiyun 	rdc321x_wdt_device.queue = 0;
235*4882a593Smuzhiyun 	rdc321x_wdt_device.default_ticks = ticks;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	err = misc_register(&rdc321x_wdt_misc);
238*4882a593Smuzhiyun 	if (err < 0) {
239*4882a593Smuzhiyun 		dev_err(&pdev->dev, "misc_register failed\n");
240*4882a593Smuzhiyun 		return err;
241*4882a593Smuzhiyun 	}
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	spin_lock_init(&rdc321x_wdt_device.lock);
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	/* Reset the watchdog */
246*4882a593Smuzhiyun 	pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
247*4882a593Smuzhiyun 				rdc321x_wdt_device.base_reg, RDC_WDT_RST);
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	init_completion(&rdc321x_wdt_device.stop);
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	clear_bit(0, &rdc321x_wdt_device.inuse);
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	timer_setup(&rdc321x_wdt_device.timer, rdc321x_wdt_trigger, 0);
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	dev_info(&pdev->dev, "watchdog init success\n");
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	return 0;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun 
rdc321x_wdt_remove(struct platform_device * pdev)260*4882a593Smuzhiyun static int rdc321x_wdt_remove(struct platform_device *pdev)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun 	if (rdc321x_wdt_device.queue) {
263*4882a593Smuzhiyun 		rdc321x_wdt_device.queue = 0;
264*4882a593Smuzhiyun 		wait_for_completion(&rdc321x_wdt_device.stop);
265*4882a593Smuzhiyun 	}
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	misc_deregister(&rdc321x_wdt_misc);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	return 0;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun static struct platform_driver rdc321x_wdt_driver = {
273*4882a593Smuzhiyun 	.probe = rdc321x_wdt_probe,
274*4882a593Smuzhiyun 	.remove = rdc321x_wdt_remove,
275*4882a593Smuzhiyun 	.driver = {
276*4882a593Smuzhiyun 		.name = "rdc321x-wdt",
277*4882a593Smuzhiyun 	},
278*4882a593Smuzhiyun };
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun module_platform_driver(rdc321x_wdt_driver);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
283*4882a593Smuzhiyun MODULE_DESCRIPTION("RDC321x watchdog driver");
284*4882a593Smuzhiyun MODULE_LICENSE("GPL");
285