1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * PNX833x Hardware Watchdog Driver
4*4882a593Smuzhiyun * Copyright 2008 NXP Semiconductors
5*4882a593Smuzhiyun * Daniel Laird <daniel.j.laird@nxp.com>
6*4882a593Smuzhiyun * Andre McCurdy <andre.mccurdy@nxp.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Heavily based upon - IndyDog 0.3
9*4882a593Smuzhiyun * A Hardware Watchdog Device for SGI IP22
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * (c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>, All Rights Reserved.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * based on softdog.c by Alan Cox <alan@redhat.com>
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/moduleparam.h>
20*4882a593Smuzhiyun #include <linux/types.h>
21*4882a593Smuzhiyun #include <linux/kernel.h>
22*4882a593Smuzhiyun #include <linux/fs.h>
23*4882a593Smuzhiyun #include <linux/mm.h>
24*4882a593Smuzhiyun #include <linux/miscdevice.h>
25*4882a593Smuzhiyun #include <linux/watchdog.h>
26*4882a593Smuzhiyun #include <linux/notifier.h>
27*4882a593Smuzhiyun #include <linux/reboot.h>
28*4882a593Smuzhiyun #include <linux/init.h>
29*4882a593Smuzhiyun #include <asm/mach-pnx833x/pnx833x.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define WATCHDOG_TIMEOUT 30 /* 30 sec Maximum timeout */
32*4882a593Smuzhiyun #define WATCHDOG_COUNT_FREQUENCY 68000000U /* Watchdog counts at 68MHZ. */
33*4882a593Smuzhiyun #define PNX_WATCHDOG_TIMEOUT (WATCHDOG_TIMEOUT * WATCHDOG_COUNT_FREQUENCY)
34*4882a593Smuzhiyun #define PNX_TIMEOUT_VALUE 2040000000U
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /** CONFIG block */
37*4882a593Smuzhiyun #define PNX833X_CONFIG (0x07000U)
38*4882a593Smuzhiyun #define PNX833X_CONFIG_CPU_WATCHDOG (0x54)
39*4882a593Smuzhiyun #define PNX833X_CONFIG_CPU_WATCHDOG_COMPARE (0x58)
40*4882a593Smuzhiyun #define PNX833X_CONFIG_CPU_COUNTERS_CONTROL (0x1c)
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /** RESET block */
43*4882a593Smuzhiyun #define PNX833X_RESET (0x08000U)
44*4882a593Smuzhiyun #define PNX833X_RESET_CONFIG (0x08)
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun static int pnx833x_wdt_alive;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun /* Set default timeout in MHZ.*/
49*4882a593Smuzhiyun static int pnx833x_wdt_timeout = PNX_WATCHDOG_TIMEOUT;
50*4882a593Smuzhiyun module_param(pnx833x_wdt_timeout, int, 0);
51*4882a593Smuzhiyun MODULE_PARM_DESC(timeout, "Watchdog timeout in Mhz. (68Mhz clock), default="
52*4882a593Smuzhiyun __MODULE_STRING(PNX_TIMEOUT_VALUE) "(30 seconds).");
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun static bool nowayout = WATCHDOG_NOWAYOUT;
55*4882a593Smuzhiyun module_param(nowayout, bool, 0);
56*4882a593Smuzhiyun MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
57*4882a593Smuzhiyun __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun #define START_DEFAULT 1
60*4882a593Smuzhiyun static int start_enabled = START_DEFAULT;
61*4882a593Smuzhiyun module_param(start_enabled, int, 0);
62*4882a593Smuzhiyun MODULE_PARM_DESC(start_enabled, "Watchdog is started on module insertion "
63*4882a593Smuzhiyun "(default=" __MODULE_STRING(START_DEFAULT) ")");
64*4882a593Smuzhiyun
pnx833x_wdt_start(void)65*4882a593Smuzhiyun static void pnx833x_wdt_start(void)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun /* Enable watchdog causing reset. */
68*4882a593Smuzhiyun PNX833X_REG(PNX833X_RESET + PNX833X_RESET_CONFIG) |= 0x1;
69*4882a593Smuzhiyun /* Set timeout.*/
70*4882a593Smuzhiyun PNX833X_REG(PNX833X_CONFIG +
71*4882a593Smuzhiyun PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = pnx833x_wdt_timeout;
72*4882a593Smuzhiyun /* Enable watchdog. */
73*4882a593Smuzhiyun PNX833X_REG(PNX833X_CONFIG +
74*4882a593Smuzhiyun PNX833X_CONFIG_CPU_COUNTERS_CONTROL) |= 0x1;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun pr_info("Started watchdog timer\n");
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
pnx833x_wdt_stop(void)79*4882a593Smuzhiyun static void pnx833x_wdt_stop(void)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun /* Disable watchdog causing reset. */
82*4882a593Smuzhiyun PNX833X_REG(PNX833X_RESET + PNX833X_CONFIG) &= 0xFFFFFFFE;
83*4882a593Smuzhiyun /* Disable watchdog.*/
84*4882a593Smuzhiyun PNX833X_REG(PNX833X_CONFIG +
85*4882a593Smuzhiyun PNX833X_CONFIG_CPU_COUNTERS_CONTROL) &= 0xFFFFFFFE;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun pr_info("Stopped watchdog timer\n");
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
pnx833x_wdt_ping(void)90*4882a593Smuzhiyun static void pnx833x_wdt_ping(void)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun PNX833X_REG(PNX833X_CONFIG +
93*4882a593Smuzhiyun PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = pnx833x_wdt_timeout;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun /*
97*4882a593Smuzhiyun * Allow only one person to hold it open
98*4882a593Smuzhiyun */
pnx833x_wdt_open(struct inode * inode,struct file * file)99*4882a593Smuzhiyun static int pnx833x_wdt_open(struct inode *inode, struct file *file)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun if (test_and_set_bit(0, &pnx833x_wdt_alive))
102*4882a593Smuzhiyun return -EBUSY;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun if (nowayout)
105*4882a593Smuzhiyun __module_get(THIS_MODULE);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* Activate timer */
108*4882a593Smuzhiyun if (!start_enabled)
109*4882a593Smuzhiyun pnx833x_wdt_start();
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun pnx833x_wdt_ping();
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun pr_info("Started watchdog timer\n");
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun return stream_open(inode, file);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
pnx833x_wdt_release(struct inode * inode,struct file * file)118*4882a593Smuzhiyun static int pnx833x_wdt_release(struct inode *inode, struct file *file)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun /* Shut off the timer.
121*4882a593Smuzhiyun * Lock it in if it's a module and we defined ...NOWAYOUT */
122*4882a593Smuzhiyun if (!nowayout)
123*4882a593Smuzhiyun pnx833x_wdt_stop(); /* Turn the WDT off */
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun clear_bit(0, &pnx833x_wdt_alive);
126*4882a593Smuzhiyun return 0;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
pnx833x_wdt_write(struct file * file,const char * data,size_t len,loff_t * ppos)129*4882a593Smuzhiyun static ssize_t pnx833x_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun /* Refresh the timer. */
132*4882a593Smuzhiyun if (len)
133*4882a593Smuzhiyun pnx833x_wdt_ping();
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun return len;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
pnx833x_wdt_ioctl(struct file * file,unsigned int cmd,unsigned long arg)138*4882a593Smuzhiyun static long pnx833x_wdt_ioctl(struct file *file, unsigned int cmd,
139*4882a593Smuzhiyun unsigned long arg)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun int options, new_timeout = 0;
142*4882a593Smuzhiyun uint32_t timeout, timeout_left = 0;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun static const struct watchdog_info ident = {
145*4882a593Smuzhiyun .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
146*4882a593Smuzhiyun .firmware_version = 0,
147*4882a593Smuzhiyun .identity = "Hardware Watchdog for PNX833x",
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun switch (cmd) {
151*4882a593Smuzhiyun default:
152*4882a593Smuzhiyun return -ENOTTY;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun case WDIOC_GETSUPPORT:
155*4882a593Smuzhiyun if (copy_to_user((struct watchdog_info *)arg,
156*4882a593Smuzhiyun &ident, sizeof(ident)))
157*4882a593Smuzhiyun return -EFAULT;
158*4882a593Smuzhiyun return 0;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun case WDIOC_GETSTATUS:
161*4882a593Smuzhiyun case WDIOC_GETBOOTSTATUS:
162*4882a593Smuzhiyun return put_user(0, (int *)arg);
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun case WDIOC_SETOPTIONS:
165*4882a593Smuzhiyun if (get_user(options, (int *)arg))
166*4882a593Smuzhiyun return -EFAULT;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (options & WDIOS_DISABLECARD)
169*4882a593Smuzhiyun pnx833x_wdt_stop();
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun if (options & WDIOS_ENABLECARD)
172*4882a593Smuzhiyun pnx833x_wdt_start();
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun return 0;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun case WDIOC_KEEPALIVE:
177*4882a593Smuzhiyun pnx833x_wdt_ping();
178*4882a593Smuzhiyun return 0;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun case WDIOC_SETTIMEOUT:
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun if (get_user(new_timeout, (int *)arg))
183*4882a593Smuzhiyun return -EFAULT;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun pnx833x_wdt_timeout = new_timeout;
186*4882a593Smuzhiyun PNX833X_REG(PNX833X_CONFIG +
187*4882a593Smuzhiyun PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = new_timeout;
188*4882a593Smuzhiyun return put_user(new_timeout, (int *)arg);
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun case WDIOC_GETTIMEOUT:
192*4882a593Smuzhiyun timeout = PNX833X_REG(PNX833X_CONFIG +
193*4882a593Smuzhiyun PNX833X_CONFIG_CPU_WATCHDOG_COMPARE);
194*4882a593Smuzhiyun return put_user(timeout, (int *)arg);
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun case WDIOC_GETTIMELEFT:
197*4882a593Smuzhiyun timeout_left = PNX833X_REG(PNX833X_CONFIG +
198*4882a593Smuzhiyun PNX833X_CONFIG_CPU_WATCHDOG);
199*4882a593Smuzhiyun return put_user(timeout_left, (int *)arg);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
pnx833x_wdt_notify_sys(struct notifier_block * this,unsigned long code,void * unused)204*4882a593Smuzhiyun static int pnx833x_wdt_notify_sys(struct notifier_block *this,
205*4882a593Smuzhiyun unsigned long code, void *unused)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun if (code == SYS_DOWN || code == SYS_HALT)
208*4882a593Smuzhiyun pnx833x_wdt_stop(); /* Turn the WDT off */
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun return NOTIFY_DONE;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun static const struct file_operations pnx833x_wdt_fops = {
214*4882a593Smuzhiyun .owner = THIS_MODULE,
215*4882a593Smuzhiyun .llseek = no_llseek,
216*4882a593Smuzhiyun .write = pnx833x_wdt_write,
217*4882a593Smuzhiyun .unlocked_ioctl = pnx833x_wdt_ioctl,
218*4882a593Smuzhiyun .compat_ioctl = compat_ptr_ioctl,
219*4882a593Smuzhiyun .open = pnx833x_wdt_open,
220*4882a593Smuzhiyun .release = pnx833x_wdt_release,
221*4882a593Smuzhiyun };
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun static struct miscdevice pnx833x_wdt_miscdev = {
224*4882a593Smuzhiyun .minor = WATCHDOG_MINOR,
225*4882a593Smuzhiyun .name = "watchdog",
226*4882a593Smuzhiyun .fops = &pnx833x_wdt_fops,
227*4882a593Smuzhiyun };
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun static struct notifier_block pnx833x_wdt_notifier = {
230*4882a593Smuzhiyun .notifier_call = pnx833x_wdt_notify_sys,
231*4882a593Smuzhiyun };
232*4882a593Smuzhiyun
watchdog_init(void)233*4882a593Smuzhiyun static int __init watchdog_init(void)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun int ret, cause;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun /* Lets check the reason for the reset.*/
238*4882a593Smuzhiyun cause = PNX833X_REG(PNX833X_RESET);
239*4882a593Smuzhiyun /*If bit 31 is set then watchdog was cause of reset.*/
240*4882a593Smuzhiyun if (cause & 0x80000000) {
241*4882a593Smuzhiyun pr_info("The system was previously reset due to the watchdog firing - please investigate...\n");
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun ret = register_reboot_notifier(&pnx833x_wdt_notifier);
245*4882a593Smuzhiyun if (ret) {
246*4882a593Smuzhiyun pr_err("cannot register reboot notifier (err=%d)\n", ret);
247*4882a593Smuzhiyun return ret;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun ret = misc_register(&pnx833x_wdt_miscdev);
251*4882a593Smuzhiyun if (ret) {
252*4882a593Smuzhiyun pr_err("cannot register miscdev on minor=%d (err=%d)\n",
253*4882a593Smuzhiyun WATCHDOG_MINOR, ret);
254*4882a593Smuzhiyun unregister_reboot_notifier(&pnx833x_wdt_notifier);
255*4882a593Smuzhiyun return ret;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun pr_info("Hardware Watchdog Timer for PNX833x: Version 0.1\n");
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun if (start_enabled)
261*4882a593Smuzhiyun pnx833x_wdt_start();
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun return 0;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
watchdog_exit(void)266*4882a593Smuzhiyun static void __exit watchdog_exit(void)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun misc_deregister(&pnx833x_wdt_miscdev);
269*4882a593Smuzhiyun unregister_reboot_notifier(&pnx833x_wdt_notifier);
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun module_init(watchdog_init);
273*4882a593Smuzhiyun module_exit(watchdog_exit);
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun MODULE_AUTHOR("Daniel Laird/Andre McCurdy");
276*4882a593Smuzhiyun MODULE_DESCRIPTION("Hardware Watchdog Device for PNX833x");
277*4882a593Smuzhiyun MODULE_LICENSE("GPL");
278