1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2016 National Instruments Corp.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/acpi.h>
7*4882a593Smuzhiyun #include <linux/bitops.h>
8*4882a593Smuzhiyun #include <linux/device.h>
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/watchdog.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define LOCK 0xA5
15*4882a593Smuzhiyun #define UNLOCK 0x5A
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define WDT_CTRL_RESET_EN BIT(7)
18*4882a593Smuzhiyun #define WDT_RELOAD_PORT_EN BIT(7)
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define WDT_CTRL 1
21*4882a593Smuzhiyun #define WDT_RELOAD_CTRL 2
22*4882a593Smuzhiyun #define WDT_PRESET_PRESCALE 4
23*4882a593Smuzhiyun #define WDT_REG_LOCK 5
24*4882a593Smuzhiyun #define WDT_COUNT 6
25*4882a593Smuzhiyun #define WDT_RELOAD_PORT 7
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define WDT_MIN_TIMEOUT 1
28*4882a593Smuzhiyun #define WDT_MAX_TIMEOUT 464
29*4882a593Smuzhiyun #define WDT_DEFAULT_TIMEOUT 80
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define WDT_MAX_COUNTER 15
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static unsigned int timeout;
34*4882a593Smuzhiyun module_param(timeout, uint, 0);
35*4882a593Smuzhiyun MODULE_PARM_DESC(timeout,
36*4882a593Smuzhiyun "Watchdog timeout in seconds. (default="
37*4882a593Smuzhiyun __MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static bool nowayout = WATCHDOG_NOWAYOUT;
40*4882a593Smuzhiyun module_param(nowayout, bool, 0);
41*4882a593Smuzhiyun MODULE_PARM_DESC(nowayout,
42*4882a593Smuzhiyun "Watchdog cannot be stopped once started. (default="
43*4882a593Smuzhiyun __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun struct nic7018_wdt {
46*4882a593Smuzhiyun u16 io_base;
47*4882a593Smuzhiyun u32 period;
48*4882a593Smuzhiyun struct watchdog_device wdd;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun struct nic7018_config {
52*4882a593Smuzhiyun u32 period;
53*4882a593Smuzhiyun u8 divider;
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun static const struct nic7018_config nic7018_configs[] = {
57*4882a593Smuzhiyun { 2, 4 },
58*4882a593Smuzhiyun { 32, 5 },
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
nic7018_timeout(u32 period,u8 counter)61*4882a593Smuzhiyun static inline u32 nic7018_timeout(u32 period, u8 counter)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun return period * counter - period / 2;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
nic7018_get_config(u32 timeout,u8 * counter)66*4882a593Smuzhiyun static const struct nic7018_config *nic7018_get_config(u32 timeout,
67*4882a593Smuzhiyun u8 *counter)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun const struct nic7018_config *config;
70*4882a593Smuzhiyun u8 count;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun if (timeout < 30 && timeout != 16) {
73*4882a593Smuzhiyun config = &nic7018_configs[0];
74*4882a593Smuzhiyun count = timeout / 2 + 1;
75*4882a593Smuzhiyun } else {
76*4882a593Smuzhiyun config = &nic7018_configs[1];
77*4882a593Smuzhiyun count = DIV_ROUND_UP(timeout + 16, 32);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun if (count > WDT_MAX_COUNTER)
80*4882a593Smuzhiyun count = WDT_MAX_COUNTER;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun *counter = count;
83*4882a593Smuzhiyun return config;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
nic7018_set_timeout(struct watchdog_device * wdd,unsigned int timeout)86*4882a593Smuzhiyun static int nic7018_set_timeout(struct watchdog_device *wdd,
87*4882a593Smuzhiyun unsigned int timeout)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun struct nic7018_wdt *wdt = watchdog_get_drvdata(wdd);
90*4882a593Smuzhiyun const struct nic7018_config *config;
91*4882a593Smuzhiyun u8 counter;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun config = nic7018_get_config(timeout, &counter);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun outb(counter << 4 | config->divider,
96*4882a593Smuzhiyun wdt->io_base + WDT_PRESET_PRESCALE);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun wdd->timeout = nic7018_timeout(config->period, counter);
99*4882a593Smuzhiyun wdt->period = config->period;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun return 0;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
nic7018_start(struct watchdog_device * wdd)104*4882a593Smuzhiyun static int nic7018_start(struct watchdog_device *wdd)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun struct nic7018_wdt *wdt = watchdog_get_drvdata(wdd);
107*4882a593Smuzhiyun u8 control;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun nic7018_set_timeout(wdd, wdd->timeout);
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun control = inb(wdt->io_base + WDT_RELOAD_CTRL);
112*4882a593Smuzhiyun outb(control | WDT_RELOAD_PORT_EN, wdt->io_base + WDT_RELOAD_CTRL);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun outb(1, wdt->io_base + WDT_RELOAD_PORT);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun control = inb(wdt->io_base + WDT_CTRL);
117*4882a593Smuzhiyun outb(control | WDT_CTRL_RESET_EN, wdt->io_base + WDT_CTRL);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun return 0;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
nic7018_stop(struct watchdog_device * wdd)122*4882a593Smuzhiyun static int nic7018_stop(struct watchdog_device *wdd)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun struct nic7018_wdt *wdt = watchdog_get_drvdata(wdd);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun outb(0, wdt->io_base + WDT_CTRL);
127*4882a593Smuzhiyun outb(0, wdt->io_base + WDT_RELOAD_CTRL);
128*4882a593Smuzhiyun outb(0xF0, wdt->io_base + WDT_PRESET_PRESCALE);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun return 0;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
nic7018_ping(struct watchdog_device * wdd)133*4882a593Smuzhiyun static int nic7018_ping(struct watchdog_device *wdd)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun struct nic7018_wdt *wdt = watchdog_get_drvdata(wdd);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun outb(1, wdt->io_base + WDT_RELOAD_PORT);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return 0;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
nic7018_get_timeleft(struct watchdog_device * wdd)142*4882a593Smuzhiyun static unsigned int nic7018_get_timeleft(struct watchdog_device *wdd)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun struct nic7018_wdt *wdt = watchdog_get_drvdata(wdd);
145*4882a593Smuzhiyun u8 count;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun count = inb(wdt->io_base + WDT_COUNT) & 0xF;
148*4882a593Smuzhiyun if (!count)
149*4882a593Smuzhiyun return 0;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun return nic7018_timeout(wdt->period, count);
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun static const struct watchdog_info nic7018_wdd_info = {
155*4882a593Smuzhiyun .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
156*4882a593Smuzhiyun .identity = "NIC7018 Watchdog",
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun static const struct watchdog_ops nic7018_wdd_ops = {
160*4882a593Smuzhiyun .owner = THIS_MODULE,
161*4882a593Smuzhiyun .start = nic7018_start,
162*4882a593Smuzhiyun .stop = nic7018_stop,
163*4882a593Smuzhiyun .ping = nic7018_ping,
164*4882a593Smuzhiyun .set_timeout = nic7018_set_timeout,
165*4882a593Smuzhiyun .get_timeleft = nic7018_get_timeleft,
166*4882a593Smuzhiyun };
167*4882a593Smuzhiyun
nic7018_probe(struct platform_device * pdev)168*4882a593Smuzhiyun static int nic7018_probe(struct platform_device *pdev)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct device *dev = &pdev->dev;
171*4882a593Smuzhiyun struct watchdog_device *wdd;
172*4882a593Smuzhiyun struct nic7018_wdt *wdt;
173*4882a593Smuzhiyun struct resource *io_rc;
174*4882a593Smuzhiyun int ret;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
177*4882a593Smuzhiyun if (!wdt)
178*4882a593Smuzhiyun return -ENOMEM;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun platform_set_drvdata(pdev, wdt);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun io_rc = platform_get_resource(pdev, IORESOURCE_IO, 0);
183*4882a593Smuzhiyun if (!io_rc) {
184*4882a593Smuzhiyun dev_err(dev, "missing IO resources\n");
185*4882a593Smuzhiyun return -EINVAL;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun if (!devm_request_region(dev, io_rc->start, resource_size(io_rc),
189*4882a593Smuzhiyun KBUILD_MODNAME)) {
190*4882a593Smuzhiyun dev_err(dev, "failed to get IO region\n");
191*4882a593Smuzhiyun return -EBUSY;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun wdt->io_base = io_rc->start;
195*4882a593Smuzhiyun wdd = &wdt->wdd;
196*4882a593Smuzhiyun wdd->info = &nic7018_wdd_info;
197*4882a593Smuzhiyun wdd->ops = &nic7018_wdd_ops;
198*4882a593Smuzhiyun wdd->min_timeout = WDT_MIN_TIMEOUT;
199*4882a593Smuzhiyun wdd->max_timeout = WDT_MAX_TIMEOUT;
200*4882a593Smuzhiyun wdd->timeout = WDT_DEFAULT_TIMEOUT;
201*4882a593Smuzhiyun wdd->parent = dev;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun watchdog_set_drvdata(wdd, wdt);
204*4882a593Smuzhiyun watchdog_set_nowayout(wdd, nowayout);
205*4882a593Smuzhiyun watchdog_init_timeout(wdd, timeout, dev);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun /* Unlock WDT register */
208*4882a593Smuzhiyun outb(UNLOCK, wdt->io_base + WDT_REG_LOCK);
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun ret = watchdog_register_device(wdd);
211*4882a593Smuzhiyun if (ret) {
212*4882a593Smuzhiyun outb(LOCK, wdt->io_base + WDT_REG_LOCK);
213*4882a593Smuzhiyun return ret;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun dev_dbg(dev, "io_base=0x%04X, timeout=%d, nowayout=%d\n",
217*4882a593Smuzhiyun wdt->io_base, timeout, nowayout);
218*4882a593Smuzhiyun return 0;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
nic7018_remove(struct platform_device * pdev)221*4882a593Smuzhiyun static int nic7018_remove(struct platform_device *pdev)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun struct nic7018_wdt *wdt = platform_get_drvdata(pdev);
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun watchdog_unregister_device(&wdt->wdd);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun /* Lock WDT register */
228*4882a593Smuzhiyun outb(LOCK, wdt->io_base + WDT_REG_LOCK);
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun return 0;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun static const struct acpi_device_id nic7018_device_ids[] = {
234*4882a593Smuzhiyun {"NIC7018", 0},
235*4882a593Smuzhiyun {"", 0},
236*4882a593Smuzhiyun };
237*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, nic7018_device_ids);
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun static struct platform_driver watchdog_driver = {
240*4882a593Smuzhiyun .probe = nic7018_probe,
241*4882a593Smuzhiyun .remove = nic7018_remove,
242*4882a593Smuzhiyun .driver = {
243*4882a593Smuzhiyun .name = KBUILD_MODNAME,
244*4882a593Smuzhiyun .acpi_match_table = ACPI_PTR(nic7018_device_ids),
245*4882a593Smuzhiyun },
246*4882a593Smuzhiyun };
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun module_platform_driver(watchdog_driver);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun MODULE_DESCRIPTION("National Instruments NIC7018 Watchdog driver");
251*4882a593Smuzhiyun MODULE_AUTHOR("Hui Chun Ong <hui.chun.ong@ni.com>");
252*4882a593Smuzhiyun MODULE_LICENSE("GPL");
253