1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2016 National Instruments Corp.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/acpi.h>
7*4882a593Smuzhiyun #include <linux/device.h>
8*4882a593Smuzhiyun #include <linux/interrupt.h>
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/watchdog.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define NIWD_CONTROL 0x01
14*4882a593Smuzhiyun #define NIWD_COUNTER2 0x02
15*4882a593Smuzhiyun #define NIWD_COUNTER1 0x03
16*4882a593Smuzhiyun #define NIWD_COUNTER0 0x04
17*4882a593Smuzhiyun #define NIWD_SEED2 0x05
18*4882a593Smuzhiyun #define NIWD_SEED1 0x06
19*4882a593Smuzhiyun #define NIWD_SEED0 0x07
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define NIWD_IO_SIZE 0x08
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define NIWD_CONTROL_MODE 0x80
24*4882a593Smuzhiyun #define NIWD_CONTROL_PROC_RESET 0x20
25*4882a593Smuzhiyun #define NIWD_CONTROL_PET 0x10
26*4882a593Smuzhiyun #define NIWD_CONTROL_RUNNING 0x08
27*4882a593Smuzhiyun #define NIWD_CONTROL_CAPTURECOUNTER 0x04
28*4882a593Smuzhiyun #define NIWD_CONTROL_RESET 0x02
29*4882a593Smuzhiyun #define NIWD_CONTROL_ALARM 0x01
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define NIWD_PERIOD_NS 30720
32*4882a593Smuzhiyun #define NIWD_MIN_TIMEOUT 1
33*4882a593Smuzhiyun #define NIWD_MAX_TIMEOUT 515
34*4882a593Smuzhiyun #define NIWD_DEFAULT_TIMEOUT 60
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define NIWD_NAME "ni903x_wdt"
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun struct ni903x_wdt {
39*4882a593Smuzhiyun struct device *dev;
40*4882a593Smuzhiyun u16 io_base;
41*4882a593Smuzhiyun struct watchdog_device wdd;
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun static unsigned int timeout;
45*4882a593Smuzhiyun module_param(timeout, uint, 0);
46*4882a593Smuzhiyun MODULE_PARM_DESC(timeout,
47*4882a593Smuzhiyun "Watchdog timeout in seconds. (default="
48*4882a593Smuzhiyun __MODULE_STRING(NIWD_DEFAULT_TIMEOUT) ")");
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun static int nowayout = WATCHDOG_NOWAYOUT;
51*4882a593Smuzhiyun module_param(nowayout, int, S_IRUGO);
52*4882a593Smuzhiyun MODULE_PARM_DESC(nowayout,
53*4882a593Smuzhiyun "Watchdog cannot be stopped once started (default="
54*4882a593Smuzhiyun __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
55*4882a593Smuzhiyun
ni903x_start(struct ni903x_wdt * wdt)56*4882a593Smuzhiyun static void ni903x_start(struct ni903x_wdt *wdt)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun u8 control = inb(wdt->io_base + NIWD_CONTROL);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun outb(control | NIWD_CONTROL_RESET, wdt->io_base + NIWD_CONTROL);
61*4882a593Smuzhiyun outb(control | NIWD_CONTROL_PET, wdt->io_base + NIWD_CONTROL);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
ni903x_wdd_set_timeout(struct watchdog_device * wdd,unsigned int timeout)64*4882a593Smuzhiyun static int ni903x_wdd_set_timeout(struct watchdog_device *wdd,
65*4882a593Smuzhiyun unsigned int timeout)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun struct ni903x_wdt *wdt = watchdog_get_drvdata(wdd);
68*4882a593Smuzhiyun u32 counter = timeout * (1000000000 / NIWD_PERIOD_NS);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun outb(((0x00FF0000 & counter) >> 16), wdt->io_base + NIWD_SEED2);
71*4882a593Smuzhiyun outb(((0x0000FF00 & counter) >> 8), wdt->io_base + NIWD_SEED1);
72*4882a593Smuzhiyun outb((0x000000FF & counter), wdt->io_base + NIWD_SEED0);
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun wdd->timeout = timeout;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun return 0;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
ni903x_wdd_get_timeleft(struct watchdog_device * wdd)79*4882a593Smuzhiyun static unsigned int ni903x_wdd_get_timeleft(struct watchdog_device *wdd)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun struct ni903x_wdt *wdt = watchdog_get_drvdata(wdd);
82*4882a593Smuzhiyun u8 control, counter0, counter1, counter2;
83*4882a593Smuzhiyun u32 counter;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun control = inb(wdt->io_base + NIWD_CONTROL);
86*4882a593Smuzhiyun control |= NIWD_CONTROL_CAPTURECOUNTER;
87*4882a593Smuzhiyun outb(control, wdt->io_base + NIWD_CONTROL);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun counter2 = inb(wdt->io_base + NIWD_COUNTER2);
90*4882a593Smuzhiyun counter1 = inb(wdt->io_base + NIWD_COUNTER1);
91*4882a593Smuzhiyun counter0 = inb(wdt->io_base + NIWD_COUNTER0);
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun counter = (counter2 << 16) | (counter1 << 8) | counter0;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun return counter / (1000000000 / NIWD_PERIOD_NS);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
ni903x_wdd_ping(struct watchdog_device * wdd)98*4882a593Smuzhiyun static int ni903x_wdd_ping(struct watchdog_device *wdd)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun struct ni903x_wdt *wdt = watchdog_get_drvdata(wdd);
101*4882a593Smuzhiyun u8 control;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun control = inb(wdt->io_base + NIWD_CONTROL);
104*4882a593Smuzhiyun outb(control | NIWD_CONTROL_PET, wdt->io_base + NIWD_CONTROL);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun return 0;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
ni903x_wdd_start(struct watchdog_device * wdd)109*4882a593Smuzhiyun static int ni903x_wdd_start(struct watchdog_device *wdd)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun struct ni903x_wdt *wdt = watchdog_get_drvdata(wdd);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun outb(NIWD_CONTROL_RESET | NIWD_CONTROL_PROC_RESET,
114*4882a593Smuzhiyun wdt->io_base + NIWD_CONTROL);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun ni903x_wdd_set_timeout(wdd, wdd->timeout);
117*4882a593Smuzhiyun ni903x_start(wdt);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun return 0;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
ni903x_wdd_stop(struct watchdog_device * wdd)122*4882a593Smuzhiyun static int ni903x_wdd_stop(struct watchdog_device *wdd)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun struct ni903x_wdt *wdt = watchdog_get_drvdata(wdd);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun outb(NIWD_CONTROL_RESET, wdt->io_base + NIWD_CONTROL);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun return 0;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
ni903x_resources(struct acpi_resource * res,void * data)131*4882a593Smuzhiyun static acpi_status ni903x_resources(struct acpi_resource *res, void *data)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun struct ni903x_wdt *wdt = data;
134*4882a593Smuzhiyun u16 io_size;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun switch (res->type) {
137*4882a593Smuzhiyun case ACPI_RESOURCE_TYPE_IO:
138*4882a593Smuzhiyun if (wdt->io_base != 0) {
139*4882a593Smuzhiyun dev_err(wdt->dev, "too many IO resources\n");
140*4882a593Smuzhiyun return AE_ERROR;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun wdt->io_base = res->data.io.minimum;
144*4882a593Smuzhiyun io_size = res->data.io.address_length;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun if (io_size < NIWD_IO_SIZE) {
147*4882a593Smuzhiyun dev_err(wdt->dev, "memory region too small\n");
148*4882a593Smuzhiyun return AE_ERROR;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun if (!devm_request_region(wdt->dev, wdt->io_base, io_size,
152*4882a593Smuzhiyun NIWD_NAME)) {
153*4882a593Smuzhiyun dev_err(wdt->dev, "failed to get memory region\n");
154*4882a593Smuzhiyun return AE_ERROR;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun return AE_OK;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun case ACPI_RESOURCE_TYPE_END_TAG:
160*4882a593Smuzhiyun default:
161*4882a593Smuzhiyun /* Ignore unsupported resources, e.g. IRQ */
162*4882a593Smuzhiyun return AE_OK;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun static const struct watchdog_info ni903x_wdd_info = {
167*4882a593Smuzhiyun .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
168*4882a593Smuzhiyun .identity = "NI Watchdog",
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun static const struct watchdog_ops ni903x_wdd_ops = {
172*4882a593Smuzhiyun .owner = THIS_MODULE,
173*4882a593Smuzhiyun .start = ni903x_wdd_start,
174*4882a593Smuzhiyun .stop = ni903x_wdd_stop,
175*4882a593Smuzhiyun .ping = ni903x_wdd_ping,
176*4882a593Smuzhiyun .set_timeout = ni903x_wdd_set_timeout,
177*4882a593Smuzhiyun .get_timeleft = ni903x_wdd_get_timeleft,
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun
ni903x_acpi_add(struct acpi_device * device)180*4882a593Smuzhiyun static int ni903x_acpi_add(struct acpi_device *device)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun struct device *dev = &device->dev;
183*4882a593Smuzhiyun struct watchdog_device *wdd;
184*4882a593Smuzhiyun struct ni903x_wdt *wdt;
185*4882a593Smuzhiyun acpi_status status;
186*4882a593Smuzhiyun int ret;
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
189*4882a593Smuzhiyun if (!wdt)
190*4882a593Smuzhiyun return -ENOMEM;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun device->driver_data = wdt;
193*4882a593Smuzhiyun wdt->dev = dev;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun status = acpi_walk_resources(device->handle, METHOD_NAME__CRS,
196*4882a593Smuzhiyun ni903x_resources, wdt);
197*4882a593Smuzhiyun if (ACPI_FAILURE(status) || wdt->io_base == 0) {
198*4882a593Smuzhiyun dev_err(dev, "failed to get resources\n");
199*4882a593Smuzhiyun return -ENODEV;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun wdd = &wdt->wdd;
203*4882a593Smuzhiyun wdd->info = &ni903x_wdd_info;
204*4882a593Smuzhiyun wdd->ops = &ni903x_wdd_ops;
205*4882a593Smuzhiyun wdd->min_timeout = NIWD_MIN_TIMEOUT;
206*4882a593Smuzhiyun wdd->max_timeout = NIWD_MAX_TIMEOUT;
207*4882a593Smuzhiyun wdd->timeout = NIWD_DEFAULT_TIMEOUT;
208*4882a593Smuzhiyun wdd->parent = dev;
209*4882a593Smuzhiyun watchdog_set_drvdata(wdd, wdt);
210*4882a593Smuzhiyun watchdog_set_nowayout(wdd, nowayout);
211*4882a593Smuzhiyun watchdog_init_timeout(wdd, timeout, dev);
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun ret = watchdog_register_device(wdd);
214*4882a593Smuzhiyun if (ret)
215*4882a593Smuzhiyun return ret;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun /* Switch from boot mode to user mode */
218*4882a593Smuzhiyun outb(NIWD_CONTROL_RESET | NIWD_CONTROL_MODE,
219*4882a593Smuzhiyun wdt->io_base + NIWD_CONTROL);
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun dev_dbg(dev, "io_base=0x%04X, timeout=%d, nowayout=%d\n",
222*4882a593Smuzhiyun wdt->io_base, timeout, nowayout);
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun return 0;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
ni903x_acpi_remove(struct acpi_device * device)227*4882a593Smuzhiyun static int ni903x_acpi_remove(struct acpi_device *device)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun struct ni903x_wdt *wdt = acpi_driver_data(device);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun ni903x_wdd_stop(&wdt->wdd);
232*4882a593Smuzhiyun watchdog_unregister_device(&wdt->wdd);
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun return 0;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun static const struct acpi_device_id ni903x_device_ids[] = {
238*4882a593Smuzhiyun {"NIC775C", 0},
239*4882a593Smuzhiyun {"", 0},
240*4882a593Smuzhiyun };
241*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, ni903x_device_ids);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun static struct acpi_driver ni903x_acpi_driver = {
244*4882a593Smuzhiyun .name = NIWD_NAME,
245*4882a593Smuzhiyun .ids = ni903x_device_ids,
246*4882a593Smuzhiyun .ops = {
247*4882a593Smuzhiyun .add = ni903x_acpi_add,
248*4882a593Smuzhiyun .remove = ni903x_acpi_remove,
249*4882a593Smuzhiyun },
250*4882a593Smuzhiyun };
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun module_acpi_driver(ni903x_acpi_driver);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun MODULE_DESCRIPTION("NI 903x Watchdog");
255*4882a593Smuzhiyun MODULE_AUTHOR("Jeff Westfahl <jeff.westfahl@ni.com>");
256*4882a593Smuzhiyun MODULE_AUTHOR("Kyle Roeschley <kyle.roeschley@ni.com>");
257*4882a593Smuzhiyun MODULE_LICENSE("GPL");
258