xref: /OK3568_Linux_fs/kernel/drivers/watchdog/meson_wdt.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *      Meson Watchdog Driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *      Copyright (c) 2014 Carlo Caione
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/clk.h>
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/io.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/moduleparam.h>
16*4882a593Smuzhiyun #include <linux/of.h>
17*4882a593Smuzhiyun #include <linux/of_device.h>
18*4882a593Smuzhiyun #include <linux/platform_device.h>
19*4882a593Smuzhiyun #include <linux/types.h>
20*4882a593Smuzhiyun #include <linux/watchdog.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define DRV_NAME		"meson_wdt"
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define MESON_WDT_TC		0x00
25*4882a593Smuzhiyun #define MESON_WDT_DC_RESET	(3 << 24)
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define MESON_WDT_RESET		0x04
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define MESON_WDT_TIMEOUT	30
30*4882a593Smuzhiyun #define MESON_WDT_MIN_TIMEOUT	1
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define MESON_SEC_TO_TC(s, c)	((s) * (c))
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun static bool nowayout = WATCHDOG_NOWAYOUT;
35*4882a593Smuzhiyun static unsigned int timeout;
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun struct meson_wdt_data {
38*4882a593Smuzhiyun 	unsigned int enable;
39*4882a593Smuzhiyun 	unsigned int terminal_count_mask;
40*4882a593Smuzhiyun 	unsigned int count_unit;
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun static struct meson_wdt_data meson6_wdt_data = {
44*4882a593Smuzhiyun 	.enable			= BIT(22),
45*4882a593Smuzhiyun 	.terminal_count_mask	= 0x3fffff,
46*4882a593Smuzhiyun 	.count_unit		= 100000, /* 10 us */
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun static struct meson_wdt_data meson8b_wdt_data = {
50*4882a593Smuzhiyun 	.enable			= BIT(19),
51*4882a593Smuzhiyun 	.terminal_count_mask	= 0xffff,
52*4882a593Smuzhiyun 	.count_unit		= 7812, /* 128 us */
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun struct meson_wdt_dev {
56*4882a593Smuzhiyun 	struct watchdog_device wdt_dev;
57*4882a593Smuzhiyun 	void __iomem *wdt_base;
58*4882a593Smuzhiyun 	const struct meson_wdt_data *data;
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun 
meson_wdt_restart(struct watchdog_device * wdt_dev,unsigned long action,void * data)61*4882a593Smuzhiyun static int meson_wdt_restart(struct watchdog_device *wdt_dev,
62*4882a593Smuzhiyun 			     unsigned long action, void *data)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun 	struct meson_wdt_dev *meson_wdt = watchdog_get_drvdata(wdt_dev);
65*4882a593Smuzhiyun 	u32 tc_reboot = MESON_WDT_DC_RESET;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	tc_reboot |= meson_wdt->data->enable;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	while (1) {
70*4882a593Smuzhiyun 		writel(tc_reboot, meson_wdt->wdt_base + MESON_WDT_TC);
71*4882a593Smuzhiyun 		mdelay(5);
72*4882a593Smuzhiyun 	}
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	return 0;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun 
meson_wdt_ping(struct watchdog_device * wdt_dev)77*4882a593Smuzhiyun static int meson_wdt_ping(struct watchdog_device *wdt_dev)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	struct meson_wdt_dev *meson_wdt = watchdog_get_drvdata(wdt_dev);
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	writel(0, meson_wdt->wdt_base + MESON_WDT_RESET);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	return 0;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun 
meson_wdt_change_timeout(struct watchdog_device * wdt_dev,unsigned int timeout)86*4882a593Smuzhiyun static void meson_wdt_change_timeout(struct watchdog_device *wdt_dev,
87*4882a593Smuzhiyun 				     unsigned int timeout)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun 	struct meson_wdt_dev *meson_wdt = watchdog_get_drvdata(wdt_dev);
90*4882a593Smuzhiyun 	u32 reg;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	reg = readl(meson_wdt->wdt_base + MESON_WDT_TC);
93*4882a593Smuzhiyun 	reg &= ~meson_wdt->data->terminal_count_mask;
94*4882a593Smuzhiyun 	reg |= MESON_SEC_TO_TC(timeout, meson_wdt->data->count_unit);
95*4882a593Smuzhiyun 	writel(reg, meson_wdt->wdt_base + MESON_WDT_TC);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
meson_wdt_set_timeout(struct watchdog_device * wdt_dev,unsigned int timeout)98*4882a593Smuzhiyun static int meson_wdt_set_timeout(struct watchdog_device *wdt_dev,
99*4882a593Smuzhiyun 				 unsigned int timeout)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	wdt_dev->timeout = timeout;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	meson_wdt_change_timeout(wdt_dev, timeout);
104*4882a593Smuzhiyun 	meson_wdt_ping(wdt_dev);
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	return 0;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
meson_wdt_stop(struct watchdog_device * wdt_dev)109*4882a593Smuzhiyun static int meson_wdt_stop(struct watchdog_device *wdt_dev)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	struct meson_wdt_dev *meson_wdt = watchdog_get_drvdata(wdt_dev);
112*4882a593Smuzhiyun 	u32 reg;
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	reg = readl(meson_wdt->wdt_base + MESON_WDT_TC);
115*4882a593Smuzhiyun 	reg &= ~meson_wdt->data->enable;
116*4882a593Smuzhiyun 	writel(reg, meson_wdt->wdt_base + MESON_WDT_TC);
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	return 0;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun 
meson_wdt_start(struct watchdog_device * wdt_dev)121*4882a593Smuzhiyun static int meson_wdt_start(struct watchdog_device *wdt_dev)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun 	struct meson_wdt_dev *meson_wdt = watchdog_get_drvdata(wdt_dev);
124*4882a593Smuzhiyun 	u32 reg;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	meson_wdt_change_timeout(wdt_dev, meson_wdt->wdt_dev.timeout);
127*4882a593Smuzhiyun 	meson_wdt_ping(wdt_dev);
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	reg = readl(meson_wdt->wdt_base + MESON_WDT_TC);
130*4882a593Smuzhiyun 	reg |= meson_wdt->data->enable;
131*4882a593Smuzhiyun 	writel(reg, meson_wdt->wdt_base + MESON_WDT_TC);
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	return 0;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun static const struct watchdog_info meson_wdt_info = {
137*4882a593Smuzhiyun 	.identity	= DRV_NAME,
138*4882a593Smuzhiyun 	.options	= WDIOF_SETTIMEOUT |
139*4882a593Smuzhiyun 			  WDIOF_KEEPALIVEPING |
140*4882a593Smuzhiyun 			  WDIOF_MAGICCLOSE,
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun static const struct watchdog_ops meson_wdt_ops = {
144*4882a593Smuzhiyun 	.owner		= THIS_MODULE,
145*4882a593Smuzhiyun 	.start		= meson_wdt_start,
146*4882a593Smuzhiyun 	.stop		= meson_wdt_stop,
147*4882a593Smuzhiyun 	.ping		= meson_wdt_ping,
148*4882a593Smuzhiyun 	.set_timeout	= meson_wdt_set_timeout,
149*4882a593Smuzhiyun 	.restart        = meson_wdt_restart,
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun static const struct of_device_id meson_wdt_dt_ids[] = {
153*4882a593Smuzhiyun 	{ .compatible = "amlogic,meson6-wdt", .data = &meson6_wdt_data },
154*4882a593Smuzhiyun 	{ .compatible = "amlogic,meson8-wdt", .data = &meson6_wdt_data },
155*4882a593Smuzhiyun 	{ .compatible = "amlogic,meson8b-wdt", .data = &meson8b_wdt_data },
156*4882a593Smuzhiyun 	{ .compatible = "amlogic,meson8m2-wdt", .data = &meson8b_wdt_data },
157*4882a593Smuzhiyun 	{ /* sentinel */ }
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, meson_wdt_dt_ids);
160*4882a593Smuzhiyun 
meson_wdt_probe(struct platform_device * pdev)161*4882a593Smuzhiyun static int meson_wdt_probe(struct platform_device *pdev)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
164*4882a593Smuzhiyun 	struct meson_wdt_dev *meson_wdt;
165*4882a593Smuzhiyun 	const struct of_device_id *of_id;
166*4882a593Smuzhiyun 	int err;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	meson_wdt = devm_kzalloc(dev, sizeof(*meson_wdt), GFP_KERNEL);
169*4882a593Smuzhiyun 	if (!meson_wdt)
170*4882a593Smuzhiyun 		return -ENOMEM;
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	meson_wdt->wdt_base = devm_platform_ioremap_resource(pdev, 0);
173*4882a593Smuzhiyun 	if (IS_ERR(meson_wdt->wdt_base))
174*4882a593Smuzhiyun 		return PTR_ERR(meson_wdt->wdt_base);
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	of_id = of_match_device(meson_wdt_dt_ids, dev);
177*4882a593Smuzhiyun 	if (!of_id) {
178*4882a593Smuzhiyun 		dev_err(dev, "Unable to initialize WDT data\n");
179*4882a593Smuzhiyun 		return -ENODEV;
180*4882a593Smuzhiyun 	}
181*4882a593Smuzhiyun 	meson_wdt->data = of_id->data;
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	meson_wdt->wdt_dev.parent = dev;
184*4882a593Smuzhiyun 	meson_wdt->wdt_dev.info = &meson_wdt_info;
185*4882a593Smuzhiyun 	meson_wdt->wdt_dev.ops = &meson_wdt_ops;
186*4882a593Smuzhiyun 	meson_wdt->wdt_dev.max_timeout =
187*4882a593Smuzhiyun 		meson_wdt->data->terminal_count_mask / meson_wdt->data->count_unit;
188*4882a593Smuzhiyun 	meson_wdt->wdt_dev.min_timeout = MESON_WDT_MIN_TIMEOUT;
189*4882a593Smuzhiyun 	meson_wdt->wdt_dev.timeout = min_t(unsigned int,
190*4882a593Smuzhiyun 					   MESON_WDT_TIMEOUT,
191*4882a593Smuzhiyun 					   meson_wdt->wdt_dev.max_timeout);
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	watchdog_set_drvdata(&meson_wdt->wdt_dev, meson_wdt);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	watchdog_init_timeout(&meson_wdt->wdt_dev, timeout, dev);
196*4882a593Smuzhiyun 	watchdog_set_nowayout(&meson_wdt->wdt_dev, nowayout);
197*4882a593Smuzhiyun 	watchdog_set_restart_priority(&meson_wdt->wdt_dev, 128);
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	meson_wdt_stop(&meson_wdt->wdt_dev);
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	watchdog_stop_on_reboot(&meson_wdt->wdt_dev);
202*4882a593Smuzhiyun 	err = devm_watchdog_register_device(dev, &meson_wdt->wdt_dev);
203*4882a593Smuzhiyun 	if (err)
204*4882a593Smuzhiyun 		return err;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	dev_info(dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
207*4882a593Smuzhiyun 		 meson_wdt->wdt_dev.timeout, nowayout);
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	return 0;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun static struct platform_driver meson_wdt_driver = {
213*4882a593Smuzhiyun 	.probe		= meson_wdt_probe,
214*4882a593Smuzhiyun 	.driver		= {
215*4882a593Smuzhiyun 		.name		= DRV_NAME,
216*4882a593Smuzhiyun 		.of_match_table	= meson_wdt_dt_ids,
217*4882a593Smuzhiyun 	},
218*4882a593Smuzhiyun };
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun module_platform_driver(meson_wdt_driver);
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun module_param(timeout, uint, 0);
223*4882a593Smuzhiyun MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun module_param(nowayout, bool, 0);
226*4882a593Smuzhiyun MODULE_PARM_DESC(nowayout,
227*4882a593Smuzhiyun 		 "Watchdog cannot be stopped once started (default="
228*4882a593Smuzhiyun 		 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun MODULE_LICENSE("GPL");
231*4882a593Smuzhiyun MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
232*4882a593Smuzhiyun MODULE_DESCRIPTION("Meson Watchdog Timer Driver");
233