xref: /OK3568_Linux_fs/kernel/drivers/watchdog/menz69_wdt.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Watchdog driver for the MEN z069 IP-Core
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2018 Johannes Thumshirn <jth@kernel.org>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #include <linux/io.h>
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/mcb.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/watchdog.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun struct men_z069_drv {
14*4882a593Smuzhiyun 	struct watchdog_device wdt;
15*4882a593Smuzhiyun 	void __iomem *base;
16*4882a593Smuzhiyun 	struct resource *mem;
17*4882a593Smuzhiyun };
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define MEN_Z069_WTR			0x10
20*4882a593Smuzhiyun #define MEN_Z069_WTR_WDEN		BIT(15)
21*4882a593Smuzhiyun #define MEN_Z069_WTR_WDET_MASK		0x7fff
22*4882a593Smuzhiyun #define MEN_Z069_WVR			0x14
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define MEN_Z069_TIMER_FREQ		500 /* 500 Hz */
25*4882a593Smuzhiyun #define MEN_Z069_WDT_COUNTER_MIN	1
26*4882a593Smuzhiyun #define MEN_Z069_WDT_COUNTER_MAX	0x7fff
27*4882a593Smuzhiyun #define MEN_Z069_DEFAULT_TIMEOUT	30
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun static bool nowayout = WATCHDOG_NOWAYOUT;
30*4882a593Smuzhiyun module_param(nowayout, bool, 0);
31*4882a593Smuzhiyun MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
32*4882a593Smuzhiyun 			    __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
33*4882a593Smuzhiyun 
men_z069_wdt_start(struct watchdog_device * wdt)34*4882a593Smuzhiyun static int men_z069_wdt_start(struct watchdog_device *wdt)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	struct men_z069_drv *drv = watchdog_get_drvdata(wdt);
37*4882a593Smuzhiyun 	u16 val;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	val = readw(drv->base + MEN_Z069_WTR);
40*4882a593Smuzhiyun 	val |= MEN_Z069_WTR_WDEN;
41*4882a593Smuzhiyun 	writew(val, drv->base + MEN_Z069_WTR);
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	return 0;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun 
men_z069_wdt_stop(struct watchdog_device * wdt)46*4882a593Smuzhiyun static int men_z069_wdt_stop(struct watchdog_device *wdt)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	struct men_z069_drv *drv = watchdog_get_drvdata(wdt);
49*4882a593Smuzhiyun 	u16 val;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	val = readw(drv->base + MEN_Z069_WTR);
52*4882a593Smuzhiyun 	val &= ~MEN_Z069_WTR_WDEN;
53*4882a593Smuzhiyun 	writew(val, drv->base + MEN_Z069_WTR);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	return 0;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun 
men_z069_wdt_ping(struct watchdog_device * wdt)58*4882a593Smuzhiyun static int men_z069_wdt_ping(struct watchdog_device *wdt)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun 	struct men_z069_drv *drv = watchdog_get_drvdata(wdt);
61*4882a593Smuzhiyun 	u16 val;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	/* The watchdog trigger value toggles between 0x5555 and 0xaaaa */
64*4882a593Smuzhiyun 	val = readw(drv->base + MEN_Z069_WVR);
65*4882a593Smuzhiyun 	val ^= 0xffff;
66*4882a593Smuzhiyun 	writew(val, drv->base + MEN_Z069_WVR);
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	return 0;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun 
men_z069_wdt_set_timeout(struct watchdog_device * wdt,unsigned int timeout)71*4882a593Smuzhiyun static int men_z069_wdt_set_timeout(struct watchdog_device *wdt,
72*4882a593Smuzhiyun 				    unsigned int timeout)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	struct men_z069_drv *drv = watchdog_get_drvdata(wdt);
75*4882a593Smuzhiyun 	u16 reg, val, ena;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	wdt->timeout = timeout;
78*4882a593Smuzhiyun 	val = timeout * MEN_Z069_TIMER_FREQ;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	reg = readw(drv->base + MEN_Z069_WVR);
81*4882a593Smuzhiyun 	ena = reg & MEN_Z069_WTR_WDEN;
82*4882a593Smuzhiyun 	reg = ena | val;
83*4882a593Smuzhiyun 	writew(reg, drv->base + MEN_Z069_WTR);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	return 0;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun static const struct watchdog_info men_z069_info = {
89*4882a593Smuzhiyun 	.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
90*4882a593Smuzhiyun 	.identity = "MEN z069 Watchdog",
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun static const struct watchdog_ops men_z069_ops = {
94*4882a593Smuzhiyun 	.owner = THIS_MODULE,
95*4882a593Smuzhiyun 	.start = men_z069_wdt_start,
96*4882a593Smuzhiyun 	.stop = men_z069_wdt_stop,
97*4882a593Smuzhiyun 	.ping = men_z069_wdt_ping,
98*4882a593Smuzhiyun 	.set_timeout = men_z069_wdt_set_timeout,
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun static struct watchdog_device men_z069_wdt = {
102*4882a593Smuzhiyun 	.info = &men_z069_info,
103*4882a593Smuzhiyun 	.ops = &men_z069_ops,
104*4882a593Smuzhiyun 	.timeout = MEN_Z069_DEFAULT_TIMEOUT,
105*4882a593Smuzhiyun 	.min_timeout = 1,
106*4882a593Smuzhiyun 	.max_timeout = MEN_Z069_WDT_COUNTER_MAX / MEN_Z069_TIMER_FREQ,
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun 
men_z069_probe(struct mcb_device * dev,const struct mcb_device_id * id)109*4882a593Smuzhiyun static int men_z069_probe(struct mcb_device *dev,
110*4882a593Smuzhiyun 			  const struct mcb_device_id *id)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	struct men_z069_drv *drv;
113*4882a593Smuzhiyun 	struct resource *mem;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	drv = devm_kzalloc(&dev->dev, sizeof(struct men_z069_drv), GFP_KERNEL);
116*4882a593Smuzhiyun 	if (!drv)
117*4882a593Smuzhiyun 		return -ENOMEM;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	mem = mcb_request_mem(dev, "z069-wdt");
120*4882a593Smuzhiyun 	if (IS_ERR(mem))
121*4882a593Smuzhiyun 		return PTR_ERR(mem);
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	drv->base = devm_ioremap(&dev->dev, mem->start, resource_size(mem));
124*4882a593Smuzhiyun 	if (drv->base == NULL)
125*4882a593Smuzhiyun 		goto release_mem;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	drv->mem = mem;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	drv->wdt = men_z069_wdt;
130*4882a593Smuzhiyun 	watchdog_init_timeout(&drv->wdt, 0, &dev->dev);
131*4882a593Smuzhiyun 	watchdog_set_nowayout(&drv->wdt, nowayout);
132*4882a593Smuzhiyun 	watchdog_set_drvdata(&drv->wdt, drv);
133*4882a593Smuzhiyun 	drv->wdt.parent = &dev->dev;
134*4882a593Smuzhiyun 	mcb_set_drvdata(dev, drv);
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	return watchdog_register_device(&men_z069_wdt);
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun release_mem:
139*4882a593Smuzhiyun 	mcb_release_mem(mem);
140*4882a593Smuzhiyun 	return -ENOMEM;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun 
men_z069_remove(struct mcb_device * dev)143*4882a593Smuzhiyun static void men_z069_remove(struct mcb_device *dev)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun 	struct men_z069_drv *drv = mcb_get_drvdata(dev);
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	watchdog_unregister_device(&drv->wdt);
148*4882a593Smuzhiyun 	mcb_release_mem(drv->mem);
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun static const struct mcb_device_id men_z069_ids[] = {
152*4882a593Smuzhiyun 	{ .device = 0x45 },
153*4882a593Smuzhiyun 	{ }
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun MODULE_DEVICE_TABLE(mcb, men_z069_ids);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun static struct mcb_driver men_z069_driver = {
158*4882a593Smuzhiyun 	.driver = {
159*4882a593Smuzhiyun 		.name = "z069-wdt",
160*4882a593Smuzhiyun 		.owner = THIS_MODULE,
161*4882a593Smuzhiyun 	},
162*4882a593Smuzhiyun 	.probe = men_z069_probe,
163*4882a593Smuzhiyun 	.remove = men_z069_remove,
164*4882a593Smuzhiyun 	.id_table = men_z069_ids,
165*4882a593Smuzhiyun };
166*4882a593Smuzhiyun module_mcb_driver(men_z069_driver);
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun MODULE_AUTHOR("Johannes Thumshirn <jth@kernel.org>");
169*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
170*4882a593Smuzhiyun MODULE_ALIAS("mcb:16z069");
171*4882a593Smuzhiyun MODULE_IMPORT_NS(MCB);
172