xref: /OK3568_Linux_fs/kernel/drivers/watchdog/intel-mid_wdt.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *      intel-mid_wdt: generic Intel MID SCU watchdog driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *      Platforms supported so far:
6*4882a593Smuzhiyun  *      - Merrifield only
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  *      Copyright (C) 2014 Intel Corporation. All rights reserved.
9*4882a593Smuzhiyun  *      Contact: David Cohen <david.a.cohen@linux.intel.com>
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/nmi.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/watchdog.h>
17*4882a593Smuzhiyun #include <linux/platform_data/intel-mid_wdt.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <asm/intel_scu_ipc.h>
20*4882a593Smuzhiyun #include <asm/intel-mid.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define IPC_WATCHDOG 0xf8
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define MID_WDT_PRETIMEOUT		15
25*4882a593Smuzhiyun #define MID_WDT_TIMEOUT_MIN		(1 + MID_WDT_PRETIMEOUT)
26*4882a593Smuzhiyun #define MID_WDT_TIMEOUT_MAX		170
27*4882a593Smuzhiyun #define MID_WDT_DEFAULT_TIMEOUT		90
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /* SCU watchdog messages */
30*4882a593Smuzhiyun enum {
31*4882a593Smuzhiyun 	SCU_WATCHDOG_START = 0,
32*4882a593Smuzhiyun 	SCU_WATCHDOG_STOP,
33*4882a593Smuzhiyun 	SCU_WATCHDOG_KEEPALIVE,
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun struct mid_wdt {
37*4882a593Smuzhiyun 	struct watchdog_device wd;
38*4882a593Smuzhiyun 	struct device *dev;
39*4882a593Smuzhiyun 	struct intel_scu_ipc_dev *scu;
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun static inline int
wdt_command(struct mid_wdt * mid,int sub,const void * in,size_t inlen,size_t size)43*4882a593Smuzhiyun wdt_command(struct mid_wdt *mid, int sub, const void *in, size_t inlen, size_t size)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	struct intel_scu_ipc_dev *scu = mid->scu;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	return intel_scu_ipc_dev_command_with_size(scu, IPC_WATCHDOG, sub, in,
48*4882a593Smuzhiyun 						   inlen, size, NULL, 0);
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun 
wdt_start(struct watchdog_device * wd)51*4882a593Smuzhiyun static int wdt_start(struct watchdog_device *wd)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	struct mid_wdt *mid = watchdog_get_drvdata(wd);
54*4882a593Smuzhiyun 	int ret, in_size;
55*4882a593Smuzhiyun 	int timeout = wd->timeout;
56*4882a593Smuzhiyun 	struct ipc_wd_start {
57*4882a593Smuzhiyun 		u32 pretimeout;
58*4882a593Smuzhiyun 		u32 timeout;
59*4882a593Smuzhiyun 	} ipc_wd_start = { timeout - MID_WDT_PRETIMEOUT, timeout };
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	/*
62*4882a593Smuzhiyun 	 * SCU expects the input size for watchdog IPC to be 2 which is the
63*4882a593Smuzhiyun 	 * size of the structure in dwords. SCU IPC normally takes bytes
64*4882a593Smuzhiyun 	 * but this is a special case where we specify size to be different
65*4882a593Smuzhiyun 	 * than inlen.
66*4882a593Smuzhiyun 	 */
67*4882a593Smuzhiyun 	in_size = DIV_ROUND_UP(sizeof(ipc_wd_start), 4);
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	ret = wdt_command(mid, SCU_WATCHDOG_START, &ipc_wd_start,
70*4882a593Smuzhiyun 			  sizeof(ipc_wd_start), in_size);
71*4882a593Smuzhiyun 	if (ret)
72*4882a593Smuzhiyun 		dev_crit(mid->dev, "error starting watchdog: %d\n", ret);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	return ret;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun 
wdt_ping(struct watchdog_device * wd)77*4882a593Smuzhiyun static int wdt_ping(struct watchdog_device *wd)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	struct mid_wdt *mid = watchdog_get_drvdata(wd);
80*4882a593Smuzhiyun 	int ret;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	ret = wdt_command(mid, SCU_WATCHDOG_KEEPALIVE, NULL, 0, 0);
83*4882a593Smuzhiyun 	if (ret)
84*4882a593Smuzhiyun 		dev_crit(mid->dev, "Error executing keepalive: %d\n", ret);
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	return ret;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
wdt_stop(struct watchdog_device * wd)89*4882a593Smuzhiyun static int wdt_stop(struct watchdog_device *wd)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	struct mid_wdt *mid = watchdog_get_drvdata(wd);
92*4882a593Smuzhiyun 	int ret;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	ret = wdt_command(mid, SCU_WATCHDOG_STOP, NULL, 0, 0);
95*4882a593Smuzhiyun 	if (ret)
96*4882a593Smuzhiyun 		dev_crit(mid->dev, "Error stopping watchdog: %d\n", ret);
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	return ret;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun 
mid_wdt_irq(int irq,void * dev_id)101*4882a593Smuzhiyun static irqreturn_t mid_wdt_irq(int irq, void *dev_id)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	panic("Kernel Watchdog");
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	/* This code should not be reached */
106*4882a593Smuzhiyun 	return IRQ_HANDLED;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun static const struct watchdog_info mid_wdt_info = {
110*4882a593Smuzhiyun 	.identity = "Intel MID SCU watchdog",
111*4882a593Smuzhiyun 	.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun static const struct watchdog_ops mid_wdt_ops = {
115*4882a593Smuzhiyun 	.owner = THIS_MODULE,
116*4882a593Smuzhiyun 	.start = wdt_start,
117*4882a593Smuzhiyun 	.stop = wdt_stop,
118*4882a593Smuzhiyun 	.ping = wdt_ping,
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
mid_wdt_probe(struct platform_device * pdev)121*4882a593Smuzhiyun static int mid_wdt_probe(struct platform_device *pdev)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
124*4882a593Smuzhiyun 	struct watchdog_device *wdt_dev;
125*4882a593Smuzhiyun 	struct intel_mid_wdt_pdata *pdata = dev->platform_data;
126*4882a593Smuzhiyun 	struct mid_wdt *mid;
127*4882a593Smuzhiyun 	int ret;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	if (!pdata) {
130*4882a593Smuzhiyun 		dev_err(dev, "missing platform data\n");
131*4882a593Smuzhiyun 		return -EINVAL;
132*4882a593Smuzhiyun 	}
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	if (pdata->probe) {
135*4882a593Smuzhiyun 		ret = pdata->probe(pdev);
136*4882a593Smuzhiyun 		if (ret)
137*4882a593Smuzhiyun 			return ret;
138*4882a593Smuzhiyun 	}
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	mid = devm_kzalloc(dev, sizeof(*mid), GFP_KERNEL);
141*4882a593Smuzhiyun 	if (!mid)
142*4882a593Smuzhiyun 		return -ENOMEM;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	mid->dev = dev;
145*4882a593Smuzhiyun 	wdt_dev = &mid->wd;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	wdt_dev->info = &mid_wdt_info;
148*4882a593Smuzhiyun 	wdt_dev->ops = &mid_wdt_ops;
149*4882a593Smuzhiyun 	wdt_dev->min_timeout = MID_WDT_TIMEOUT_MIN;
150*4882a593Smuzhiyun 	wdt_dev->max_timeout = MID_WDT_TIMEOUT_MAX;
151*4882a593Smuzhiyun 	wdt_dev->timeout = MID_WDT_DEFAULT_TIMEOUT;
152*4882a593Smuzhiyun 	wdt_dev->parent = dev;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	watchdog_set_nowayout(wdt_dev, WATCHDOG_NOWAYOUT);
155*4882a593Smuzhiyun 	watchdog_set_drvdata(wdt_dev, mid);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	mid->scu = devm_intel_scu_ipc_dev_get(dev);
158*4882a593Smuzhiyun 	if (!mid->scu)
159*4882a593Smuzhiyun 		return -EPROBE_DEFER;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	ret = devm_request_irq(dev, pdata->irq, mid_wdt_irq,
162*4882a593Smuzhiyun 			       IRQF_SHARED | IRQF_NO_SUSPEND, "watchdog",
163*4882a593Smuzhiyun 			       wdt_dev);
164*4882a593Smuzhiyun 	if (ret) {
165*4882a593Smuzhiyun 		dev_err(dev, "error requesting warning irq %d\n", pdata->irq);
166*4882a593Smuzhiyun 		return ret;
167*4882a593Smuzhiyun 	}
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	/*
170*4882a593Smuzhiyun 	 * The firmware followed by U-Boot leaves the watchdog running
171*4882a593Smuzhiyun 	 * with the default threshold which may vary. When we get here
172*4882a593Smuzhiyun 	 * we should make a decision to prevent any side effects before
173*4882a593Smuzhiyun 	 * user space daemon will take care of it. The best option,
174*4882a593Smuzhiyun 	 * taking into consideration that there is no way to read values
175*4882a593Smuzhiyun 	 * back from hardware, is to enforce watchdog being run with
176*4882a593Smuzhiyun 	 * deterministic values.
177*4882a593Smuzhiyun 	 */
178*4882a593Smuzhiyun 	ret = wdt_start(wdt_dev);
179*4882a593Smuzhiyun 	if (ret)
180*4882a593Smuzhiyun 		return ret;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	/* Make sure the watchdog is serviced */
183*4882a593Smuzhiyun 	set_bit(WDOG_HW_RUNNING, &wdt_dev->status);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	ret = devm_watchdog_register_device(dev, wdt_dev);
186*4882a593Smuzhiyun 	if (ret)
187*4882a593Smuzhiyun 		return ret;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	dev_info(dev, "Intel MID watchdog device probed\n");
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	return 0;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun static struct platform_driver mid_wdt_driver = {
195*4882a593Smuzhiyun 	.probe		= mid_wdt_probe,
196*4882a593Smuzhiyun 	.driver		= {
197*4882a593Smuzhiyun 		.name	= "intel_mid_wdt",
198*4882a593Smuzhiyun 	},
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun module_platform_driver(mid_wdt_driver);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun MODULE_AUTHOR("David Cohen <david.a.cohen@linux.intel.com>");
204*4882a593Smuzhiyun MODULE_DESCRIPTION("Watchdog Driver for Intel MID platform");
205*4882a593Smuzhiyun MODULE_LICENSE("GPL");
206