1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * System monitoring driver for DA9052 PMICs.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright(c) 2012 Dialog Semiconductor Ltd.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Anthony Olech <Anthony.Olech@diasemi.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/uaccess.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/time.h>
16*4882a593Smuzhiyun #include <linux/watchdog.h>
17*4882a593Smuzhiyun #include <linux/types.h>
18*4882a593Smuzhiyun #include <linux/kernel.h>
19*4882a593Smuzhiyun #include <linux/jiffies.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <linux/mfd/da9052/reg.h>
22*4882a593Smuzhiyun #include <linux/mfd/da9052/da9052.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define DA9052_DEF_TIMEOUT 4
25*4882a593Smuzhiyun #define DA9052_TWDMIN 256
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun struct da9052_wdt_data {
28*4882a593Smuzhiyun struct watchdog_device wdt;
29*4882a593Smuzhiyun struct da9052 *da9052;
30*4882a593Smuzhiyun unsigned long jpast;
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static const struct {
34*4882a593Smuzhiyun u8 reg_val;
35*4882a593Smuzhiyun int time; /* Seconds */
36*4882a593Smuzhiyun } da9052_wdt_maps[] = {
37*4882a593Smuzhiyun { 1, 2 },
38*4882a593Smuzhiyun { 2, 4 },
39*4882a593Smuzhiyun { 3, 8 },
40*4882a593Smuzhiyun { 4, 16 },
41*4882a593Smuzhiyun { 5, 32 },
42*4882a593Smuzhiyun { 5, 33 }, /* Actual time 32.768s so included both 32s and 33s */
43*4882a593Smuzhiyun { 6, 65 },
44*4882a593Smuzhiyun { 6, 66 }, /* Actual time 65.536s so include both, 65s and 66s */
45*4882a593Smuzhiyun { 7, 131 },
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun
da9052_wdt_set_timeout(struct watchdog_device * wdt_dev,unsigned int timeout)49*4882a593Smuzhiyun static int da9052_wdt_set_timeout(struct watchdog_device *wdt_dev,
50*4882a593Smuzhiyun unsigned int timeout)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun struct da9052_wdt_data *driver_data = watchdog_get_drvdata(wdt_dev);
53*4882a593Smuzhiyun struct da9052 *da9052 = driver_data->da9052;
54*4882a593Smuzhiyun int ret, i;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /*
57*4882a593Smuzhiyun * Disable the Watchdog timer before setting
58*4882a593Smuzhiyun * new time out.
59*4882a593Smuzhiyun */
60*4882a593Smuzhiyun ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
61*4882a593Smuzhiyun DA9052_CONTROLD_TWDSCALE, 0);
62*4882a593Smuzhiyun if (ret < 0) {
63*4882a593Smuzhiyun dev_err(da9052->dev, "Failed to disable watchdog bit, %d\n",
64*4882a593Smuzhiyun ret);
65*4882a593Smuzhiyun return ret;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun if (timeout) {
68*4882a593Smuzhiyun /*
69*4882a593Smuzhiyun * To change the timeout, da9052 needs to
70*4882a593Smuzhiyun * be disabled for at least 150 us.
71*4882a593Smuzhiyun */
72*4882a593Smuzhiyun udelay(150);
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* Set the desired timeout */
75*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(da9052_wdt_maps); i++)
76*4882a593Smuzhiyun if (da9052_wdt_maps[i].time == timeout)
77*4882a593Smuzhiyun break;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun if (i == ARRAY_SIZE(da9052_wdt_maps))
80*4882a593Smuzhiyun ret = -EINVAL;
81*4882a593Smuzhiyun else
82*4882a593Smuzhiyun ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
83*4882a593Smuzhiyun DA9052_CONTROLD_TWDSCALE,
84*4882a593Smuzhiyun da9052_wdt_maps[i].reg_val);
85*4882a593Smuzhiyun if (ret < 0) {
86*4882a593Smuzhiyun dev_err(da9052->dev,
87*4882a593Smuzhiyun "Failed to update timescale bit, %d\n", ret);
88*4882a593Smuzhiyun return ret;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun wdt_dev->timeout = timeout;
92*4882a593Smuzhiyun driver_data->jpast = jiffies;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
da9052_wdt_start(struct watchdog_device * wdt_dev)98*4882a593Smuzhiyun static int da9052_wdt_start(struct watchdog_device *wdt_dev)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun return da9052_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
da9052_wdt_stop(struct watchdog_device * wdt_dev)103*4882a593Smuzhiyun static int da9052_wdt_stop(struct watchdog_device *wdt_dev)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun return da9052_wdt_set_timeout(wdt_dev, 0);
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
da9052_wdt_ping(struct watchdog_device * wdt_dev)108*4882a593Smuzhiyun static int da9052_wdt_ping(struct watchdog_device *wdt_dev)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun struct da9052_wdt_data *driver_data = watchdog_get_drvdata(wdt_dev);
111*4882a593Smuzhiyun struct da9052 *da9052 = driver_data->da9052;
112*4882a593Smuzhiyun unsigned long msec, jnow = jiffies;
113*4882a593Smuzhiyun int ret;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun /*
116*4882a593Smuzhiyun * We have a minimum time for watchdog window called TWDMIN. A write
117*4882a593Smuzhiyun * to the watchdog before this elapsed time should cause an error.
118*4882a593Smuzhiyun */
119*4882a593Smuzhiyun msec = (jnow - driver_data->jpast) * 1000/HZ;
120*4882a593Smuzhiyun if (msec < DA9052_TWDMIN)
121*4882a593Smuzhiyun mdelay(msec);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun /* Reset the watchdog timer */
124*4882a593Smuzhiyun ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
125*4882a593Smuzhiyun DA9052_CONTROLD_WATCHDOG, 1 << 7);
126*4882a593Smuzhiyun if (ret < 0)
127*4882a593Smuzhiyun return ret;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /*
130*4882a593Smuzhiyun * FIXME: Reset the watchdog core, in general PMIC
131*4882a593Smuzhiyun * is supposed to do this
132*4882a593Smuzhiyun */
133*4882a593Smuzhiyun return da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
134*4882a593Smuzhiyun DA9052_CONTROLD_WATCHDOG, 0 << 7);
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun static const struct watchdog_info da9052_wdt_info = {
138*4882a593Smuzhiyun .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
139*4882a593Smuzhiyun .identity = "DA9052 Watchdog",
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun static const struct watchdog_ops da9052_wdt_ops = {
143*4882a593Smuzhiyun .owner = THIS_MODULE,
144*4882a593Smuzhiyun .start = da9052_wdt_start,
145*4882a593Smuzhiyun .stop = da9052_wdt_stop,
146*4882a593Smuzhiyun .ping = da9052_wdt_ping,
147*4882a593Smuzhiyun .set_timeout = da9052_wdt_set_timeout,
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun
da9052_wdt_probe(struct platform_device * pdev)151*4882a593Smuzhiyun static int da9052_wdt_probe(struct platform_device *pdev)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun struct device *dev = &pdev->dev;
154*4882a593Smuzhiyun struct da9052 *da9052 = dev_get_drvdata(dev->parent);
155*4882a593Smuzhiyun struct da9052_wdt_data *driver_data;
156*4882a593Smuzhiyun struct watchdog_device *da9052_wdt;
157*4882a593Smuzhiyun int ret;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun driver_data = devm_kzalloc(dev, sizeof(*driver_data), GFP_KERNEL);
160*4882a593Smuzhiyun if (!driver_data)
161*4882a593Smuzhiyun return -ENOMEM;
162*4882a593Smuzhiyun driver_data->da9052 = da9052;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun da9052_wdt = &driver_data->wdt;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun da9052_wdt->timeout = DA9052_DEF_TIMEOUT;
167*4882a593Smuzhiyun da9052_wdt->info = &da9052_wdt_info;
168*4882a593Smuzhiyun da9052_wdt->ops = &da9052_wdt_ops;
169*4882a593Smuzhiyun da9052_wdt->parent = dev;
170*4882a593Smuzhiyun watchdog_set_drvdata(da9052_wdt, driver_data);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
173*4882a593Smuzhiyun DA9052_CONTROLD_TWDSCALE, 0);
174*4882a593Smuzhiyun if (ret < 0) {
175*4882a593Smuzhiyun dev_err(dev, "Failed to disable watchdog bits, %d\n", ret);
176*4882a593Smuzhiyun return ret;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun return devm_watchdog_register_device(dev, &driver_data->wdt);
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun static struct platform_driver da9052_wdt_driver = {
183*4882a593Smuzhiyun .probe = da9052_wdt_probe,
184*4882a593Smuzhiyun .driver = {
185*4882a593Smuzhiyun .name = "da9052-watchdog",
186*4882a593Smuzhiyun },
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun module_platform_driver(da9052_wdt_driver);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun MODULE_AUTHOR("Anthony Olech <Anthony.Olech@diasemi.com>");
192*4882a593Smuzhiyun MODULE_DESCRIPTION("DA9052 SM Device Driver");
193*4882a593Smuzhiyun MODULE_LICENSE("GPL");
194*4882a593Smuzhiyun MODULE_ALIAS("platform:da9052-watchdog");
195