1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /* cpwd.c - driver implementation for hardware watchdog
3*4882a593Smuzhiyun * timers found on Sun Microsystems CP1400 and CP1500 boards.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This device supports both the generic Linux watchdog
6*4882a593Smuzhiyun * interface and Solaris-compatible ioctls as best it is
7*4882a593Smuzhiyun * able.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * NOTE: CP1400 systems appear to have a defective intr_mask
10*4882a593Smuzhiyun * register on the PLD, preventing the disabling of
11*4882a593Smuzhiyun * timer interrupts. We use a timer to periodically
12*4882a593Smuzhiyun * reset 'stopped' watchdogs on affected platforms.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * Copyright (c) 2000 Eric Brower (ebrower@usa.net)
15*4882a593Smuzhiyun * Copyright (C) 2008 David S. Miller <davem@davemloft.net>
16*4882a593Smuzhiyun */
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <linux/kernel.h>
21*4882a593Smuzhiyun #include <linux/module.h>
22*4882a593Smuzhiyun #include <linux/fs.h>
23*4882a593Smuzhiyun #include <linux/errno.h>
24*4882a593Smuzhiyun #include <linux/major.h>
25*4882a593Smuzhiyun #include <linux/miscdevice.h>
26*4882a593Smuzhiyun #include <linux/interrupt.h>
27*4882a593Smuzhiyun #include <linux/ioport.h>
28*4882a593Smuzhiyun #include <linux/timer.h>
29*4882a593Smuzhiyun #include <linux/compat.h>
30*4882a593Smuzhiyun #include <linux/slab.h>
31*4882a593Smuzhiyun #include <linux/mutex.h>
32*4882a593Smuzhiyun #include <linux/io.h>
33*4882a593Smuzhiyun #include <linux/of.h>
34*4882a593Smuzhiyun #include <linux/of_device.h>
35*4882a593Smuzhiyun #include <linux/uaccess.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #include <asm/irq.h>
38*4882a593Smuzhiyun #include <asm/watchdog.h>
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define DRIVER_NAME "cpwd"
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #define WD_OBPNAME "watchdog"
43*4882a593Smuzhiyun #define WD_BADMODEL "SUNW,501-5336"
44*4882a593Smuzhiyun #define WD_BTIMEOUT (jiffies + (HZ * 1000))
45*4882a593Smuzhiyun #define WD_BLIMIT 0xFFFF
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define WD0_MINOR 212
48*4882a593Smuzhiyun #define WD1_MINOR 213
49*4882a593Smuzhiyun #define WD2_MINOR 214
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* Internal driver definitions. */
52*4882a593Smuzhiyun #define WD0_ID 0
53*4882a593Smuzhiyun #define WD1_ID 1
54*4882a593Smuzhiyun #define WD2_ID 2
55*4882a593Smuzhiyun #define WD_NUMDEVS 3
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #define WD_INTR_OFF 0
58*4882a593Smuzhiyun #define WD_INTR_ON 1
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */
61*4882a593Smuzhiyun #define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */
62*4882a593Smuzhiyun #define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /* Register value definitions
65*4882a593Smuzhiyun */
66*4882a593Smuzhiyun #define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */
67*4882a593Smuzhiyun #define WD1_INTR_MASK 0x02
68*4882a593Smuzhiyun #define WD2_INTR_MASK 0x04
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun #define WD_S_RUNNING 0x01 /* Watchdog device status running */
71*4882a593Smuzhiyun #define WD_S_EXPIRED 0x02 /* Watchdog device status expired */
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun struct cpwd {
74*4882a593Smuzhiyun void __iomem *regs;
75*4882a593Smuzhiyun spinlock_t lock;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun unsigned int irq;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun unsigned long timeout;
80*4882a593Smuzhiyun bool enabled;
81*4882a593Smuzhiyun bool reboot;
82*4882a593Smuzhiyun bool broken;
83*4882a593Smuzhiyun bool initialized;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun struct {
86*4882a593Smuzhiyun struct miscdevice misc;
87*4882a593Smuzhiyun void __iomem *regs;
88*4882a593Smuzhiyun u8 intr_mask;
89*4882a593Smuzhiyun u8 runstatus;
90*4882a593Smuzhiyun u16 timeout;
91*4882a593Smuzhiyun } devs[WD_NUMDEVS];
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun static DEFINE_MUTEX(cpwd_mutex);
95*4882a593Smuzhiyun static struct cpwd *cpwd_device;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /* Sun uses Altera PLD EPF8820ATC144-4
98*4882a593Smuzhiyun * providing three hardware watchdogs:
99*4882a593Smuzhiyun *
100*4882a593Smuzhiyun * 1) RIC - sends an interrupt when triggered
101*4882a593Smuzhiyun * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU
102*4882a593Smuzhiyun * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board
103*4882a593Smuzhiyun *
104*4882a593Smuzhiyun *** Timer register block definition (struct wd_timer_regblk)
105*4882a593Smuzhiyun *
106*4882a593Smuzhiyun * dcntr and limit registers (halfword access):
107*4882a593Smuzhiyun * -------------------
108*4882a593Smuzhiyun * | 15 | ...| 1 | 0 |
109*4882a593Smuzhiyun * -------------------
110*4882a593Smuzhiyun * |- counter val -|
111*4882a593Smuzhiyun * -------------------
112*4882a593Smuzhiyun * dcntr - Current 16-bit downcounter value.
113*4882a593Smuzhiyun * When downcounter reaches '0' watchdog expires.
114*4882a593Smuzhiyun * Reading this register resets downcounter with
115*4882a593Smuzhiyun * 'limit' value.
116*4882a593Smuzhiyun * limit - 16-bit countdown value in 1/10th second increments.
117*4882a593Smuzhiyun * Writing this register begins countdown with input value.
118*4882a593Smuzhiyun * Reading from this register does not affect counter.
119*4882a593Smuzhiyun * NOTES: After watchdog reset, dcntr and limit contain '1'
120*4882a593Smuzhiyun *
121*4882a593Smuzhiyun * status register (byte access):
122*4882a593Smuzhiyun * ---------------------------
123*4882a593Smuzhiyun * | 7 | ... | 2 | 1 | 0 |
124*4882a593Smuzhiyun * --------------+------------
125*4882a593Smuzhiyun * |- UNUSED -| EXP | RUN |
126*4882a593Smuzhiyun * ---------------------------
127*4882a593Smuzhiyun * status- Bit 0 - Watchdog is running
128*4882a593Smuzhiyun * Bit 1 - Watchdog has expired
129*4882a593Smuzhiyun *
130*4882a593Smuzhiyun *** PLD register block definition (struct wd_pld_regblk)
131*4882a593Smuzhiyun *
132*4882a593Smuzhiyun * intr_mask register (byte access):
133*4882a593Smuzhiyun * ---------------------------------
134*4882a593Smuzhiyun * | 7 | ... | 3 | 2 | 1 | 0 |
135*4882a593Smuzhiyun * +-------------+------------------
136*4882a593Smuzhiyun * |- UNUSED -| WD3 | WD2 | WD1 |
137*4882a593Smuzhiyun * ---------------------------------
138*4882a593Smuzhiyun * WD3 - 1 == Interrupt disabled for watchdog 3
139*4882a593Smuzhiyun * WD2 - 1 == Interrupt disabled for watchdog 2
140*4882a593Smuzhiyun * WD1 - 1 == Interrupt disabled for watchdog 1
141*4882a593Smuzhiyun *
142*4882a593Smuzhiyun * pld_status register (byte access):
143*4882a593Smuzhiyun * UNKNOWN, MAGICAL MYSTERY REGISTER
144*4882a593Smuzhiyun *
145*4882a593Smuzhiyun */
146*4882a593Smuzhiyun #define WD_TIMER_REGSZ 16
147*4882a593Smuzhiyun #define WD0_OFF 0
148*4882a593Smuzhiyun #define WD1_OFF (WD_TIMER_REGSZ * 1)
149*4882a593Smuzhiyun #define WD2_OFF (WD_TIMER_REGSZ * 2)
150*4882a593Smuzhiyun #define PLD_OFF (WD_TIMER_REGSZ * 3)
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun #define WD_DCNTR 0x00
153*4882a593Smuzhiyun #define WD_LIMIT 0x04
154*4882a593Smuzhiyun #define WD_STATUS 0x08
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun #define PLD_IMASK (PLD_OFF + 0x00)
157*4882a593Smuzhiyun #define PLD_STATUS (PLD_OFF + 0x04)
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun static struct timer_list cpwd_timer;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun static int wd0_timeout;
162*4882a593Smuzhiyun static int wd1_timeout;
163*4882a593Smuzhiyun static int wd2_timeout;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun module_param(wd0_timeout, int, 0);
166*4882a593Smuzhiyun MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs");
167*4882a593Smuzhiyun module_param(wd1_timeout, int, 0);
168*4882a593Smuzhiyun MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs");
169*4882a593Smuzhiyun module_param(wd2_timeout, int, 0);
170*4882a593Smuzhiyun MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs");
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun MODULE_AUTHOR("Eric Brower <ebrower@usa.net>");
173*4882a593Smuzhiyun MODULE_DESCRIPTION("Hardware watchdog driver for Sun Microsystems CP1400/1500");
174*4882a593Smuzhiyun MODULE_LICENSE("GPL");
175*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("watchdog");
176*4882a593Smuzhiyun
cpwd_writew(u16 val,void __iomem * addr)177*4882a593Smuzhiyun static void cpwd_writew(u16 val, void __iomem *addr)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun writew(cpu_to_le16(val), addr);
180*4882a593Smuzhiyun }
cpwd_readw(void __iomem * addr)181*4882a593Smuzhiyun static u16 cpwd_readw(void __iomem *addr)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun u16 val = readw(addr);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun return le16_to_cpu(val);
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
cpwd_writeb(u8 val,void __iomem * addr)188*4882a593Smuzhiyun static void cpwd_writeb(u8 val, void __iomem *addr)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun writeb(val, addr);
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
cpwd_readb(void __iomem * addr)193*4882a593Smuzhiyun static u8 cpwd_readb(void __iomem *addr)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun return readb(addr);
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /* Enable or disable watchdog interrupts
199*4882a593Smuzhiyun * Because of the CP1400 defect this should only be
200*4882a593Smuzhiyun * called during initialzation or by wd_[start|stop]timer()
201*4882a593Smuzhiyun *
202*4882a593Smuzhiyun * index - sub-device index, or -1 for 'all'
203*4882a593Smuzhiyun * enable - non-zero to enable interrupts, zero to disable
204*4882a593Smuzhiyun */
cpwd_toggleintr(struct cpwd * p,int index,int enable)205*4882a593Smuzhiyun static void cpwd_toggleintr(struct cpwd *p, int index, int enable)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun unsigned char curregs = cpwd_readb(p->regs + PLD_IMASK);
208*4882a593Smuzhiyun unsigned char setregs =
209*4882a593Smuzhiyun (index == -1) ?
210*4882a593Smuzhiyun (WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) :
211*4882a593Smuzhiyun (p->devs[index].intr_mask);
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun if (enable == WD_INTR_ON)
214*4882a593Smuzhiyun curregs &= ~setregs;
215*4882a593Smuzhiyun else
216*4882a593Smuzhiyun curregs |= setregs;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun cpwd_writeb(curregs, p->regs + PLD_IMASK);
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun /* Restarts timer with maximum limit value and
222*4882a593Smuzhiyun * does not unset 'brokenstop' value.
223*4882a593Smuzhiyun */
cpwd_resetbrokentimer(struct cpwd * p,int index)224*4882a593Smuzhiyun static void cpwd_resetbrokentimer(struct cpwd *p, int index)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun cpwd_toggleintr(p, index, WD_INTR_ON);
227*4882a593Smuzhiyun cpwd_writew(WD_BLIMIT, p->devs[index].regs + WD_LIMIT);
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun /* Timer method called to reset stopped watchdogs--
231*4882a593Smuzhiyun * because of the PLD bug on CP1400, we cannot mask
232*4882a593Smuzhiyun * interrupts within the PLD so me must continually
233*4882a593Smuzhiyun * reset the timers ad infinitum.
234*4882a593Smuzhiyun */
cpwd_brokentimer(struct timer_list * unused)235*4882a593Smuzhiyun static void cpwd_brokentimer(struct timer_list *unused)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun struct cpwd *p = cpwd_device;
238*4882a593Smuzhiyun int id, tripped = 0;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun /* kill a running timer instance, in case we
241*4882a593Smuzhiyun * were called directly instead of by kernel timer
242*4882a593Smuzhiyun */
243*4882a593Smuzhiyun if (timer_pending(&cpwd_timer))
244*4882a593Smuzhiyun del_timer(&cpwd_timer);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun for (id = 0; id < WD_NUMDEVS; id++) {
247*4882a593Smuzhiyun if (p->devs[id].runstatus & WD_STAT_BSTOP) {
248*4882a593Smuzhiyun ++tripped;
249*4882a593Smuzhiyun cpwd_resetbrokentimer(p, id);
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun if (tripped) {
254*4882a593Smuzhiyun /* there is at least one timer brokenstopped-- reschedule */
255*4882a593Smuzhiyun cpwd_timer.expires = WD_BTIMEOUT;
256*4882a593Smuzhiyun add_timer(&cpwd_timer);
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun /* Reset countdown timer with 'limit' value and continue countdown.
261*4882a593Smuzhiyun * This will not start a stopped timer.
262*4882a593Smuzhiyun */
cpwd_pingtimer(struct cpwd * p,int index)263*4882a593Smuzhiyun static void cpwd_pingtimer(struct cpwd *p, int index)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING)
266*4882a593Smuzhiyun cpwd_readw(p->devs[index].regs + WD_DCNTR);
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun /* Stop a running watchdog timer-- the timer actually keeps
270*4882a593Smuzhiyun * running, but the interrupt is masked so that no action is
271*4882a593Smuzhiyun * taken upon expiration.
272*4882a593Smuzhiyun */
cpwd_stoptimer(struct cpwd * p,int index)273*4882a593Smuzhiyun static void cpwd_stoptimer(struct cpwd *p, int index)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING) {
276*4882a593Smuzhiyun cpwd_toggleintr(p, index, WD_INTR_OFF);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun if (p->broken) {
279*4882a593Smuzhiyun p->devs[index].runstatus |= WD_STAT_BSTOP;
280*4882a593Smuzhiyun cpwd_brokentimer(NULL);
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun /* Start a watchdog timer with the specified limit value
286*4882a593Smuzhiyun * If the watchdog is running, it will be restarted with
287*4882a593Smuzhiyun * the provided limit value.
288*4882a593Smuzhiyun *
289*4882a593Smuzhiyun * This function will enable interrupts on the specified
290*4882a593Smuzhiyun * watchdog.
291*4882a593Smuzhiyun */
cpwd_starttimer(struct cpwd * p,int index)292*4882a593Smuzhiyun static void cpwd_starttimer(struct cpwd *p, int index)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun if (p->broken)
295*4882a593Smuzhiyun p->devs[index].runstatus &= ~WD_STAT_BSTOP;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun p->devs[index].runstatus &= ~WD_STAT_SVCD;
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun cpwd_writew(p->devs[index].timeout, p->devs[index].regs + WD_LIMIT);
300*4882a593Smuzhiyun cpwd_toggleintr(p, index, WD_INTR_ON);
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
cpwd_getstatus(struct cpwd * p,int index)303*4882a593Smuzhiyun static int cpwd_getstatus(struct cpwd *p, int index)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun unsigned char stat = cpwd_readb(p->devs[index].regs + WD_STATUS);
306*4882a593Smuzhiyun unsigned char intr = cpwd_readb(p->devs[index].regs + PLD_IMASK);
307*4882a593Smuzhiyun unsigned char ret = WD_STOPPED;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun /* determine STOPPED */
310*4882a593Smuzhiyun if (!stat)
311*4882a593Smuzhiyun return ret;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun /* determine EXPIRED vs FREERUN vs RUNNING */
314*4882a593Smuzhiyun else if (WD_S_EXPIRED & stat) {
315*4882a593Smuzhiyun ret = WD_EXPIRED;
316*4882a593Smuzhiyun } else if (WD_S_RUNNING & stat) {
317*4882a593Smuzhiyun if (intr & p->devs[index].intr_mask) {
318*4882a593Smuzhiyun ret = WD_FREERUN;
319*4882a593Smuzhiyun } else {
320*4882a593Smuzhiyun /* Fudge WD_EXPIRED status for defective CP1400--
321*4882a593Smuzhiyun * IF timer is running
322*4882a593Smuzhiyun * AND brokenstop is set
323*4882a593Smuzhiyun * AND an interrupt has been serviced
324*4882a593Smuzhiyun * we are WD_EXPIRED.
325*4882a593Smuzhiyun *
326*4882a593Smuzhiyun * IF timer is running
327*4882a593Smuzhiyun * AND brokenstop is set
328*4882a593Smuzhiyun * AND no interrupt has been serviced
329*4882a593Smuzhiyun * we are WD_FREERUN.
330*4882a593Smuzhiyun */
331*4882a593Smuzhiyun if (p->broken &&
332*4882a593Smuzhiyun (p->devs[index].runstatus & WD_STAT_BSTOP)) {
333*4882a593Smuzhiyun if (p->devs[index].runstatus & WD_STAT_SVCD) {
334*4882a593Smuzhiyun ret = WD_EXPIRED;
335*4882a593Smuzhiyun } else {
336*4882a593Smuzhiyun /* we could as well pretend
337*4882a593Smuzhiyun * we are expired */
338*4882a593Smuzhiyun ret = WD_FREERUN;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun } else {
341*4882a593Smuzhiyun ret = WD_RUNNING;
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /* determine SERVICED */
347*4882a593Smuzhiyun if (p->devs[index].runstatus & WD_STAT_SVCD)
348*4882a593Smuzhiyun ret |= WD_SERVICED;
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun return ret;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun
cpwd_interrupt(int irq,void * dev_id)353*4882a593Smuzhiyun static irqreturn_t cpwd_interrupt(int irq, void *dev_id)
354*4882a593Smuzhiyun {
355*4882a593Smuzhiyun struct cpwd *p = dev_id;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun /* Only WD0 will interrupt-- others are NMI and we won't
358*4882a593Smuzhiyun * see them here....
359*4882a593Smuzhiyun */
360*4882a593Smuzhiyun spin_lock_irq(&p->lock);
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun cpwd_stoptimer(p, WD0_ID);
363*4882a593Smuzhiyun p->devs[WD0_ID].runstatus |= WD_STAT_SVCD;
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun spin_unlock_irq(&p->lock);
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun return IRQ_HANDLED;
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun
cpwd_open(struct inode * inode,struct file * f)370*4882a593Smuzhiyun static int cpwd_open(struct inode *inode, struct file *f)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun struct cpwd *p = cpwd_device;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun mutex_lock(&cpwd_mutex);
375*4882a593Smuzhiyun switch (iminor(inode)) {
376*4882a593Smuzhiyun case WD0_MINOR:
377*4882a593Smuzhiyun case WD1_MINOR:
378*4882a593Smuzhiyun case WD2_MINOR:
379*4882a593Smuzhiyun break;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun default:
382*4882a593Smuzhiyun mutex_unlock(&cpwd_mutex);
383*4882a593Smuzhiyun return -ENODEV;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun /* Register IRQ on first open of device */
387*4882a593Smuzhiyun if (!p->initialized) {
388*4882a593Smuzhiyun if (request_irq(p->irq, &cpwd_interrupt,
389*4882a593Smuzhiyun IRQF_SHARED, DRIVER_NAME, p)) {
390*4882a593Smuzhiyun pr_err("Cannot register IRQ %d\n", p->irq);
391*4882a593Smuzhiyun mutex_unlock(&cpwd_mutex);
392*4882a593Smuzhiyun return -EBUSY;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun p->initialized = true;
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun mutex_unlock(&cpwd_mutex);
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun return stream_open(inode, f);
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun
cpwd_release(struct inode * inode,struct file * file)402*4882a593Smuzhiyun static int cpwd_release(struct inode *inode, struct file *file)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun return 0;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
cpwd_ioctl(struct file * file,unsigned int cmd,unsigned long arg)407*4882a593Smuzhiyun static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun static const struct watchdog_info info = {
410*4882a593Smuzhiyun .options = WDIOF_SETTIMEOUT,
411*4882a593Smuzhiyun .firmware_version = 1,
412*4882a593Smuzhiyun .identity = DRIVER_NAME,
413*4882a593Smuzhiyun };
414*4882a593Smuzhiyun void __user *argp = (void __user *)arg;
415*4882a593Smuzhiyun struct inode *inode = file_inode(file);
416*4882a593Smuzhiyun int index = iminor(inode) - WD0_MINOR;
417*4882a593Smuzhiyun struct cpwd *p = cpwd_device;
418*4882a593Smuzhiyun int setopt = 0;
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun switch (cmd) {
421*4882a593Smuzhiyun /* Generic Linux IOCTLs */
422*4882a593Smuzhiyun case WDIOC_GETSUPPORT:
423*4882a593Smuzhiyun if (copy_to_user(argp, &info, sizeof(struct watchdog_info)))
424*4882a593Smuzhiyun return -EFAULT;
425*4882a593Smuzhiyun break;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun case WDIOC_GETSTATUS:
428*4882a593Smuzhiyun case WDIOC_GETBOOTSTATUS:
429*4882a593Smuzhiyun if (put_user(0, (int __user *)argp))
430*4882a593Smuzhiyun return -EFAULT;
431*4882a593Smuzhiyun break;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun case WDIOC_KEEPALIVE:
434*4882a593Smuzhiyun cpwd_pingtimer(p, index);
435*4882a593Smuzhiyun break;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun case WDIOC_SETOPTIONS:
438*4882a593Smuzhiyun if (copy_from_user(&setopt, argp, sizeof(unsigned int)))
439*4882a593Smuzhiyun return -EFAULT;
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun if (setopt & WDIOS_DISABLECARD) {
442*4882a593Smuzhiyun if (p->enabled)
443*4882a593Smuzhiyun return -EINVAL;
444*4882a593Smuzhiyun cpwd_stoptimer(p, index);
445*4882a593Smuzhiyun } else if (setopt & WDIOS_ENABLECARD) {
446*4882a593Smuzhiyun cpwd_starttimer(p, index);
447*4882a593Smuzhiyun } else {
448*4882a593Smuzhiyun return -EINVAL;
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun break;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun /* Solaris-compatible IOCTLs */
453*4882a593Smuzhiyun case WIOCGSTAT:
454*4882a593Smuzhiyun setopt = cpwd_getstatus(p, index);
455*4882a593Smuzhiyun if (copy_to_user(argp, &setopt, sizeof(unsigned int)))
456*4882a593Smuzhiyun return -EFAULT;
457*4882a593Smuzhiyun break;
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun case WIOCSTART:
460*4882a593Smuzhiyun cpwd_starttimer(p, index);
461*4882a593Smuzhiyun break;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun case WIOCSTOP:
464*4882a593Smuzhiyun if (p->enabled)
465*4882a593Smuzhiyun return -EINVAL;
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun cpwd_stoptimer(p, index);
468*4882a593Smuzhiyun break;
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun default:
471*4882a593Smuzhiyun return -EINVAL;
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun return 0;
475*4882a593Smuzhiyun }
476*4882a593Smuzhiyun
cpwd_compat_ioctl(struct file * file,unsigned int cmd,unsigned long arg)477*4882a593Smuzhiyun static long cpwd_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
478*4882a593Smuzhiyun {
479*4882a593Smuzhiyun return cpwd_ioctl(file, cmd, (unsigned long)compat_ptr(arg));
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun
cpwd_write(struct file * file,const char __user * buf,size_t count,loff_t * ppos)482*4882a593Smuzhiyun static ssize_t cpwd_write(struct file *file, const char __user *buf,
483*4882a593Smuzhiyun size_t count, loff_t *ppos)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun struct inode *inode = file_inode(file);
486*4882a593Smuzhiyun struct cpwd *p = cpwd_device;
487*4882a593Smuzhiyun int index = iminor(inode);
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun if (count) {
490*4882a593Smuzhiyun cpwd_pingtimer(p, index);
491*4882a593Smuzhiyun return 1;
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun return 0;
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun
cpwd_read(struct file * file,char __user * buffer,size_t count,loff_t * ppos)497*4882a593Smuzhiyun static ssize_t cpwd_read(struct file *file, char __user *buffer,
498*4882a593Smuzhiyun size_t count, loff_t *ppos)
499*4882a593Smuzhiyun {
500*4882a593Smuzhiyun return -EINVAL;
501*4882a593Smuzhiyun }
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun static const struct file_operations cpwd_fops = {
504*4882a593Smuzhiyun .owner = THIS_MODULE,
505*4882a593Smuzhiyun .unlocked_ioctl = cpwd_ioctl,
506*4882a593Smuzhiyun .compat_ioctl = cpwd_compat_ioctl,
507*4882a593Smuzhiyun .open = cpwd_open,
508*4882a593Smuzhiyun .write = cpwd_write,
509*4882a593Smuzhiyun .read = cpwd_read,
510*4882a593Smuzhiyun .release = cpwd_release,
511*4882a593Smuzhiyun .llseek = no_llseek,
512*4882a593Smuzhiyun };
513*4882a593Smuzhiyun
cpwd_probe(struct platform_device * op)514*4882a593Smuzhiyun static int cpwd_probe(struct platform_device *op)
515*4882a593Smuzhiyun {
516*4882a593Smuzhiyun struct device_node *options;
517*4882a593Smuzhiyun const char *str_prop;
518*4882a593Smuzhiyun const void *prop_val;
519*4882a593Smuzhiyun int i, err = -EINVAL;
520*4882a593Smuzhiyun struct cpwd *p;
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun if (cpwd_device)
523*4882a593Smuzhiyun return -EINVAL;
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun p = devm_kzalloc(&op->dev, sizeof(*p), GFP_KERNEL);
526*4882a593Smuzhiyun if (!p)
527*4882a593Smuzhiyun return -ENOMEM;
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun p->irq = op->archdata.irqs[0];
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun spin_lock_init(&p->lock);
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun p->regs = of_ioremap(&op->resource[0], 0,
534*4882a593Smuzhiyun 4 * WD_TIMER_REGSZ, DRIVER_NAME);
535*4882a593Smuzhiyun if (!p->regs) {
536*4882a593Smuzhiyun pr_err("Unable to map registers\n");
537*4882a593Smuzhiyun return -ENOMEM;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun options = of_find_node_by_path("/options");
541*4882a593Smuzhiyun if (!options) {
542*4882a593Smuzhiyun err = -ENODEV;
543*4882a593Smuzhiyun pr_err("Unable to find /options node\n");
544*4882a593Smuzhiyun goto out_iounmap;
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun prop_val = of_get_property(options, "watchdog-enable?", NULL);
548*4882a593Smuzhiyun p->enabled = (prop_val ? true : false);
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun prop_val = of_get_property(options, "watchdog-reboot?", NULL);
551*4882a593Smuzhiyun p->reboot = (prop_val ? true : false);
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun str_prop = of_get_property(options, "watchdog-timeout", NULL);
554*4882a593Smuzhiyun if (str_prop)
555*4882a593Smuzhiyun p->timeout = simple_strtoul(str_prop, NULL, 10);
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun of_node_put(options);
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun /* CP1400s seem to have broken PLD implementations-- the
560*4882a593Smuzhiyun * interrupt_mask register cannot be written, so no timer
561*4882a593Smuzhiyun * interrupts can be masked within the PLD.
562*4882a593Smuzhiyun */
563*4882a593Smuzhiyun str_prop = of_get_property(op->dev.of_node, "model", NULL);
564*4882a593Smuzhiyun p->broken = (str_prop && !strcmp(str_prop, WD_BADMODEL));
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun if (!p->enabled)
567*4882a593Smuzhiyun cpwd_toggleintr(p, -1, WD_INTR_OFF);
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun for (i = 0; i < WD_NUMDEVS; i++) {
570*4882a593Smuzhiyun static const char *cpwd_names[] = { "RIC", "XIR", "POR" };
571*4882a593Smuzhiyun static int *parms[] = { &wd0_timeout,
572*4882a593Smuzhiyun &wd1_timeout,
573*4882a593Smuzhiyun &wd2_timeout };
574*4882a593Smuzhiyun struct miscdevice *mp = &p->devs[i].misc;
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun mp->minor = WD0_MINOR + i;
577*4882a593Smuzhiyun mp->name = cpwd_names[i];
578*4882a593Smuzhiyun mp->fops = &cpwd_fops;
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun p->devs[i].regs = p->regs + (i * WD_TIMER_REGSZ);
581*4882a593Smuzhiyun p->devs[i].intr_mask = (WD0_INTR_MASK << i);
582*4882a593Smuzhiyun p->devs[i].runstatus &= ~WD_STAT_BSTOP;
583*4882a593Smuzhiyun p->devs[i].runstatus |= WD_STAT_INIT;
584*4882a593Smuzhiyun p->devs[i].timeout = p->timeout;
585*4882a593Smuzhiyun if (*parms[i])
586*4882a593Smuzhiyun p->devs[i].timeout = *parms[i];
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun err = misc_register(&p->devs[i].misc);
589*4882a593Smuzhiyun if (err) {
590*4882a593Smuzhiyun pr_err("Could not register misc device for dev %d\n",
591*4882a593Smuzhiyun i);
592*4882a593Smuzhiyun goto out_unregister;
593*4882a593Smuzhiyun }
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun if (p->broken) {
597*4882a593Smuzhiyun timer_setup(&cpwd_timer, cpwd_brokentimer, 0);
598*4882a593Smuzhiyun cpwd_timer.expires = WD_BTIMEOUT;
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun pr_info("PLD defect workaround enabled for model %s\n",
601*4882a593Smuzhiyun WD_BADMODEL);
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun platform_set_drvdata(op, p);
605*4882a593Smuzhiyun cpwd_device = p;
606*4882a593Smuzhiyun return 0;
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun out_unregister:
609*4882a593Smuzhiyun for (i--; i >= 0; i--)
610*4882a593Smuzhiyun misc_deregister(&p->devs[i].misc);
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun out_iounmap:
613*4882a593Smuzhiyun of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ);
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun return err;
616*4882a593Smuzhiyun }
617*4882a593Smuzhiyun
cpwd_remove(struct platform_device * op)618*4882a593Smuzhiyun static int cpwd_remove(struct platform_device *op)
619*4882a593Smuzhiyun {
620*4882a593Smuzhiyun struct cpwd *p = platform_get_drvdata(op);
621*4882a593Smuzhiyun int i;
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun for (i = 0; i < WD_NUMDEVS; i++) {
624*4882a593Smuzhiyun misc_deregister(&p->devs[i].misc);
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun if (!p->enabled) {
627*4882a593Smuzhiyun cpwd_stoptimer(p, i);
628*4882a593Smuzhiyun if (p->devs[i].runstatus & WD_STAT_BSTOP)
629*4882a593Smuzhiyun cpwd_resetbrokentimer(p, i);
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun }
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun if (p->broken)
634*4882a593Smuzhiyun del_timer_sync(&cpwd_timer);
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun if (p->initialized)
637*4882a593Smuzhiyun free_irq(p->irq, p);
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ);
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun cpwd_device = NULL;
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun return 0;
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun static const struct of_device_id cpwd_match[] = {
647*4882a593Smuzhiyun {
648*4882a593Smuzhiyun .name = "watchdog",
649*4882a593Smuzhiyun },
650*4882a593Smuzhiyun {},
651*4882a593Smuzhiyun };
652*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, cpwd_match);
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun static struct platform_driver cpwd_driver = {
655*4882a593Smuzhiyun .driver = {
656*4882a593Smuzhiyun .name = DRIVER_NAME,
657*4882a593Smuzhiyun .of_match_table = cpwd_match,
658*4882a593Smuzhiyun },
659*4882a593Smuzhiyun .probe = cpwd_probe,
660*4882a593Smuzhiyun .remove = cpwd_remove,
661*4882a593Smuzhiyun };
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun module_platform_driver(cpwd_driver);
664