1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2013 Broadcom Corporation
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/debugfs.h>
8*4882a593Smuzhiyun #include <linux/delay.h>
9*4882a593Smuzhiyun #include <linux/err.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/of_address.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/watchdog.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define SECWDOG_CTRL_REG 0x00000000
17*4882a593Smuzhiyun #define SECWDOG_COUNT_REG 0x00000004
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define SECWDOG_RESERVED_MASK 0x1dffffff
20*4882a593Smuzhiyun #define SECWDOG_WD_LOAD_FLAG 0x10000000
21*4882a593Smuzhiyun #define SECWDOG_EN_MASK 0x08000000
22*4882a593Smuzhiyun #define SECWDOG_SRSTEN_MASK 0x04000000
23*4882a593Smuzhiyun #define SECWDOG_RES_MASK 0x00f00000
24*4882a593Smuzhiyun #define SECWDOG_COUNT_MASK 0x000fffff
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define SECWDOG_MAX_COUNT SECWDOG_COUNT_MASK
27*4882a593Smuzhiyun #define SECWDOG_CLKS_SHIFT 20
28*4882a593Smuzhiyun #define SECWDOG_MAX_RES 15
29*4882a593Smuzhiyun #define SECWDOG_DEFAULT_RESOLUTION 4
30*4882a593Smuzhiyun #define SECWDOG_MAX_TRY 1000
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define SECS_TO_TICKS(x, w) ((x) << (w)->resolution)
33*4882a593Smuzhiyun #define TICKS_TO_SECS(x, w) ((x) >> (w)->resolution)
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define BCM_KONA_WDT_NAME "bcm_kona_wdt"
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun struct bcm_kona_wdt {
38*4882a593Smuzhiyun void __iomem *base;
39*4882a593Smuzhiyun /*
40*4882a593Smuzhiyun * One watchdog tick is 1/(2^resolution) seconds. Resolution can take
41*4882a593Smuzhiyun * the values 0-15, meaning one tick can be 1s to 30.52us. Our default
42*4882a593Smuzhiyun * resolution of 4 means one tick is 62.5ms.
43*4882a593Smuzhiyun *
44*4882a593Smuzhiyun * The watchdog counter is 20 bits. Depending on resolution, the maximum
45*4882a593Smuzhiyun * counter value of 0xfffff expires after about 12 days (resolution 0)
46*4882a593Smuzhiyun * down to only 32s (resolution 15). The default resolution of 4 gives
47*4882a593Smuzhiyun * us a maximum of about 18 hours and 12 minutes before the watchdog
48*4882a593Smuzhiyun * times out.
49*4882a593Smuzhiyun */
50*4882a593Smuzhiyun int resolution;
51*4882a593Smuzhiyun spinlock_t lock;
52*4882a593Smuzhiyun #ifdef CONFIG_BCM_KONA_WDT_DEBUG
53*4882a593Smuzhiyun unsigned long busy_count;
54*4882a593Smuzhiyun struct dentry *debugfs;
55*4882a593Smuzhiyun #endif
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
secure_register_read(struct bcm_kona_wdt * wdt,uint32_t offset)58*4882a593Smuzhiyun static int secure_register_read(struct bcm_kona_wdt *wdt, uint32_t offset)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun uint32_t val;
61*4882a593Smuzhiyun unsigned count = 0;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /*
64*4882a593Smuzhiyun * If the WD_LOAD_FLAG is set, the watchdog counter field is being
65*4882a593Smuzhiyun * updated in hardware. Once the WD timer is updated in hardware, it
66*4882a593Smuzhiyun * gets cleared.
67*4882a593Smuzhiyun */
68*4882a593Smuzhiyun do {
69*4882a593Smuzhiyun if (unlikely(count > 1))
70*4882a593Smuzhiyun udelay(5);
71*4882a593Smuzhiyun val = readl_relaxed(wdt->base + offset);
72*4882a593Smuzhiyun count++;
73*4882a593Smuzhiyun } while ((val & SECWDOG_WD_LOAD_FLAG) && count < SECWDOG_MAX_TRY);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun #ifdef CONFIG_BCM_KONA_WDT_DEBUG
76*4882a593Smuzhiyun /* Remember the maximum number iterations due to WD_LOAD_FLAG */
77*4882a593Smuzhiyun if (count > wdt->busy_count)
78*4882a593Smuzhiyun wdt->busy_count = count;
79*4882a593Smuzhiyun #endif
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /* This is the only place we return a negative value. */
82*4882a593Smuzhiyun if (val & SECWDOG_WD_LOAD_FLAG)
83*4882a593Smuzhiyun return -ETIMEDOUT;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /* We always mask out reserved bits. */
86*4882a593Smuzhiyun val &= SECWDOG_RESERVED_MASK;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return val;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun #ifdef CONFIG_BCM_KONA_WDT_DEBUG
92*4882a593Smuzhiyun
bcm_kona_show(struct seq_file * s,void * data)93*4882a593Smuzhiyun static int bcm_kona_show(struct seq_file *s, void *data)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun int ctl_val, cur_val;
96*4882a593Smuzhiyun unsigned long flags;
97*4882a593Smuzhiyun struct bcm_kona_wdt *wdt = s->private;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun if (!wdt) {
100*4882a593Smuzhiyun seq_puts(s, "No device pointer\n");
101*4882a593Smuzhiyun return 0;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun spin_lock_irqsave(&wdt->lock, flags);
105*4882a593Smuzhiyun ctl_val = secure_register_read(wdt, SECWDOG_CTRL_REG);
106*4882a593Smuzhiyun cur_val = secure_register_read(wdt, SECWDOG_COUNT_REG);
107*4882a593Smuzhiyun spin_unlock_irqrestore(&wdt->lock, flags);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun if (ctl_val < 0 || cur_val < 0) {
110*4882a593Smuzhiyun seq_puts(s, "Error accessing hardware\n");
111*4882a593Smuzhiyun } else {
112*4882a593Smuzhiyun int ctl, cur, ctl_sec, cur_sec, res;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun ctl = ctl_val & SECWDOG_COUNT_MASK;
115*4882a593Smuzhiyun res = (ctl_val & SECWDOG_RES_MASK) >> SECWDOG_CLKS_SHIFT;
116*4882a593Smuzhiyun cur = cur_val & SECWDOG_COUNT_MASK;
117*4882a593Smuzhiyun ctl_sec = TICKS_TO_SECS(ctl, wdt);
118*4882a593Smuzhiyun cur_sec = TICKS_TO_SECS(cur, wdt);
119*4882a593Smuzhiyun seq_printf(s,
120*4882a593Smuzhiyun "Resolution: %d / %d\n"
121*4882a593Smuzhiyun "Control: %d s / %d (%#x) ticks\n"
122*4882a593Smuzhiyun "Current: %d s / %d (%#x) ticks\n"
123*4882a593Smuzhiyun "Busy count: %lu\n",
124*4882a593Smuzhiyun res, wdt->resolution,
125*4882a593Smuzhiyun ctl_sec, ctl, ctl,
126*4882a593Smuzhiyun cur_sec, cur, cur,
127*4882a593Smuzhiyun wdt->busy_count);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun return 0;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun DEFINE_SHOW_ATTRIBUTE(bcm_kona);
134*4882a593Smuzhiyun
bcm_kona_wdt_debug_init(struct platform_device * pdev)135*4882a593Smuzhiyun static void bcm_kona_wdt_debug_init(struct platform_device *pdev)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun struct dentry *dir;
138*4882a593Smuzhiyun struct bcm_kona_wdt *wdt = platform_get_drvdata(pdev);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun if (!wdt)
141*4882a593Smuzhiyun return;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun wdt->debugfs = NULL;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun dir = debugfs_create_dir(BCM_KONA_WDT_NAME, NULL);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun debugfs_create_file("info", S_IFREG | S_IRUGO, dir, wdt,
148*4882a593Smuzhiyun &bcm_kona_fops);
149*4882a593Smuzhiyun wdt->debugfs = dir;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
bcm_kona_wdt_debug_exit(struct platform_device * pdev)152*4882a593Smuzhiyun static void bcm_kona_wdt_debug_exit(struct platform_device *pdev)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun struct bcm_kona_wdt *wdt = platform_get_drvdata(pdev);
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun if (wdt)
157*4882a593Smuzhiyun debugfs_remove_recursive(wdt->debugfs);
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun #else
161*4882a593Smuzhiyun
bcm_kona_wdt_debug_init(struct platform_device * pdev)162*4882a593Smuzhiyun static void bcm_kona_wdt_debug_init(struct platform_device *pdev) {}
bcm_kona_wdt_debug_exit(struct platform_device * pdev)163*4882a593Smuzhiyun static void bcm_kona_wdt_debug_exit(struct platform_device *pdev) {}
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun #endif /* CONFIG_BCM_KONA_WDT_DEBUG */
166*4882a593Smuzhiyun
bcm_kona_wdt_ctrl_reg_modify(struct bcm_kona_wdt * wdt,unsigned mask,unsigned newval)167*4882a593Smuzhiyun static int bcm_kona_wdt_ctrl_reg_modify(struct bcm_kona_wdt *wdt,
168*4882a593Smuzhiyun unsigned mask, unsigned newval)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun int val;
171*4882a593Smuzhiyun unsigned long flags;
172*4882a593Smuzhiyun int ret = 0;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun spin_lock_irqsave(&wdt->lock, flags);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun val = secure_register_read(wdt, SECWDOG_CTRL_REG);
177*4882a593Smuzhiyun if (val < 0) {
178*4882a593Smuzhiyun ret = val;
179*4882a593Smuzhiyun } else {
180*4882a593Smuzhiyun val &= ~mask;
181*4882a593Smuzhiyun val |= newval;
182*4882a593Smuzhiyun writel_relaxed(val, wdt->base + SECWDOG_CTRL_REG);
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun spin_unlock_irqrestore(&wdt->lock, flags);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun return ret;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
bcm_kona_wdt_set_resolution_reg(struct bcm_kona_wdt * wdt)190*4882a593Smuzhiyun static int bcm_kona_wdt_set_resolution_reg(struct bcm_kona_wdt *wdt)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun if (wdt->resolution > SECWDOG_MAX_RES)
193*4882a593Smuzhiyun return -EINVAL;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun return bcm_kona_wdt_ctrl_reg_modify(wdt, SECWDOG_RES_MASK,
196*4882a593Smuzhiyun wdt->resolution << SECWDOG_CLKS_SHIFT);
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
bcm_kona_wdt_set_timeout_reg(struct watchdog_device * wdog,unsigned watchdog_flags)199*4882a593Smuzhiyun static int bcm_kona_wdt_set_timeout_reg(struct watchdog_device *wdog,
200*4882a593Smuzhiyun unsigned watchdog_flags)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun struct bcm_kona_wdt *wdt = watchdog_get_drvdata(wdog);
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun return bcm_kona_wdt_ctrl_reg_modify(wdt, SECWDOG_COUNT_MASK,
205*4882a593Smuzhiyun SECS_TO_TICKS(wdog->timeout, wdt) |
206*4882a593Smuzhiyun watchdog_flags);
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
bcm_kona_wdt_set_timeout(struct watchdog_device * wdog,unsigned int t)209*4882a593Smuzhiyun static int bcm_kona_wdt_set_timeout(struct watchdog_device *wdog,
210*4882a593Smuzhiyun unsigned int t)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun wdog->timeout = t;
213*4882a593Smuzhiyun return 0;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
bcm_kona_wdt_get_timeleft(struct watchdog_device * wdog)216*4882a593Smuzhiyun static unsigned int bcm_kona_wdt_get_timeleft(struct watchdog_device *wdog)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun struct bcm_kona_wdt *wdt = watchdog_get_drvdata(wdog);
219*4882a593Smuzhiyun int val;
220*4882a593Smuzhiyun unsigned long flags;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun spin_lock_irqsave(&wdt->lock, flags);
223*4882a593Smuzhiyun val = secure_register_read(wdt, SECWDOG_COUNT_REG);
224*4882a593Smuzhiyun spin_unlock_irqrestore(&wdt->lock, flags);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun if (val < 0)
227*4882a593Smuzhiyun return val;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun return TICKS_TO_SECS(val & SECWDOG_COUNT_MASK, wdt);
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
bcm_kona_wdt_start(struct watchdog_device * wdog)232*4882a593Smuzhiyun static int bcm_kona_wdt_start(struct watchdog_device *wdog)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun return bcm_kona_wdt_set_timeout_reg(wdog,
235*4882a593Smuzhiyun SECWDOG_EN_MASK | SECWDOG_SRSTEN_MASK);
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
bcm_kona_wdt_stop(struct watchdog_device * wdog)238*4882a593Smuzhiyun static int bcm_kona_wdt_stop(struct watchdog_device *wdog)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun struct bcm_kona_wdt *wdt = watchdog_get_drvdata(wdog);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun return bcm_kona_wdt_ctrl_reg_modify(wdt, SECWDOG_EN_MASK |
243*4882a593Smuzhiyun SECWDOG_SRSTEN_MASK, 0);
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun static const struct watchdog_ops bcm_kona_wdt_ops = {
247*4882a593Smuzhiyun .owner = THIS_MODULE,
248*4882a593Smuzhiyun .start = bcm_kona_wdt_start,
249*4882a593Smuzhiyun .stop = bcm_kona_wdt_stop,
250*4882a593Smuzhiyun .set_timeout = bcm_kona_wdt_set_timeout,
251*4882a593Smuzhiyun .get_timeleft = bcm_kona_wdt_get_timeleft,
252*4882a593Smuzhiyun };
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun static const struct watchdog_info bcm_kona_wdt_info = {
255*4882a593Smuzhiyun .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
256*4882a593Smuzhiyun WDIOF_KEEPALIVEPING,
257*4882a593Smuzhiyun .identity = "Broadcom Kona Watchdog Timer",
258*4882a593Smuzhiyun };
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun static struct watchdog_device bcm_kona_wdt_wdd = {
261*4882a593Smuzhiyun .info = &bcm_kona_wdt_info,
262*4882a593Smuzhiyun .ops = &bcm_kona_wdt_ops,
263*4882a593Smuzhiyun .min_timeout = 1,
264*4882a593Smuzhiyun .max_timeout = SECWDOG_MAX_COUNT >> SECWDOG_DEFAULT_RESOLUTION,
265*4882a593Smuzhiyun .timeout = SECWDOG_MAX_COUNT >> SECWDOG_DEFAULT_RESOLUTION,
266*4882a593Smuzhiyun };
267*4882a593Smuzhiyun
bcm_kona_wdt_probe(struct platform_device * pdev)268*4882a593Smuzhiyun static int bcm_kona_wdt_probe(struct platform_device *pdev)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun struct device *dev = &pdev->dev;
271*4882a593Smuzhiyun struct bcm_kona_wdt *wdt;
272*4882a593Smuzhiyun int ret;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
275*4882a593Smuzhiyun if (!wdt)
276*4882a593Smuzhiyun return -ENOMEM;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun spin_lock_init(&wdt->lock);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun wdt->base = devm_platform_ioremap_resource(pdev, 0);
281*4882a593Smuzhiyun if (IS_ERR(wdt->base))
282*4882a593Smuzhiyun return PTR_ERR(wdt->base);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun wdt->resolution = SECWDOG_DEFAULT_RESOLUTION;
285*4882a593Smuzhiyun ret = bcm_kona_wdt_set_resolution_reg(wdt);
286*4882a593Smuzhiyun if (ret) {
287*4882a593Smuzhiyun dev_err(dev, "Failed to set resolution (error: %d)", ret);
288*4882a593Smuzhiyun return ret;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun platform_set_drvdata(pdev, wdt);
292*4882a593Smuzhiyun watchdog_set_drvdata(&bcm_kona_wdt_wdd, wdt);
293*4882a593Smuzhiyun bcm_kona_wdt_wdd.parent = dev;
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun ret = bcm_kona_wdt_set_timeout_reg(&bcm_kona_wdt_wdd, 0);
296*4882a593Smuzhiyun if (ret) {
297*4882a593Smuzhiyun dev_err(dev, "Failed set watchdog timeout");
298*4882a593Smuzhiyun return ret;
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun watchdog_stop_on_reboot(&bcm_kona_wdt_wdd);
302*4882a593Smuzhiyun watchdog_stop_on_unregister(&bcm_kona_wdt_wdd);
303*4882a593Smuzhiyun ret = devm_watchdog_register_device(dev, &bcm_kona_wdt_wdd);
304*4882a593Smuzhiyun if (ret)
305*4882a593Smuzhiyun return ret;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun bcm_kona_wdt_debug_init(pdev);
308*4882a593Smuzhiyun dev_dbg(dev, "Broadcom Kona Watchdog Timer");
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun return 0;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
bcm_kona_wdt_remove(struct platform_device * pdev)313*4882a593Smuzhiyun static int bcm_kona_wdt_remove(struct platform_device *pdev)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun bcm_kona_wdt_debug_exit(pdev);
316*4882a593Smuzhiyun dev_dbg(&pdev->dev, "Watchdog driver disabled");
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun return 0;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun static const struct of_device_id bcm_kona_wdt_of_match[] = {
322*4882a593Smuzhiyun { .compatible = "brcm,kona-wdt", },
323*4882a593Smuzhiyun {},
324*4882a593Smuzhiyun };
325*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, bcm_kona_wdt_of_match);
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun static struct platform_driver bcm_kona_wdt_driver = {
328*4882a593Smuzhiyun .driver = {
329*4882a593Smuzhiyun .name = BCM_KONA_WDT_NAME,
330*4882a593Smuzhiyun .of_match_table = bcm_kona_wdt_of_match,
331*4882a593Smuzhiyun },
332*4882a593Smuzhiyun .probe = bcm_kona_wdt_probe,
333*4882a593Smuzhiyun .remove = bcm_kona_wdt_remove,
334*4882a593Smuzhiyun };
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun module_platform_driver(bcm_kona_wdt_driver);
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun MODULE_ALIAS("platform:" BCM_KONA_WDT_NAME);
339*4882a593Smuzhiyun MODULE_AUTHOR("Markus Mayer <mmayer@broadcom.com>");
340*4882a593Smuzhiyun MODULE_DESCRIPTION("Broadcom Kona Watchdog Driver");
341*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
342