1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * w1_ds28e04.c - w1 family 1C (DS28E04) driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2012 Markus Franke <franke.m@sebakmt.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/moduleparam.h>
11*4882a593Smuzhiyun #include <linux/device.h>
12*4882a593Smuzhiyun #include <linux/types.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/crc16.h>
16*4882a593Smuzhiyun #include <linux/uaccess.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define CRC16_INIT 0
19*4882a593Smuzhiyun #define CRC16_VALID 0xb001
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <linux/w1.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define W1_FAMILY_DS28E04 0x1C
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /* Allow the strong pullup to be disabled, but default to enabled.
26*4882a593Smuzhiyun * If it was disabled a parasite powered device might not get the required
27*4882a593Smuzhiyun * current to copy the data from the scratchpad to EEPROM. If it is enabled
28*4882a593Smuzhiyun * parasite powered devices have a better chance of getting the current
29*4882a593Smuzhiyun * required.
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun static int w1_strong_pullup = 1;
32*4882a593Smuzhiyun module_param_named(strong_pullup, w1_strong_pullup, int, 0);
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /* enable/disable CRC checking on DS28E04-100 memory accesses */
35*4882a593Smuzhiyun static bool w1_enable_crccheck = true;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define W1_EEPROM_SIZE 512
38*4882a593Smuzhiyun #define W1_PAGE_COUNT 16
39*4882a593Smuzhiyun #define W1_PAGE_SIZE 32
40*4882a593Smuzhiyun #define W1_PAGE_BITS 5
41*4882a593Smuzhiyun #define W1_PAGE_MASK 0x1F
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #define W1_F1C_READ_EEPROM 0xF0
44*4882a593Smuzhiyun #define W1_F1C_WRITE_SCRATCH 0x0F
45*4882a593Smuzhiyun #define W1_F1C_READ_SCRATCH 0xAA
46*4882a593Smuzhiyun #define W1_F1C_COPY_SCRATCH 0x55
47*4882a593Smuzhiyun #define W1_F1C_ACCESS_WRITE 0x5A
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define W1_1C_REG_LOGIC_STATE 0x220
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun struct w1_f1C_data {
52*4882a593Smuzhiyun u8 memory[W1_EEPROM_SIZE];
53*4882a593Smuzhiyun u32 validcrc;
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /**
57*4882a593Smuzhiyun * Check the file size bounds and adjusts count as needed.
58*4882a593Smuzhiyun * This would not be needed if the file size didn't reset to 0 after a write.
59*4882a593Smuzhiyun */
w1_f1C_fix_count(loff_t off,size_t count,size_t size)60*4882a593Smuzhiyun static inline size_t w1_f1C_fix_count(loff_t off, size_t count, size_t size)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun if (off > size)
63*4882a593Smuzhiyun return 0;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun if ((off + count) > size)
66*4882a593Smuzhiyun return size - off;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun return count;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
w1_f1C_refresh_block(struct w1_slave * sl,struct w1_f1C_data * data,int block)71*4882a593Smuzhiyun static int w1_f1C_refresh_block(struct w1_slave *sl, struct w1_f1C_data *data,
72*4882a593Smuzhiyun int block)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun u8 wrbuf[3];
75*4882a593Smuzhiyun int off = block * W1_PAGE_SIZE;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun if (data->validcrc & (1 << block))
78*4882a593Smuzhiyun return 0;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun if (w1_reset_select_slave(sl)) {
81*4882a593Smuzhiyun data->validcrc = 0;
82*4882a593Smuzhiyun return -EIO;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun wrbuf[0] = W1_F1C_READ_EEPROM;
86*4882a593Smuzhiyun wrbuf[1] = off & 0xff;
87*4882a593Smuzhiyun wrbuf[2] = off >> 8;
88*4882a593Smuzhiyun w1_write_block(sl->master, wrbuf, 3);
89*4882a593Smuzhiyun w1_read_block(sl->master, &data->memory[off], W1_PAGE_SIZE);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /* cache the block if the CRC is valid */
92*4882a593Smuzhiyun if (crc16(CRC16_INIT, &data->memory[off], W1_PAGE_SIZE) == CRC16_VALID)
93*4882a593Smuzhiyun data->validcrc |= (1 << block);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
w1_f1C_read(struct w1_slave * sl,int addr,int len,char * data)98*4882a593Smuzhiyun static int w1_f1C_read(struct w1_slave *sl, int addr, int len, char *data)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun u8 wrbuf[3];
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun /* read directly from the EEPROM */
103*4882a593Smuzhiyun if (w1_reset_select_slave(sl))
104*4882a593Smuzhiyun return -EIO;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun wrbuf[0] = W1_F1C_READ_EEPROM;
107*4882a593Smuzhiyun wrbuf[1] = addr & 0xff;
108*4882a593Smuzhiyun wrbuf[2] = addr >> 8;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun w1_write_block(sl->master, wrbuf, sizeof(wrbuf));
111*4882a593Smuzhiyun return w1_read_block(sl->master, data, len);
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
eeprom_read(struct file * filp,struct kobject * kobj,struct bin_attribute * bin_attr,char * buf,loff_t off,size_t count)114*4882a593Smuzhiyun static ssize_t eeprom_read(struct file *filp, struct kobject *kobj,
115*4882a593Smuzhiyun struct bin_attribute *bin_attr, char *buf,
116*4882a593Smuzhiyun loff_t off, size_t count)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun struct w1_slave *sl = kobj_to_w1_slave(kobj);
119*4882a593Smuzhiyun struct w1_f1C_data *data = sl->family_data;
120*4882a593Smuzhiyun int i, min_page, max_page;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun count = w1_f1C_fix_count(off, count, W1_EEPROM_SIZE);
123*4882a593Smuzhiyun if (count == 0)
124*4882a593Smuzhiyun return 0;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun mutex_lock(&sl->master->mutex);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun if (w1_enable_crccheck) {
129*4882a593Smuzhiyun min_page = (off >> W1_PAGE_BITS);
130*4882a593Smuzhiyun max_page = (off + count - 1) >> W1_PAGE_BITS;
131*4882a593Smuzhiyun for (i = min_page; i <= max_page; i++) {
132*4882a593Smuzhiyun if (w1_f1C_refresh_block(sl, data, i)) {
133*4882a593Smuzhiyun count = -EIO;
134*4882a593Smuzhiyun goto out_up;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun memcpy(buf, &data->memory[off], count);
138*4882a593Smuzhiyun } else {
139*4882a593Smuzhiyun count = w1_f1C_read(sl, off, count, buf);
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun out_up:
143*4882a593Smuzhiyun mutex_unlock(&sl->master->mutex);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun return count;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun /**
149*4882a593Smuzhiyun * Writes to the scratchpad and reads it back for verification.
150*4882a593Smuzhiyun * Then copies the scratchpad to EEPROM.
151*4882a593Smuzhiyun * The data must be on one page.
152*4882a593Smuzhiyun * The master must be locked.
153*4882a593Smuzhiyun *
154*4882a593Smuzhiyun * @param sl The slave structure
155*4882a593Smuzhiyun * @param addr Address for the write
156*4882a593Smuzhiyun * @param len length must be <= (W1_PAGE_SIZE - (addr & W1_PAGE_MASK))
157*4882a593Smuzhiyun * @param data The data to write
158*4882a593Smuzhiyun * @return 0=Success -1=failure
159*4882a593Smuzhiyun */
w1_f1C_write(struct w1_slave * sl,int addr,int len,const u8 * data)160*4882a593Smuzhiyun static int w1_f1C_write(struct w1_slave *sl, int addr, int len, const u8 *data)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun u8 wrbuf[4];
163*4882a593Smuzhiyun u8 rdbuf[W1_PAGE_SIZE + 3];
164*4882a593Smuzhiyun u8 es = (addr + len - 1) & 0x1f;
165*4882a593Smuzhiyun unsigned int tm = 10;
166*4882a593Smuzhiyun int i;
167*4882a593Smuzhiyun struct w1_f1C_data *f1C = sl->family_data;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun /* Write the data to the scratchpad */
170*4882a593Smuzhiyun if (w1_reset_select_slave(sl))
171*4882a593Smuzhiyun return -1;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun wrbuf[0] = W1_F1C_WRITE_SCRATCH;
174*4882a593Smuzhiyun wrbuf[1] = addr & 0xff;
175*4882a593Smuzhiyun wrbuf[2] = addr >> 8;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun w1_write_block(sl->master, wrbuf, 3);
178*4882a593Smuzhiyun w1_write_block(sl->master, data, len);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun /* Read the scratchpad and verify */
181*4882a593Smuzhiyun if (w1_reset_select_slave(sl))
182*4882a593Smuzhiyun return -1;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun w1_write_8(sl->master, W1_F1C_READ_SCRATCH);
185*4882a593Smuzhiyun w1_read_block(sl->master, rdbuf, len + 3);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /* Compare what was read against the data written */
188*4882a593Smuzhiyun if ((rdbuf[0] != wrbuf[1]) || (rdbuf[1] != wrbuf[2]) ||
189*4882a593Smuzhiyun (rdbuf[2] != es) || (memcmp(data, &rdbuf[3], len) != 0))
190*4882a593Smuzhiyun return -1;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* Copy the scratchpad to EEPROM */
193*4882a593Smuzhiyun if (w1_reset_select_slave(sl))
194*4882a593Smuzhiyun return -1;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun wrbuf[0] = W1_F1C_COPY_SCRATCH;
197*4882a593Smuzhiyun wrbuf[3] = es;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun for (i = 0; i < sizeof(wrbuf); ++i) {
200*4882a593Smuzhiyun /* issue 10ms strong pullup (or delay) on the last byte
201*4882a593Smuzhiyun for writing the data from the scratchpad to EEPROM */
202*4882a593Smuzhiyun if (w1_strong_pullup && i == sizeof(wrbuf)-1)
203*4882a593Smuzhiyun w1_next_pullup(sl->master, tm);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun w1_write_8(sl->master, wrbuf[i]);
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun if (!w1_strong_pullup)
209*4882a593Smuzhiyun msleep(tm);
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun if (w1_enable_crccheck) {
212*4882a593Smuzhiyun /* invalidate cached data */
213*4882a593Smuzhiyun f1C->validcrc &= ~(1 << (addr >> W1_PAGE_BITS));
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun /* Reset the bus to wake up the EEPROM (this may not be needed) */
217*4882a593Smuzhiyun w1_reset_bus(sl->master);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun return 0;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
eeprom_write(struct file * filp,struct kobject * kobj,struct bin_attribute * bin_attr,char * buf,loff_t off,size_t count)222*4882a593Smuzhiyun static ssize_t eeprom_write(struct file *filp, struct kobject *kobj,
223*4882a593Smuzhiyun struct bin_attribute *bin_attr, char *buf,
224*4882a593Smuzhiyun loff_t off, size_t count)
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun struct w1_slave *sl = kobj_to_w1_slave(kobj);
228*4882a593Smuzhiyun int addr, len, idx;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun count = w1_f1C_fix_count(off, count, W1_EEPROM_SIZE);
231*4882a593Smuzhiyun if (count == 0)
232*4882a593Smuzhiyun return 0;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun if (w1_enable_crccheck) {
235*4882a593Smuzhiyun /* can only write full blocks in cached mode */
236*4882a593Smuzhiyun if ((off & W1_PAGE_MASK) || (count & W1_PAGE_MASK)) {
237*4882a593Smuzhiyun dev_err(&sl->dev, "invalid offset/count off=%d cnt=%zd\n",
238*4882a593Smuzhiyun (int)off, count);
239*4882a593Smuzhiyun return -EINVAL;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun /* make sure the block CRCs are valid */
243*4882a593Smuzhiyun for (idx = 0; idx < count; idx += W1_PAGE_SIZE) {
244*4882a593Smuzhiyun if (crc16(CRC16_INIT, &buf[idx], W1_PAGE_SIZE)
245*4882a593Smuzhiyun != CRC16_VALID) {
246*4882a593Smuzhiyun dev_err(&sl->dev, "bad CRC at offset %d\n",
247*4882a593Smuzhiyun (int)off);
248*4882a593Smuzhiyun return -EINVAL;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun mutex_lock(&sl->master->mutex);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun /* Can only write data to one page at a time */
256*4882a593Smuzhiyun idx = 0;
257*4882a593Smuzhiyun while (idx < count) {
258*4882a593Smuzhiyun addr = off + idx;
259*4882a593Smuzhiyun len = W1_PAGE_SIZE - (addr & W1_PAGE_MASK);
260*4882a593Smuzhiyun if (len > (count - idx))
261*4882a593Smuzhiyun len = count - idx;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if (w1_f1C_write(sl, addr, len, &buf[idx]) < 0) {
264*4882a593Smuzhiyun count = -EIO;
265*4882a593Smuzhiyun goto out_up;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun idx += len;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun out_up:
271*4882a593Smuzhiyun mutex_unlock(&sl->master->mutex);
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun return count;
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun static BIN_ATTR_RW(eeprom, W1_EEPROM_SIZE);
277*4882a593Smuzhiyun
pio_read(struct file * filp,struct kobject * kobj,struct bin_attribute * bin_attr,char * buf,loff_t off,size_t count)278*4882a593Smuzhiyun static ssize_t pio_read(struct file *filp, struct kobject *kobj,
279*4882a593Smuzhiyun struct bin_attribute *bin_attr, char *buf, loff_t off,
280*4882a593Smuzhiyun size_t count)
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun struct w1_slave *sl = kobj_to_w1_slave(kobj);
284*4882a593Smuzhiyun int ret;
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun /* check arguments */
287*4882a593Smuzhiyun if (off != 0 || count != 1 || buf == NULL)
288*4882a593Smuzhiyun return -EINVAL;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun mutex_lock(&sl->master->mutex);
291*4882a593Smuzhiyun ret = w1_f1C_read(sl, W1_1C_REG_LOGIC_STATE, count, buf);
292*4882a593Smuzhiyun mutex_unlock(&sl->master->mutex);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun return ret;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
pio_write(struct file * filp,struct kobject * kobj,struct bin_attribute * bin_attr,char * buf,loff_t off,size_t count)297*4882a593Smuzhiyun static ssize_t pio_write(struct file *filp, struct kobject *kobj,
298*4882a593Smuzhiyun struct bin_attribute *bin_attr, char *buf, loff_t off,
299*4882a593Smuzhiyun size_t count)
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun struct w1_slave *sl = kobj_to_w1_slave(kobj);
303*4882a593Smuzhiyun u8 wrbuf[3];
304*4882a593Smuzhiyun u8 ack;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun /* check arguments */
307*4882a593Smuzhiyun if (off != 0 || count != 1 || buf == NULL)
308*4882a593Smuzhiyun return -EINVAL;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun mutex_lock(&sl->master->mutex);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun /* Write the PIO data */
313*4882a593Smuzhiyun if (w1_reset_select_slave(sl)) {
314*4882a593Smuzhiyun mutex_unlock(&sl->master->mutex);
315*4882a593Smuzhiyun return -1;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun /* set bit 7..2 to value '1' */
319*4882a593Smuzhiyun *buf = *buf | 0xFC;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun wrbuf[0] = W1_F1C_ACCESS_WRITE;
322*4882a593Smuzhiyun wrbuf[1] = *buf;
323*4882a593Smuzhiyun wrbuf[2] = ~(*buf);
324*4882a593Smuzhiyun w1_write_block(sl->master, wrbuf, 3);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun w1_read_block(sl->master, &ack, sizeof(ack));
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun mutex_unlock(&sl->master->mutex);
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun /* check for acknowledgement */
331*4882a593Smuzhiyun if (ack != 0xAA)
332*4882a593Smuzhiyun return -EIO;
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun return count;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun static BIN_ATTR_RW(pio, 1);
338*4882a593Smuzhiyun
crccheck_show(struct device * dev,struct device_attribute * attr,char * buf)339*4882a593Smuzhiyun static ssize_t crccheck_show(struct device *dev, struct device_attribute *attr,
340*4882a593Smuzhiyun char *buf)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun return sysfs_emit(buf, "%d\n", w1_enable_crccheck);
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun
crccheck_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)345*4882a593Smuzhiyun static ssize_t crccheck_store(struct device *dev, struct device_attribute *attr,
346*4882a593Smuzhiyun const char *buf, size_t count)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun int err = kstrtobool(buf, &w1_enable_crccheck);
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun if (err)
351*4882a593Smuzhiyun return err;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun return count;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun static DEVICE_ATTR_RW(crccheck);
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun static struct attribute *w1_f1C_attrs[] = {
359*4882a593Smuzhiyun &dev_attr_crccheck.attr,
360*4882a593Smuzhiyun NULL,
361*4882a593Smuzhiyun };
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun static struct bin_attribute *w1_f1C_bin_attrs[] = {
364*4882a593Smuzhiyun &bin_attr_eeprom,
365*4882a593Smuzhiyun &bin_attr_pio,
366*4882a593Smuzhiyun NULL,
367*4882a593Smuzhiyun };
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun static const struct attribute_group w1_f1C_group = {
370*4882a593Smuzhiyun .attrs = w1_f1C_attrs,
371*4882a593Smuzhiyun .bin_attrs = w1_f1C_bin_attrs,
372*4882a593Smuzhiyun };
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun static const struct attribute_group *w1_f1C_groups[] = {
375*4882a593Smuzhiyun &w1_f1C_group,
376*4882a593Smuzhiyun NULL,
377*4882a593Smuzhiyun };
378*4882a593Smuzhiyun
w1_f1C_add_slave(struct w1_slave * sl)379*4882a593Smuzhiyun static int w1_f1C_add_slave(struct w1_slave *sl)
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun struct w1_f1C_data *data = NULL;
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun if (w1_enable_crccheck) {
384*4882a593Smuzhiyun data = kzalloc(sizeof(struct w1_f1C_data), GFP_KERNEL);
385*4882a593Smuzhiyun if (!data)
386*4882a593Smuzhiyun return -ENOMEM;
387*4882a593Smuzhiyun sl->family_data = data;
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun return 0;
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun
w1_f1C_remove_slave(struct w1_slave * sl)393*4882a593Smuzhiyun static void w1_f1C_remove_slave(struct w1_slave *sl)
394*4882a593Smuzhiyun {
395*4882a593Smuzhiyun kfree(sl->family_data);
396*4882a593Smuzhiyun sl->family_data = NULL;
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun static const struct w1_family_ops w1_f1C_fops = {
400*4882a593Smuzhiyun .add_slave = w1_f1C_add_slave,
401*4882a593Smuzhiyun .remove_slave = w1_f1C_remove_slave,
402*4882a593Smuzhiyun .groups = w1_f1C_groups,
403*4882a593Smuzhiyun };
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun static struct w1_family w1_family_1C = {
406*4882a593Smuzhiyun .fid = W1_FAMILY_DS28E04,
407*4882a593Smuzhiyun .fops = &w1_f1C_fops,
408*4882a593Smuzhiyun };
409*4882a593Smuzhiyun module_w1_family(w1_family_1C);
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun MODULE_AUTHOR("Markus Franke <franke.m@sebakmt.com>, <franm@hrz.tu-chemnitz.de>");
412*4882a593Smuzhiyun MODULE_DESCRIPTION("w1 family 1C driver for DS28E04, 4kb EEPROM and PIO");
413*4882a593Smuzhiyun MODULE_LICENSE("GPL");
414*4882a593Smuzhiyun MODULE_ALIAS("w1-family-" __stringify(W1_FAMILY_DS28E04));
415