1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * sgi_w1.c - w1 master driver for one wire support in SGI ASICs
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/clk.h>
7*4882a593Smuzhiyun #include <linux/delay.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/jiffies.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/platform_data/sgi-w1.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/w1.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define MCR_RD_DATA BIT(0)
18*4882a593Smuzhiyun #define MCR_DONE BIT(1)
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define MCR_PACK(pulse, sample) (((pulse) << 10) | ((sample) << 2))
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun struct sgi_w1_device {
23*4882a593Smuzhiyun u32 __iomem *mcr;
24*4882a593Smuzhiyun struct w1_bus_master bus_master;
25*4882a593Smuzhiyun char dev_id[64];
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun
sgi_w1_wait(u32 __iomem * mcr)28*4882a593Smuzhiyun static u8 sgi_w1_wait(u32 __iomem *mcr)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun u32 mcr_val;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun do {
33*4882a593Smuzhiyun mcr_val = readl(mcr);
34*4882a593Smuzhiyun } while (!(mcr_val & MCR_DONE));
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun return (mcr_val & MCR_RD_DATA) ? 1 : 0;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /*
40*4882a593Smuzhiyun * this is the low level routine to
41*4882a593Smuzhiyun * reset the device on the One Wire interface
42*4882a593Smuzhiyun * on the hardware
43*4882a593Smuzhiyun */
sgi_w1_reset_bus(void * data)44*4882a593Smuzhiyun static u8 sgi_w1_reset_bus(void *data)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun struct sgi_w1_device *dev = data;
47*4882a593Smuzhiyun u8 ret;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun writel(MCR_PACK(520, 65), dev->mcr);
50*4882a593Smuzhiyun ret = sgi_w1_wait(dev->mcr);
51*4882a593Smuzhiyun udelay(500); /* recovery time */
52*4882a593Smuzhiyun return ret;
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /*
56*4882a593Smuzhiyun * this is the low level routine to read/write a bit on the One Wire
57*4882a593Smuzhiyun * interface on the hardware. It does write 0 if parameter bit is set
58*4882a593Smuzhiyun * to 0, otherwise a write 1/read.
59*4882a593Smuzhiyun */
sgi_w1_touch_bit(void * data,u8 bit)60*4882a593Smuzhiyun static u8 sgi_w1_touch_bit(void *data, u8 bit)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun struct sgi_w1_device *dev = data;
63*4882a593Smuzhiyun u8 ret;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun if (bit)
66*4882a593Smuzhiyun writel(MCR_PACK(6, 13), dev->mcr);
67*4882a593Smuzhiyun else
68*4882a593Smuzhiyun writel(MCR_PACK(80, 30), dev->mcr);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun ret = sgi_w1_wait(dev->mcr);
71*4882a593Smuzhiyun if (bit)
72*4882a593Smuzhiyun udelay(100); /* recovery */
73*4882a593Smuzhiyun return ret;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
sgi_w1_probe(struct platform_device * pdev)76*4882a593Smuzhiyun static int sgi_w1_probe(struct platform_device *pdev)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct sgi_w1_device *sdev;
79*4882a593Smuzhiyun struct sgi_w1_platform_data *pdata;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun sdev = devm_kzalloc(&pdev->dev, sizeof(struct sgi_w1_device),
82*4882a593Smuzhiyun GFP_KERNEL);
83*4882a593Smuzhiyun if (!sdev)
84*4882a593Smuzhiyun return -ENOMEM;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun sdev->mcr = devm_platform_ioremap_resource(pdev, 0);
87*4882a593Smuzhiyun if (IS_ERR(sdev->mcr))
88*4882a593Smuzhiyun return PTR_ERR(sdev->mcr);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun sdev->bus_master.data = sdev;
91*4882a593Smuzhiyun sdev->bus_master.reset_bus = sgi_w1_reset_bus;
92*4882a593Smuzhiyun sdev->bus_master.touch_bit = sgi_w1_touch_bit;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun pdata = dev_get_platdata(&pdev->dev);
95*4882a593Smuzhiyun if (pdata) {
96*4882a593Smuzhiyun strlcpy(sdev->dev_id, pdata->dev_id, sizeof(sdev->dev_id));
97*4882a593Smuzhiyun sdev->bus_master.dev_id = sdev->dev_id;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun platform_set_drvdata(pdev, sdev);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return w1_add_master_device(&sdev->bus_master);
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /*
106*4882a593Smuzhiyun * disassociate the w1 device from the driver
107*4882a593Smuzhiyun */
sgi_w1_remove(struct platform_device * pdev)108*4882a593Smuzhiyun static int sgi_w1_remove(struct platform_device *pdev)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun struct sgi_w1_device *sdev = platform_get_drvdata(pdev);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun w1_remove_master_device(&sdev->bus_master);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun static struct platform_driver sgi_w1_driver = {
118*4882a593Smuzhiyun .driver = {
119*4882a593Smuzhiyun .name = "sgi_w1",
120*4882a593Smuzhiyun },
121*4882a593Smuzhiyun .probe = sgi_w1_probe,
122*4882a593Smuzhiyun .remove = sgi_w1_remove,
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun module_platform_driver(sgi_w1_driver);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun MODULE_LICENSE("GPL");
127*4882a593Smuzhiyun MODULE_AUTHOR("Thomas Bogendoerfer");
128*4882a593Smuzhiyun MODULE_DESCRIPTION("Driver for One-Wire IP in SGI ASICs");
129