1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Virtio PCI driver - modern (virtio 1.0) device support
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This module allows virtio devices to be used over a virtual PCI device.
6*4882a593Smuzhiyun * This can be used with QEMU based VMMs like KVM or Xen.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright IBM Corp. 2007
9*4882a593Smuzhiyun * Copyright Red Hat, Inc. 2014
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Authors:
12*4882a593Smuzhiyun * Anthony Liguori <aliguori@us.ibm.com>
13*4882a593Smuzhiyun * Rusty Russell <rusty@rustcorp.com.au>
14*4882a593Smuzhiyun * Michael S. Tsirkin <mst@redhat.com>
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <linux/delay.h>
18*4882a593Smuzhiyun #define VIRTIO_PCI_NO_LEGACY
19*4882a593Smuzhiyun #define VIRTIO_RING_NO_LEGACY
20*4882a593Smuzhiyun #include "virtio_pci_common.h"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun * Type-safe wrappers for io accesses.
24*4882a593Smuzhiyun * Use these to enforce at compile time the following spec requirement:
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun * The driver MUST access each field using the “natural” access
27*4882a593Smuzhiyun * method, i.e. 32-bit accesses for 32-bit fields, 16-bit accesses
28*4882a593Smuzhiyun * for 16-bit fields and 8-bit accesses for 8-bit fields.
29*4882a593Smuzhiyun */
vp_ioread8(const u8 __iomem * addr)30*4882a593Smuzhiyun static inline u8 vp_ioread8(const u8 __iomem *addr)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun return ioread8(addr);
33*4882a593Smuzhiyun }
vp_ioread16(const __le16 __iomem * addr)34*4882a593Smuzhiyun static inline u16 vp_ioread16 (const __le16 __iomem *addr)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun return ioread16(addr);
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
vp_ioread32(const __le32 __iomem * addr)39*4882a593Smuzhiyun static inline u32 vp_ioread32(const __le32 __iomem *addr)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun return ioread32(addr);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
vp_iowrite8(u8 value,u8 __iomem * addr)44*4882a593Smuzhiyun static inline void vp_iowrite8(u8 value, u8 __iomem *addr)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun iowrite8(value, addr);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
vp_iowrite16(u16 value,__le16 __iomem * addr)49*4882a593Smuzhiyun static inline void vp_iowrite16(u16 value, __le16 __iomem *addr)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun iowrite16(value, addr);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
vp_iowrite32(u32 value,__le32 __iomem * addr)54*4882a593Smuzhiyun static inline void vp_iowrite32(u32 value, __le32 __iomem *addr)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun iowrite32(value, addr);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
vp_iowrite64_twopart(u64 val,__le32 __iomem * lo,__le32 __iomem * hi)59*4882a593Smuzhiyun static void vp_iowrite64_twopart(u64 val,
60*4882a593Smuzhiyun __le32 __iomem *lo, __le32 __iomem *hi)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun vp_iowrite32((u32)val, lo);
63*4882a593Smuzhiyun vp_iowrite32(val >> 32, hi);
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
map_capability(struct pci_dev * dev,int off,size_t minlen,u32 align,u32 start,u32 size,size_t * len)66*4882a593Smuzhiyun static void __iomem *map_capability(struct pci_dev *dev, int off,
67*4882a593Smuzhiyun size_t minlen,
68*4882a593Smuzhiyun u32 align,
69*4882a593Smuzhiyun u32 start, u32 size,
70*4882a593Smuzhiyun size_t *len)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun u8 bar;
73*4882a593Smuzhiyun u32 offset, length;
74*4882a593Smuzhiyun void __iomem *p;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun pci_read_config_byte(dev, off + offsetof(struct virtio_pci_cap,
77*4882a593Smuzhiyun bar),
78*4882a593Smuzhiyun &bar);
79*4882a593Smuzhiyun pci_read_config_dword(dev, off + offsetof(struct virtio_pci_cap, offset),
80*4882a593Smuzhiyun &offset);
81*4882a593Smuzhiyun pci_read_config_dword(dev, off + offsetof(struct virtio_pci_cap, length),
82*4882a593Smuzhiyun &length);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun if (length <= start) {
85*4882a593Smuzhiyun dev_err(&dev->dev,
86*4882a593Smuzhiyun "virtio_pci: bad capability len %u (>%u expected)\n",
87*4882a593Smuzhiyun length, start);
88*4882a593Smuzhiyun return NULL;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun if (length - start < minlen) {
92*4882a593Smuzhiyun dev_err(&dev->dev,
93*4882a593Smuzhiyun "virtio_pci: bad capability len %u (>=%zu expected)\n",
94*4882a593Smuzhiyun length, minlen);
95*4882a593Smuzhiyun return NULL;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun length -= start;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun if (start + offset < offset) {
101*4882a593Smuzhiyun dev_err(&dev->dev,
102*4882a593Smuzhiyun "virtio_pci: map wrap-around %u+%u\n",
103*4882a593Smuzhiyun start, offset);
104*4882a593Smuzhiyun return NULL;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun offset += start;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun if (offset & (align - 1)) {
110*4882a593Smuzhiyun dev_err(&dev->dev,
111*4882a593Smuzhiyun "virtio_pci: offset %u not aligned to %u\n",
112*4882a593Smuzhiyun offset, align);
113*4882a593Smuzhiyun return NULL;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun if (length > size)
117*4882a593Smuzhiyun length = size;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun if (len)
120*4882a593Smuzhiyun *len = length;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun if (minlen + offset < minlen ||
123*4882a593Smuzhiyun minlen + offset > pci_resource_len(dev, bar)) {
124*4882a593Smuzhiyun dev_err(&dev->dev,
125*4882a593Smuzhiyun "virtio_pci: map virtio %zu@%u "
126*4882a593Smuzhiyun "out of range on bar %i length %lu\n",
127*4882a593Smuzhiyun minlen, offset,
128*4882a593Smuzhiyun bar, (unsigned long)pci_resource_len(dev, bar));
129*4882a593Smuzhiyun return NULL;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun p = pci_iomap_range(dev, bar, offset, length);
133*4882a593Smuzhiyun if (!p)
134*4882a593Smuzhiyun dev_err(&dev->dev,
135*4882a593Smuzhiyun "virtio_pci: unable to map virtio %u@%u on bar %i\n",
136*4882a593Smuzhiyun length, offset, bar);
137*4882a593Smuzhiyun return p;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* virtio config->get_features() implementation */
vp_get_features(struct virtio_device * vdev)141*4882a593Smuzhiyun static u64 vp_get_features(struct virtio_device *vdev)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun struct virtio_pci_device *vp_dev = to_vp_device(vdev);
144*4882a593Smuzhiyun u64 features;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun vp_iowrite32(0, &vp_dev->common->device_feature_select);
147*4882a593Smuzhiyun features = vp_ioread32(&vp_dev->common->device_feature);
148*4882a593Smuzhiyun vp_iowrite32(1, &vp_dev->common->device_feature_select);
149*4882a593Smuzhiyun features |= ((u64)vp_ioread32(&vp_dev->common->device_feature) << 32);
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun return features;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
vp_transport_features(struct virtio_device * vdev,u64 features)154*4882a593Smuzhiyun static void vp_transport_features(struct virtio_device *vdev, u64 features)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun struct virtio_pci_device *vp_dev = to_vp_device(vdev);
157*4882a593Smuzhiyun struct pci_dev *pci_dev = vp_dev->pci_dev;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun if ((features & BIT_ULL(VIRTIO_F_SR_IOV)) &&
160*4882a593Smuzhiyun pci_find_ext_capability(pci_dev, PCI_EXT_CAP_ID_SRIOV))
161*4882a593Smuzhiyun __virtio_set_bit(vdev, VIRTIO_F_SR_IOV);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun /* virtio config->finalize_features() implementation */
vp_finalize_features(struct virtio_device * vdev)165*4882a593Smuzhiyun static int vp_finalize_features(struct virtio_device *vdev)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun struct virtio_pci_device *vp_dev = to_vp_device(vdev);
168*4882a593Smuzhiyun u64 features = vdev->features;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun /* Give virtio_ring a chance to accept features. */
171*4882a593Smuzhiyun vring_transport_features(vdev);
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun /* Give virtio_pci a chance to accept features. */
174*4882a593Smuzhiyun vp_transport_features(vdev, features);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun if (!__virtio_test_bit(vdev, VIRTIO_F_VERSION_1)) {
177*4882a593Smuzhiyun dev_err(&vdev->dev, "virtio: device uses modern interface "
178*4882a593Smuzhiyun "but does not have VIRTIO_F_VERSION_1\n");
179*4882a593Smuzhiyun return -EINVAL;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun vp_iowrite32(0, &vp_dev->common->guest_feature_select);
183*4882a593Smuzhiyun vp_iowrite32((u32)vdev->features, &vp_dev->common->guest_feature);
184*4882a593Smuzhiyun vp_iowrite32(1, &vp_dev->common->guest_feature_select);
185*4882a593Smuzhiyun vp_iowrite32(vdev->features >> 32, &vp_dev->common->guest_feature);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun return 0;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /* virtio config->get() implementation */
vp_get(struct virtio_device * vdev,unsigned offset,void * buf,unsigned len)191*4882a593Smuzhiyun static void vp_get(struct virtio_device *vdev, unsigned offset,
192*4882a593Smuzhiyun void *buf, unsigned len)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun struct virtio_pci_device *vp_dev = to_vp_device(vdev);
195*4882a593Smuzhiyun u8 b;
196*4882a593Smuzhiyun __le16 w;
197*4882a593Smuzhiyun __le32 l;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun BUG_ON(offset + len > vp_dev->device_len);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun switch (len) {
202*4882a593Smuzhiyun case 1:
203*4882a593Smuzhiyun b = ioread8(vp_dev->device + offset);
204*4882a593Smuzhiyun memcpy(buf, &b, sizeof b);
205*4882a593Smuzhiyun break;
206*4882a593Smuzhiyun case 2:
207*4882a593Smuzhiyun w = cpu_to_le16(ioread16(vp_dev->device + offset));
208*4882a593Smuzhiyun memcpy(buf, &w, sizeof w);
209*4882a593Smuzhiyun break;
210*4882a593Smuzhiyun case 4:
211*4882a593Smuzhiyun l = cpu_to_le32(ioread32(vp_dev->device + offset));
212*4882a593Smuzhiyun memcpy(buf, &l, sizeof l);
213*4882a593Smuzhiyun break;
214*4882a593Smuzhiyun case 8:
215*4882a593Smuzhiyun l = cpu_to_le32(ioread32(vp_dev->device + offset));
216*4882a593Smuzhiyun memcpy(buf, &l, sizeof l);
217*4882a593Smuzhiyun l = cpu_to_le32(ioread32(vp_dev->device + offset + sizeof l));
218*4882a593Smuzhiyun memcpy(buf + sizeof l, &l, sizeof l);
219*4882a593Smuzhiyun break;
220*4882a593Smuzhiyun default:
221*4882a593Smuzhiyun BUG();
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* the config->set() implementation. it's symmetric to the config->get()
226*4882a593Smuzhiyun * implementation */
vp_set(struct virtio_device * vdev,unsigned offset,const void * buf,unsigned len)227*4882a593Smuzhiyun static void vp_set(struct virtio_device *vdev, unsigned offset,
228*4882a593Smuzhiyun const void *buf, unsigned len)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun struct virtio_pci_device *vp_dev = to_vp_device(vdev);
231*4882a593Smuzhiyun u8 b;
232*4882a593Smuzhiyun __le16 w;
233*4882a593Smuzhiyun __le32 l;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun BUG_ON(offset + len > vp_dev->device_len);
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun switch (len) {
238*4882a593Smuzhiyun case 1:
239*4882a593Smuzhiyun memcpy(&b, buf, sizeof b);
240*4882a593Smuzhiyun iowrite8(b, vp_dev->device + offset);
241*4882a593Smuzhiyun break;
242*4882a593Smuzhiyun case 2:
243*4882a593Smuzhiyun memcpy(&w, buf, sizeof w);
244*4882a593Smuzhiyun iowrite16(le16_to_cpu(w), vp_dev->device + offset);
245*4882a593Smuzhiyun break;
246*4882a593Smuzhiyun case 4:
247*4882a593Smuzhiyun memcpy(&l, buf, sizeof l);
248*4882a593Smuzhiyun iowrite32(le32_to_cpu(l), vp_dev->device + offset);
249*4882a593Smuzhiyun break;
250*4882a593Smuzhiyun case 8:
251*4882a593Smuzhiyun memcpy(&l, buf, sizeof l);
252*4882a593Smuzhiyun iowrite32(le32_to_cpu(l), vp_dev->device + offset);
253*4882a593Smuzhiyun memcpy(&l, buf + sizeof l, sizeof l);
254*4882a593Smuzhiyun iowrite32(le32_to_cpu(l), vp_dev->device + offset + sizeof l);
255*4882a593Smuzhiyun break;
256*4882a593Smuzhiyun default:
257*4882a593Smuzhiyun BUG();
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
vp_generation(struct virtio_device * vdev)261*4882a593Smuzhiyun static u32 vp_generation(struct virtio_device *vdev)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun struct virtio_pci_device *vp_dev = to_vp_device(vdev);
264*4882a593Smuzhiyun return vp_ioread8(&vp_dev->common->config_generation);
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun /* config->{get,set}_status() implementations */
vp_get_status(struct virtio_device * vdev)268*4882a593Smuzhiyun static u8 vp_get_status(struct virtio_device *vdev)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun struct virtio_pci_device *vp_dev = to_vp_device(vdev);
271*4882a593Smuzhiyun return vp_ioread8(&vp_dev->common->device_status);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
vp_set_status(struct virtio_device * vdev,u8 status)274*4882a593Smuzhiyun static void vp_set_status(struct virtio_device *vdev, u8 status)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun struct virtio_pci_device *vp_dev = to_vp_device(vdev);
277*4882a593Smuzhiyun /* We should never be setting status to 0. */
278*4882a593Smuzhiyun BUG_ON(status == 0);
279*4882a593Smuzhiyun vp_iowrite8(status, &vp_dev->common->device_status);
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
vp_reset(struct virtio_device * vdev)282*4882a593Smuzhiyun static void vp_reset(struct virtio_device *vdev)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun struct virtio_pci_device *vp_dev = to_vp_device(vdev);
285*4882a593Smuzhiyun /* 0 status means a reset. */
286*4882a593Smuzhiyun vp_iowrite8(0, &vp_dev->common->device_status);
287*4882a593Smuzhiyun /* After writing 0 to device_status, the driver MUST wait for a read of
288*4882a593Smuzhiyun * device_status to return 0 before reinitializing the device.
289*4882a593Smuzhiyun * This will flush out the status write, and flush in device writes,
290*4882a593Smuzhiyun * including MSI-X interrupts, if any.
291*4882a593Smuzhiyun */
292*4882a593Smuzhiyun while (vp_ioread8(&vp_dev->common->device_status))
293*4882a593Smuzhiyun msleep(1);
294*4882a593Smuzhiyun /* Flush pending VQ/configuration callbacks. */
295*4882a593Smuzhiyun vp_synchronize_vectors(vdev);
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun
vp_config_vector(struct virtio_pci_device * vp_dev,u16 vector)298*4882a593Smuzhiyun static u16 vp_config_vector(struct virtio_pci_device *vp_dev, u16 vector)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun /* Setup the vector used for configuration events */
301*4882a593Smuzhiyun vp_iowrite16(vector, &vp_dev->common->msix_config);
302*4882a593Smuzhiyun /* Verify we had enough resources to assign the vector */
303*4882a593Smuzhiyun /* Will also flush the write out to device */
304*4882a593Smuzhiyun return vp_ioread16(&vp_dev->common->msix_config);
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun
setup_vq(struct virtio_pci_device * vp_dev,struct virtio_pci_vq_info * info,unsigned index,void (* callback)(struct virtqueue * vq),const char * name,bool ctx,u16 msix_vec)307*4882a593Smuzhiyun static struct virtqueue *setup_vq(struct virtio_pci_device *vp_dev,
308*4882a593Smuzhiyun struct virtio_pci_vq_info *info,
309*4882a593Smuzhiyun unsigned index,
310*4882a593Smuzhiyun void (*callback)(struct virtqueue *vq),
311*4882a593Smuzhiyun const char *name,
312*4882a593Smuzhiyun bool ctx,
313*4882a593Smuzhiyun u16 msix_vec)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun struct virtio_pci_common_cfg __iomem *cfg = vp_dev->common;
316*4882a593Smuzhiyun struct virtqueue *vq;
317*4882a593Smuzhiyun u16 num, off;
318*4882a593Smuzhiyun int err;
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun if (index >= vp_ioread16(&cfg->num_queues))
321*4882a593Smuzhiyun return ERR_PTR(-ENOENT);
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun /* Select the queue we're interested in */
324*4882a593Smuzhiyun vp_iowrite16(index, &cfg->queue_select);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun /* Check if queue is either not available or already active. */
327*4882a593Smuzhiyun num = vp_ioread16(&cfg->queue_size);
328*4882a593Smuzhiyun if (!num || vp_ioread16(&cfg->queue_enable))
329*4882a593Smuzhiyun return ERR_PTR(-ENOENT);
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun if (num & (num - 1)) {
332*4882a593Smuzhiyun dev_warn(&vp_dev->pci_dev->dev, "bad queue size %u", num);
333*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun /* get offset of notification word for this vq */
337*4882a593Smuzhiyun off = vp_ioread16(&cfg->queue_notify_off);
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun info->msix_vector = msix_vec;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun /* create the vring */
342*4882a593Smuzhiyun vq = vring_create_virtqueue(index, num,
343*4882a593Smuzhiyun SMP_CACHE_BYTES, &vp_dev->vdev,
344*4882a593Smuzhiyun true, true, ctx,
345*4882a593Smuzhiyun vp_notify, callback, name);
346*4882a593Smuzhiyun if (!vq)
347*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun /* activate the queue */
350*4882a593Smuzhiyun vp_iowrite16(virtqueue_get_vring_size(vq), &cfg->queue_size);
351*4882a593Smuzhiyun vp_iowrite64_twopart(virtqueue_get_desc_addr(vq),
352*4882a593Smuzhiyun &cfg->queue_desc_lo, &cfg->queue_desc_hi);
353*4882a593Smuzhiyun vp_iowrite64_twopart(virtqueue_get_avail_addr(vq),
354*4882a593Smuzhiyun &cfg->queue_avail_lo, &cfg->queue_avail_hi);
355*4882a593Smuzhiyun vp_iowrite64_twopart(virtqueue_get_used_addr(vq),
356*4882a593Smuzhiyun &cfg->queue_used_lo, &cfg->queue_used_hi);
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun if (vp_dev->notify_base) {
359*4882a593Smuzhiyun /* offset should not wrap */
360*4882a593Smuzhiyun if ((u64)off * vp_dev->notify_offset_multiplier + 2
361*4882a593Smuzhiyun > vp_dev->notify_len) {
362*4882a593Smuzhiyun dev_warn(&vp_dev->pci_dev->dev,
363*4882a593Smuzhiyun "bad notification offset %u (x %u) "
364*4882a593Smuzhiyun "for queue %u > %zd",
365*4882a593Smuzhiyun off, vp_dev->notify_offset_multiplier,
366*4882a593Smuzhiyun index, vp_dev->notify_len);
367*4882a593Smuzhiyun err = -EINVAL;
368*4882a593Smuzhiyun goto err_map_notify;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun vq->priv = (void __force *)vp_dev->notify_base +
371*4882a593Smuzhiyun off * vp_dev->notify_offset_multiplier;
372*4882a593Smuzhiyun } else {
373*4882a593Smuzhiyun vq->priv = (void __force *)map_capability(vp_dev->pci_dev,
374*4882a593Smuzhiyun vp_dev->notify_map_cap, 2, 2,
375*4882a593Smuzhiyun off * vp_dev->notify_offset_multiplier, 2,
376*4882a593Smuzhiyun NULL);
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun if (!vq->priv) {
380*4882a593Smuzhiyun err = -ENOMEM;
381*4882a593Smuzhiyun goto err_map_notify;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun if (msix_vec != VIRTIO_MSI_NO_VECTOR) {
385*4882a593Smuzhiyun vp_iowrite16(msix_vec, &cfg->queue_msix_vector);
386*4882a593Smuzhiyun msix_vec = vp_ioread16(&cfg->queue_msix_vector);
387*4882a593Smuzhiyun if (msix_vec == VIRTIO_MSI_NO_VECTOR) {
388*4882a593Smuzhiyun err = -EBUSY;
389*4882a593Smuzhiyun goto err_assign_vector;
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun return vq;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun err_assign_vector:
396*4882a593Smuzhiyun if (!vp_dev->notify_base)
397*4882a593Smuzhiyun pci_iounmap(vp_dev->pci_dev, (void __iomem __force *)vq->priv);
398*4882a593Smuzhiyun err_map_notify:
399*4882a593Smuzhiyun vring_del_virtqueue(vq);
400*4882a593Smuzhiyun return ERR_PTR(err);
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun
vp_modern_find_vqs(struct virtio_device * vdev,unsigned nvqs,struct virtqueue * vqs[],vq_callback_t * callbacks[],const char * const names[],const bool * ctx,struct irq_affinity * desc)403*4882a593Smuzhiyun static int vp_modern_find_vqs(struct virtio_device *vdev, unsigned nvqs,
404*4882a593Smuzhiyun struct virtqueue *vqs[],
405*4882a593Smuzhiyun vq_callback_t *callbacks[],
406*4882a593Smuzhiyun const char * const names[], const bool *ctx,
407*4882a593Smuzhiyun struct irq_affinity *desc)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun struct virtio_pci_device *vp_dev = to_vp_device(vdev);
410*4882a593Smuzhiyun struct virtqueue *vq;
411*4882a593Smuzhiyun int rc = vp_find_vqs(vdev, nvqs, vqs, callbacks, names, ctx, desc);
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun if (rc)
414*4882a593Smuzhiyun return rc;
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun /* Select and activate all queues. Has to be done last: once we do
417*4882a593Smuzhiyun * this, there's no way to go back except reset.
418*4882a593Smuzhiyun */
419*4882a593Smuzhiyun list_for_each_entry(vq, &vdev->vqs, list) {
420*4882a593Smuzhiyun vp_iowrite16(vq->index, &vp_dev->common->queue_select);
421*4882a593Smuzhiyun vp_iowrite16(1, &vp_dev->common->queue_enable);
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun return 0;
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun
del_vq(struct virtio_pci_vq_info * info)427*4882a593Smuzhiyun static void del_vq(struct virtio_pci_vq_info *info)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun struct virtqueue *vq = info->vq;
430*4882a593Smuzhiyun struct virtio_pci_device *vp_dev = to_vp_device(vq->vdev);
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun vp_iowrite16(vq->index, &vp_dev->common->queue_select);
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun if (vp_dev->msix_enabled) {
435*4882a593Smuzhiyun vp_iowrite16(VIRTIO_MSI_NO_VECTOR,
436*4882a593Smuzhiyun &vp_dev->common->queue_msix_vector);
437*4882a593Smuzhiyun /* Flush the write out to device */
438*4882a593Smuzhiyun vp_ioread16(&vp_dev->common->queue_msix_vector);
439*4882a593Smuzhiyun }
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun if (!vp_dev->notify_base)
442*4882a593Smuzhiyun pci_iounmap(vp_dev->pci_dev, (void __force __iomem *)vq->priv);
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun vring_del_virtqueue(vq);
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun
virtio_pci_find_shm_cap(struct pci_dev * dev,u8 required_id,u8 * bar,u64 * offset,u64 * len)447*4882a593Smuzhiyun static int virtio_pci_find_shm_cap(struct pci_dev *dev, u8 required_id,
448*4882a593Smuzhiyun u8 *bar, u64 *offset, u64 *len)
449*4882a593Smuzhiyun {
450*4882a593Smuzhiyun int pos;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun for (pos = pci_find_capability(dev, PCI_CAP_ID_VNDR); pos > 0;
453*4882a593Smuzhiyun pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_VNDR)) {
454*4882a593Smuzhiyun u8 type, cap_len, id;
455*4882a593Smuzhiyun u32 tmp32;
456*4882a593Smuzhiyun u64 res_offset, res_length;
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap,
459*4882a593Smuzhiyun cfg_type), &type);
460*4882a593Smuzhiyun if (type != VIRTIO_PCI_CAP_SHARED_MEMORY_CFG)
461*4882a593Smuzhiyun continue;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap,
464*4882a593Smuzhiyun cap_len), &cap_len);
465*4882a593Smuzhiyun if (cap_len != sizeof(struct virtio_pci_cap64)) {
466*4882a593Smuzhiyun dev_err(&dev->dev, "%s: shm cap with bad size offset:"
467*4882a593Smuzhiyun " %d size: %d\n", __func__, pos, cap_len);
468*4882a593Smuzhiyun continue;
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap,
472*4882a593Smuzhiyun id), &id);
473*4882a593Smuzhiyun if (id != required_id)
474*4882a593Smuzhiyun continue;
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun /* Type, and ID match, looks good */
477*4882a593Smuzhiyun pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap,
478*4882a593Smuzhiyun bar), bar);
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun /* Read the lower 32bit of length and offset */
481*4882a593Smuzhiyun pci_read_config_dword(dev, pos + offsetof(struct virtio_pci_cap,
482*4882a593Smuzhiyun offset), &tmp32);
483*4882a593Smuzhiyun res_offset = tmp32;
484*4882a593Smuzhiyun pci_read_config_dword(dev, pos + offsetof(struct virtio_pci_cap,
485*4882a593Smuzhiyun length), &tmp32);
486*4882a593Smuzhiyun res_length = tmp32;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun /* and now the top half */
489*4882a593Smuzhiyun pci_read_config_dword(dev,
490*4882a593Smuzhiyun pos + offsetof(struct virtio_pci_cap64,
491*4882a593Smuzhiyun offset_hi), &tmp32);
492*4882a593Smuzhiyun res_offset |= ((u64)tmp32) << 32;
493*4882a593Smuzhiyun pci_read_config_dword(dev,
494*4882a593Smuzhiyun pos + offsetof(struct virtio_pci_cap64,
495*4882a593Smuzhiyun length_hi), &tmp32);
496*4882a593Smuzhiyun res_length |= ((u64)tmp32) << 32;
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun *offset = res_offset;
499*4882a593Smuzhiyun *len = res_length;
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun return pos;
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun return 0;
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun
vp_get_shm_region(struct virtio_device * vdev,struct virtio_shm_region * region,u8 id)506*4882a593Smuzhiyun static bool vp_get_shm_region(struct virtio_device *vdev,
507*4882a593Smuzhiyun struct virtio_shm_region *region, u8 id)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun struct virtio_pci_device *vp_dev = to_vp_device(vdev);
510*4882a593Smuzhiyun struct pci_dev *pci_dev = vp_dev->pci_dev;
511*4882a593Smuzhiyun u8 bar;
512*4882a593Smuzhiyun u64 offset, len;
513*4882a593Smuzhiyun phys_addr_t phys_addr;
514*4882a593Smuzhiyun size_t bar_len;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun if (!virtio_pci_find_shm_cap(pci_dev, id, &bar, &offset, &len))
517*4882a593Smuzhiyun return false;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun phys_addr = pci_resource_start(pci_dev, bar);
520*4882a593Smuzhiyun bar_len = pci_resource_len(pci_dev, bar);
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun if ((offset + len) < offset) {
523*4882a593Smuzhiyun dev_err(&pci_dev->dev, "%s: cap offset+len overflow detected\n",
524*4882a593Smuzhiyun __func__);
525*4882a593Smuzhiyun return false;
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun if (offset + len > bar_len) {
529*4882a593Smuzhiyun dev_err(&pci_dev->dev, "%s: bar shorter than cap offset+len\n",
530*4882a593Smuzhiyun __func__);
531*4882a593Smuzhiyun return false;
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun region->len = len;
535*4882a593Smuzhiyun region->addr = (u64) phys_addr + offset;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun return true;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun static const struct virtio_config_ops virtio_pci_config_nodev_ops = {
541*4882a593Smuzhiyun .get = NULL,
542*4882a593Smuzhiyun .set = NULL,
543*4882a593Smuzhiyun .generation = vp_generation,
544*4882a593Smuzhiyun .get_status = vp_get_status,
545*4882a593Smuzhiyun .set_status = vp_set_status,
546*4882a593Smuzhiyun .reset = vp_reset,
547*4882a593Smuzhiyun .find_vqs = vp_modern_find_vqs,
548*4882a593Smuzhiyun .del_vqs = vp_del_vqs,
549*4882a593Smuzhiyun .get_features = vp_get_features,
550*4882a593Smuzhiyun .finalize_features = vp_finalize_features,
551*4882a593Smuzhiyun .bus_name = vp_bus_name,
552*4882a593Smuzhiyun .set_vq_affinity = vp_set_vq_affinity,
553*4882a593Smuzhiyun .get_vq_affinity = vp_get_vq_affinity,
554*4882a593Smuzhiyun .get_shm_region = vp_get_shm_region,
555*4882a593Smuzhiyun };
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun static const struct virtio_config_ops virtio_pci_config_ops = {
558*4882a593Smuzhiyun .get = vp_get,
559*4882a593Smuzhiyun .set = vp_set,
560*4882a593Smuzhiyun .generation = vp_generation,
561*4882a593Smuzhiyun .get_status = vp_get_status,
562*4882a593Smuzhiyun .set_status = vp_set_status,
563*4882a593Smuzhiyun .reset = vp_reset,
564*4882a593Smuzhiyun .find_vqs = vp_modern_find_vqs,
565*4882a593Smuzhiyun .del_vqs = vp_del_vqs,
566*4882a593Smuzhiyun .get_features = vp_get_features,
567*4882a593Smuzhiyun .finalize_features = vp_finalize_features,
568*4882a593Smuzhiyun .bus_name = vp_bus_name,
569*4882a593Smuzhiyun .set_vq_affinity = vp_set_vq_affinity,
570*4882a593Smuzhiyun .get_vq_affinity = vp_get_vq_affinity,
571*4882a593Smuzhiyun .get_shm_region = vp_get_shm_region,
572*4882a593Smuzhiyun };
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun /**
575*4882a593Smuzhiyun * virtio_pci_find_capability - walk capabilities to find device info.
576*4882a593Smuzhiyun * @dev: the pci device
577*4882a593Smuzhiyun * @cfg_type: the VIRTIO_PCI_CAP_* value we seek
578*4882a593Smuzhiyun * @ioresource_types: IORESOURCE_MEM and/or IORESOURCE_IO.
579*4882a593Smuzhiyun * @bars: the bitmask of BARs
580*4882a593Smuzhiyun *
581*4882a593Smuzhiyun * Returns offset of the capability, or 0.
582*4882a593Smuzhiyun */
virtio_pci_find_capability(struct pci_dev * dev,u8 cfg_type,u32 ioresource_types,int * bars)583*4882a593Smuzhiyun static inline int virtio_pci_find_capability(struct pci_dev *dev, u8 cfg_type,
584*4882a593Smuzhiyun u32 ioresource_types, int *bars)
585*4882a593Smuzhiyun {
586*4882a593Smuzhiyun int pos;
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun for (pos = pci_find_capability(dev, PCI_CAP_ID_VNDR);
589*4882a593Smuzhiyun pos > 0;
590*4882a593Smuzhiyun pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_VNDR)) {
591*4882a593Smuzhiyun u8 type, bar;
592*4882a593Smuzhiyun pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap,
593*4882a593Smuzhiyun cfg_type),
594*4882a593Smuzhiyun &type);
595*4882a593Smuzhiyun pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap,
596*4882a593Smuzhiyun bar),
597*4882a593Smuzhiyun &bar);
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun /* Ignore structures with reserved BAR values */
600*4882a593Smuzhiyun if (bar > 0x5)
601*4882a593Smuzhiyun continue;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun if (type == cfg_type) {
604*4882a593Smuzhiyun if (pci_resource_len(dev, bar) &&
605*4882a593Smuzhiyun pci_resource_flags(dev, bar) & ioresource_types) {
606*4882a593Smuzhiyun *bars |= (1 << bar);
607*4882a593Smuzhiyun return pos;
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun }
611*4882a593Smuzhiyun return 0;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun /* This is part of the ABI. Don't screw with it. */
check_offsets(void)615*4882a593Smuzhiyun static inline void check_offsets(void)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun /* Note: disk space was harmed in compilation of this function. */
618*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_CAP_VNDR !=
619*4882a593Smuzhiyun offsetof(struct virtio_pci_cap, cap_vndr));
620*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_CAP_NEXT !=
621*4882a593Smuzhiyun offsetof(struct virtio_pci_cap, cap_next));
622*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_CAP_LEN !=
623*4882a593Smuzhiyun offsetof(struct virtio_pci_cap, cap_len));
624*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_CAP_CFG_TYPE !=
625*4882a593Smuzhiyun offsetof(struct virtio_pci_cap, cfg_type));
626*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_CAP_BAR !=
627*4882a593Smuzhiyun offsetof(struct virtio_pci_cap, bar));
628*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_CAP_OFFSET !=
629*4882a593Smuzhiyun offsetof(struct virtio_pci_cap, offset));
630*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_CAP_LENGTH !=
631*4882a593Smuzhiyun offsetof(struct virtio_pci_cap, length));
632*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_NOTIFY_CAP_MULT !=
633*4882a593Smuzhiyun offsetof(struct virtio_pci_notify_cap,
634*4882a593Smuzhiyun notify_off_multiplier));
635*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_DFSELECT !=
636*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg,
637*4882a593Smuzhiyun device_feature_select));
638*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_DF !=
639*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, device_feature));
640*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_GFSELECT !=
641*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg,
642*4882a593Smuzhiyun guest_feature_select));
643*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_GF !=
644*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, guest_feature));
645*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_MSIX !=
646*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, msix_config));
647*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_NUMQ !=
648*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, num_queues));
649*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_STATUS !=
650*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, device_status));
651*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_CFGGENERATION !=
652*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, config_generation));
653*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_Q_SELECT !=
654*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, queue_select));
655*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_Q_SIZE !=
656*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, queue_size));
657*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_Q_MSIX !=
658*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, queue_msix_vector));
659*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_Q_ENABLE !=
660*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, queue_enable));
661*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_Q_NOFF !=
662*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, queue_notify_off));
663*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_Q_DESCLO !=
664*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, queue_desc_lo));
665*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_Q_DESCHI !=
666*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, queue_desc_hi));
667*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_Q_AVAILLO !=
668*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, queue_avail_lo));
669*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_Q_AVAILHI !=
670*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, queue_avail_hi));
671*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_Q_USEDLO !=
672*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, queue_used_lo));
673*4882a593Smuzhiyun BUILD_BUG_ON(VIRTIO_PCI_COMMON_Q_USEDHI !=
674*4882a593Smuzhiyun offsetof(struct virtio_pci_common_cfg, queue_used_hi));
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun /* the PCI probing function */
virtio_pci_modern_probe(struct virtio_pci_device * vp_dev)678*4882a593Smuzhiyun int virtio_pci_modern_probe(struct virtio_pci_device *vp_dev)
679*4882a593Smuzhiyun {
680*4882a593Smuzhiyun struct pci_dev *pci_dev = vp_dev->pci_dev;
681*4882a593Smuzhiyun int err, common, isr, notify, device;
682*4882a593Smuzhiyun u32 notify_length;
683*4882a593Smuzhiyun u32 notify_offset;
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun check_offsets();
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun /* We only own devices >= 0x1000 and <= 0x107f: leave the rest. */
688*4882a593Smuzhiyun if (pci_dev->device < 0x1000 || pci_dev->device > 0x107f)
689*4882a593Smuzhiyun return -ENODEV;
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun if (pci_dev->device < 0x1040) {
692*4882a593Smuzhiyun /* Transitional devices: use the PCI subsystem device id as
693*4882a593Smuzhiyun * virtio device id, same as legacy driver always did.
694*4882a593Smuzhiyun */
695*4882a593Smuzhiyun vp_dev->vdev.id.device = pci_dev->subsystem_device;
696*4882a593Smuzhiyun } else {
697*4882a593Smuzhiyun /* Modern devices: simply use PCI device id, but start from 0x1040. */
698*4882a593Smuzhiyun vp_dev->vdev.id.device = pci_dev->device - 0x1040;
699*4882a593Smuzhiyun }
700*4882a593Smuzhiyun vp_dev->vdev.id.vendor = pci_dev->subsystem_vendor;
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun /* check for a common config: if not, use legacy mode (bar 0). */
703*4882a593Smuzhiyun common = virtio_pci_find_capability(pci_dev, VIRTIO_PCI_CAP_COMMON_CFG,
704*4882a593Smuzhiyun IORESOURCE_IO | IORESOURCE_MEM,
705*4882a593Smuzhiyun &vp_dev->modern_bars);
706*4882a593Smuzhiyun if (!common) {
707*4882a593Smuzhiyun dev_info(&pci_dev->dev,
708*4882a593Smuzhiyun "virtio_pci: leaving for legacy driver\n");
709*4882a593Smuzhiyun return -ENODEV;
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun /* If common is there, these should be too... */
713*4882a593Smuzhiyun isr = virtio_pci_find_capability(pci_dev, VIRTIO_PCI_CAP_ISR_CFG,
714*4882a593Smuzhiyun IORESOURCE_IO | IORESOURCE_MEM,
715*4882a593Smuzhiyun &vp_dev->modern_bars);
716*4882a593Smuzhiyun notify = virtio_pci_find_capability(pci_dev, VIRTIO_PCI_CAP_NOTIFY_CFG,
717*4882a593Smuzhiyun IORESOURCE_IO | IORESOURCE_MEM,
718*4882a593Smuzhiyun &vp_dev->modern_bars);
719*4882a593Smuzhiyun if (!isr || !notify) {
720*4882a593Smuzhiyun dev_err(&pci_dev->dev,
721*4882a593Smuzhiyun "virtio_pci: missing capabilities %i/%i/%i\n",
722*4882a593Smuzhiyun common, isr, notify);
723*4882a593Smuzhiyun return -EINVAL;
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun err = dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(64));
727*4882a593Smuzhiyun if (err)
728*4882a593Smuzhiyun err = dma_set_mask_and_coherent(&pci_dev->dev,
729*4882a593Smuzhiyun DMA_BIT_MASK(32));
730*4882a593Smuzhiyun if (err)
731*4882a593Smuzhiyun dev_warn(&pci_dev->dev, "Failed to enable 64-bit or 32-bit DMA. Trying to continue, but this might not work.\n");
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun /* Device capability is only mandatory for devices that have
734*4882a593Smuzhiyun * device-specific configuration.
735*4882a593Smuzhiyun */
736*4882a593Smuzhiyun device = virtio_pci_find_capability(pci_dev, VIRTIO_PCI_CAP_DEVICE_CFG,
737*4882a593Smuzhiyun IORESOURCE_IO | IORESOURCE_MEM,
738*4882a593Smuzhiyun &vp_dev->modern_bars);
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun err = pci_request_selected_regions(pci_dev, vp_dev->modern_bars,
741*4882a593Smuzhiyun "virtio-pci-modern");
742*4882a593Smuzhiyun if (err)
743*4882a593Smuzhiyun return err;
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun err = -EINVAL;
746*4882a593Smuzhiyun vp_dev->common = map_capability(pci_dev, common,
747*4882a593Smuzhiyun sizeof(struct virtio_pci_common_cfg), 4,
748*4882a593Smuzhiyun 0, sizeof(struct virtio_pci_common_cfg),
749*4882a593Smuzhiyun NULL);
750*4882a593Smuzhiyun if (!vp_dev->common)
751*4882a593Smuzhiyun goto err_map_common;
752*4882a593Smuzhiyun vp_dev->isr = map_capability(pci_dev, isr, sizeof(u8), 1,
753*4882a593Smuzhiyun 0, 1,
754*4882a593Smuzhiyun NULL);
755*4882a593Smuzhiyun if (!vp_dev->isr)
756*4882a593Smuzhiyun goto err_map_isr;
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun /* Read notify_off_multiplier from config space. */
759*4882a593Smuzhiyun pci_read_config_dword(pci_dev,
760*4882a593Smuzhiyun notify + offsetof(struct virtio_pci_notify_cap,
761*4882a593Smuzhiyun notify_off_multiplier),
762*4882a593Smuzhiyun &vp_dev->notify_offset_multiplier);
763*4882a593Smuzhiyun /* Read notify length and offset from config space. */
764*4882a593Smuzhiyun pci_read_config_dword(pci_dev,
765*4882a593Smuzhiyun notify + offsetof(struct virtio_pci_notify_cap,
766*4882a593Smuzhiyun cap.length),
767*4882a593Smuzhiyun ¬ify_length);
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun pci_read_config_dword(pci_dev,
770*4882a593Smuzhiyun notify + offsetof(struct virtio_pci_notify_cap,
771*4882a593Smuzhiyun cap.offset),
772*4882a593Smuzhiyun ¬ify_offset);
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun /* We don't know how many VQs we'll map, ahead of the time.
775*4882a593Smuzhiyun * If notify length is small, map it all now.
776*4882a593Smuzhiyun * Otherwise, map each VQ individually later.
777*4882a593Smuzhiyun */
778*4882a593Smuzhiyun if ((u64)notify_length + (notify_offset % PAGE_SIZE) <= PAGE_SIZE) {
779*4882a593Smuzhiyun vp_dev->notify_base = map_capability(pci_dev, notify, 2, 2,
780*4882a593Smuzhiyun 0, notify_length,
781*4882a593Smuzhiyun &vp_dev->notify_len);
782*4882a593Smuzhiyun if (!vp_dev->notify_base)
783*4882a593Smuzhiyun goto err_map_notify;
784*4882a593Smuzhiyun } else {
785*4882a593Smuzhiyun vp_dev->notify_map_cap = notify;
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun /* Again, we don't know how much we should map, but PAGE_SIZE
789*4882a593Smuzhiyun * is more than enough for all existing devices.
790*4882a593Smuzhiyun */
791*4882a593Smuzhiyun if (device) {
792*4882a593Smuzhiyun vp_dev->device = map_capability(pci_dev, device, 0, 4,
793*4882a593Smuzhiyun 0, PAGE_SIZE,
794*4882a593Smuzhiyun &vp_dev->device_len);
795*4882a593Smuzhiyun if (!vp_dev->device)
796*4882a593Smuzhiyun goto err_map_device;
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun vp_dev->vdev.config = &virtio_pci_config_ops;
799*4882a593Smuzhiyun } else {
800*4882a593Smuzhiyun vp_dev->vdev.config = &virtio_pci_config_nodev_ops;
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun vp_dev->config_vector = vp_config_vector;
804*4882a593Smuzhiyun vp_dev->setup_vq = setup_vq;
805*4882a593Smuzhiyun vp_dev->del_vq = del_vq;
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun return 0;
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun err_map_device:
810*4882a593Smuzhiyun if (vp_dev->notify_base)
811*4882a593Smuzhiyun pci_iounmap(pci_dev, vp_dev->notify_base);
812*4882a593Smuzhiyun err_map_notify:
813*4882a593Smuzhiyun pci_iounmap(pci_dev, vp_dev->isr);
814*4882a593Smuzhiyun err_map_isr:
815*4882a593Smuzhiyun pci_iounmap(pci_dev, vp_dev->common);
816*4882a593Smuzhiyun err_map_common:
817*4882a593Smuzhiyun return err;
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun
virtio_pci_modern_remove(struct virtio_pci_device * vp_dev)820*4882a593Smuzhiyun void virtio_pci_modern_remove(struct virtio_pci_device *vp_dev)
821*4882a593Smuzhiyun {
822*4882a593Smuzhiyun struct pci_dev *pci_dev = vp_dev->pci_dev;
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun if (vp_dev->device)
825*4882a593Smuzhiyun pci_iounmap(pci_dev, vp_dev->device);
826*4882a593Smuzhiyun if (vp_dev->notify_base)
827*4882a593Smuzhiyun pci_iounmap(pci_dev, vp_dev->notify_base);
828*4882a593Smuzhiyun pci_iounmap(pci_dev, vp_dev->isr);
829*4882a593Smuzhiyun pci_iounmap(pci_dev, vp_dev->common);
830*4882a593Smuzhiyun pci_release_selected_regions(pci_dev, vp_dev->modern_bars);
831*4882a593Smuzhiyun }
832