1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _NE_MISC_DEV_H_ 7*4882a593Smuzhiyun #define _NE_MISC_DEV_H_ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/cpumask.h> 10*4882a593Smuzhiyun #include <linux/list.h> 11*4882a593Smuzhiyun #include <linux/miscdevice.h> 12*4882a593Smuzhiyun #include <linux/mm.h> 13*4882a593Smuzhiyun #include <linux/mutex.h> 14*4882a593Smuzhiyun #include <linux/pci.h> 15*4882a593Smuzhiyun #include <linux/wait.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #include "ne_pci_dev.h" 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /** 20*4882a593Smuzhiyun * struct ne_mem_region - Entry in the enclave user space memory regions list. 21*4882a593Smuzhiyun * @mem_region_list_entry: Entry in the list of enclave memory regions. 22*4882a593Smuzhiyun * @memory_size: Size of the user space memory region. 23*4882a593Smuzhiyun * @nr_pages: Number of pages that make up the memory region. 24*4882a593Smuzhiyun * @pages: Pages that make up the user space memory region. 25*4882a593Smuzhiyun * @userspace_addr: User space address of the memory region. 26*4882a593Smuzhiyun */ 27*4882a593Smuzhiyun struct ne_mem_region { 28*4882a593Smuzhiyun struct list_head mem_region_list_entry; 29*4882a593Smuzhiyun u64 memory_size; 30*4882a593Smuzhiyun unsigned long nr_pages; 31*4882a593Smuzhiyun struct page **pages; 32*4882a593Smuzhiyun u64 userspace_addr; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /** 36*4882a593Smuzhiyun * struct ne_enclave - Per-enclave data used for enclave lifetime management. 37*4882a593Smuzhiyun * @enclave_info_mutex : Mutex for accessing this internal state. 38*4882a593Smuzhiyun * @enclave_list_entry : Entry in the list of created enclaves. 39*4882a593Smuzhiyun * @eventq: Wait queue used for out-of-band event notifications 40*4882a593Smuzhiyun * triggered from the PCI device event handler to 41*4882a593Smuzhiyun * the enclave process via the poll function. 42*4882a593Smuzhiyun * @has_event: Variable used to determine if the out-of-band event 43*4882a593Smuzhiyun * was triggered. 44*4882a593Smuzhiyun * @max_mem_regions: The maximum number of memory regions that can be 45*4882a593Smuzhiyun * handled by the hypervisor. 46*4882a593Smuzhiyun * @mem_regions_list: Enclave user space memory regions list. 47*4882a593Smuzhiyun * @mem_size: Enclave memory size. 48*4882a593Smuzhiyun * @mm : Enclave process abstraction mm data struct. 49*4882a593Smuzhiyun * @nr_mem_regions: Number of memory regions associated with the enclave. 50*4882a593Smuzhiyun * @nr_parent_vm_cores : The size of the threads per core array. The 51*4882a593Smuzhiyun * total number of CPU cores available on the 52*4882a593Smuzhiyun * parent / primary VM. 53*4882a593Smuzhiyun * @nr_threads_per_core: The number of threads that a full CPU core has. 54*4882a593Smuzhiyun * @nr_vcpus: Number of vcpus associated with the enclave. 55*4882a593Smuzhiyun * @numa_node: NUMA node of the enclave memory and CPUs. 56*4882a593Smuzhiyun * @slot_uid: Slot unique id mapped to the enclave. 57*4882a593Smuzhiyun * @state: Enclave state, updated during enclave lifetime. 58*4882a593Smuzhiyun * @threads_per_core: Enclave full CPU cores array, indexed by core id, 59*4882a593Smuzhiyun * consisting of cpumasks with all their threads. 60*4882a593Smuzhiyun * Full CPU cores are taken from the NE CPU pool 61*4882a593Smuzhiyun * and are available to the enclave. 62*4882a593Smuzhiyun * @vcpu_ids: Cpumask of the vCPUs that are set for the enclave. 63*4882a593Smuzhiyun */ 64*4882a593Smuzhiyun struct ne_enclave { 65*4882a593Smuzhiyun struct mutex enclave_info_mutex; 66*4882a593Smuzhiyun struct list_head enclave_list_entry; 67*4882a593Smuzhiyun wait_queue_head_t eventq; 68*4882a593Smuzhiyun bool has_event; 69*4882a593Smuzhiyun u64 max_mem_regions; 70*4882a593Smuzhiyun struct list_head mem_regions_list; 71*4882a593Smuzhiyun u64 mem_size; 72*4882a593Smuzhiyun struct mm_struct *mm; 73*4882a593Smuzhiyun unsigned int nr_mem_regions; 74*4882a593Smuzhiyun unsigned int nr_parent_vm_cores; 75*4882a593Smuzhiyun unsigned int nr_threads_per_core; 76*4882a593Smuzhiyun unsigned int nr_vcpus; 77*4882a593Smuzhiyun int numa_node; 78*4882a593Smuzhiyun u64 slot_uid; 79*4882a593Smuzhiyun u16 state; 80*4882a593Smuzhiyun cpumask_var_t *threads_per_core; 81*4882a593Smuzhiyun cpumask_var_t vcpu_ids; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /** 85*4882a593Smuzhiyun * enum ne_state - States available for an enclave. 86*4882a593Smuzhiyun * @NE_STATE_INIT: The enclave has not been started yet. 87*4882a593Smuzhiyun * @NE_STATE_RUNNING: The enclave was started and is running as expected. 88*4882a593Smuzhiyun * @NE_STATE_STOPPED: The enclave exited without userspace interaction. 89*4882a593Smuzhiyun */ 90*4882a593Smuzhiyun enum ne_state { 91*4882a593Smuzhiyun NE_STATE_INIT = 0, 92*4882a593Smuzhiyun NE_STATE_RUNNING = 2, 93*4882a593Smuzhiyun NE_STATE_STOPPED = U16_MAX, 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun /** 97*4882a593Smuzhiyun * struct ne_devs - Data structure to keep refs to the NE misc and PCI devices. 98*4882a593Smuzhiyun * @ne_misc_dev: Nitro Enclaves misc device. 99*4882a593Smuzhiyun * @ne_pci_dev : Nitro Enclaves PCI device. 100*4882a593Smuzhiyun */ 101*4882a593Smuzhiyun struct ne_devs { 102*4882a593Smuzhiyun struct miscdevice *ne_misc_dev; 103*4882a593Smuzhiyun struct ne_pci_dev *ne_pci_dev; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun /* Nitro Enclaves (NE) data structure for keeping refs to the NE misc and PCI devices. */ 107*4882a593Smuzhiyun extern struct ne_devs ne_devs; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #endif /* _NE_MISC_DEV_H_ */ 110